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    • 11. 发明申请
    • Color filter panel, display panel having the same and method of manufacturing the same
    • 滤色片,显示面板及其制造方法
    • US20060028598A1
    • 2006-02-09
    • US11181135
    • 2005-07-13
    • Jeong-Ho LeeKye-Hun LeeKweon-Sam HongBae-Heuk Kim
    • Jeong-Ho LeeKye-Hun LeeKweon-Sam HongBae-Heuk Kim
    • G02F1/1335
    • G02F1/133514G02F1/13394
    • A color filter substrate includes a transparent substrate, a light-blocking layer, a color filter layer, a first cell gap maintaining member and a second cell gap maintaining member. The transparent substrate has a plurality of pixel regions. Each of the pixel regions includes first and second regions. The light-blocking layer is disposed over the transparent substrate. The light-blocking layer blocks light that leaks through boundaries of the pixel regions. The color filter layer is disposed over the transparent substrate. The color filter layer has a first thickness at the first region and a second thickness that is smaller than the first thickness at the second region. The first cell gap maintaining member is disposed at the first region. The second cell gap maintaining member is disposed at the second region. Therefore, a height difference between the main column spacer and the sub column spacer may be easily adjusted.
    • 滤色器基板包括透明基板,遮光层,滤色器层,第一单元间隙保持部件和第二单元间隙保持部件。 透明基板具有多个像素区域。 每个像素区域包括第一和第二区域。 遮光层设置在透明基板上。 遮光层阻挡通过像素区域的边界泄漏的光。 滤色器层设置在透明基板上。 滤色器层在第一区域具有第一厚度,在第二区域具有小于第一厚度的第二厚度。 第一细胞间隙保持部件设置在第一区域。 第二单元间隙保持构件设置在第二区域。 因此,可以容易地调整主柱间隔件和子柱间隔件之间的高度差。
    • 14. 发明授权
    • Thin film transistor array panel
    • 薄膜晶体管阵列面板
    • US07777823B2
    • 2010-08-17
    • US12018885
    • 2008-01-24
    • Jang-Il KimKweon-Sam HongDoo-Hwan YouIn-Ho PakrHyun-Duck Son
    • Jang-Il KimKweon-Sam HongDoo-Hwan YouIn-Ho PakrHyun-Duck Son
    • G02F1/1343
    • G02F1/13624G02F1/136286
    • A thin film transistor array panel includes: first and second gate lines disposed on a substrate and separated from each other; a data line intersecting the first and second gate lines; first and second thin film transistors connected to the first gate line and the data line; a third thin film transistor connected to the second gate line and having a drain electrode; and a pixel electrode including a first subpixel electrode and a second subpixel electrode, wherein the first subpixel electrode is connected to the first and third thin film transistor, the second subpixel electrode is connected to the second thin film transistor and includes a projection overlapping the drain electrode, and the projection has a first pair of edge portions that meet a first edge of the drain electrode and are substantially parallel to each other.
    • 薄膜晶体管阵列面板包括:设置在基板上并彼此分离的第一和第二栅极线; 与第一和第二栅极线相交的数据线; 连接到第一栅极线和数据线的第一和第二薄膜晶体管; 连接到第二栅极线并具有漏电极的第三薄膜晶体管; 以及包括第一子像素电极和第二子像素电极的像素电极,其中所述第一子像素电极连接到所述第一和第三薄膜晶体管,所述第二子像素电极连接到所述第二薄膜晶体管,并且包括与所述漏极 电极,并且突起具有与漏电极的第一边缘相遇并且彼此基本平行的第一对边缘部分。
    • 16. 发明授权
    • Gate drive circuit, display substrate having the same, and method thereof
    • 栅极驱动电路,具有该栅极驱动电路的显示基板及其方法
    • US08138792B2
    • 2012-03-20
    • US12114882
    • 2008-05-05
    • Jong-Woong ChangKweon-Sam Hong
    • Jong-Woong ChangKweon-Sam Hong
    • H01L25/00
    • G09G3/3611G09G3/006G09G3/3677G09G2300/0426G09G2330/04
    • A gate drive circuit includes a shift register, a clock wiring and a start wiring. The shift register includes a plurality of stages arranged in a first direction on a base substrate to output a plurality of gate signals. The clock wiring is extended along the first direction. The clock wiring is electrically connected to a plurality of clock connecting wirings extended in a second direction crossing the first direction to deliver a clock signal to the stages. The start wiring includes the first wiring extended along the first direction and a second wiring connected to the first wiring and extended in the first direction to cross with the clock connecting wirings so as to deliver a vertical start signal to a first stage. Therefore, a structure of a signal wiring delivering a vertical start signal is changed, thereby protecting the gate drive circuit from static electricity.
    • 栅极驱动电路包括移位寄存器,时钟布线和起始布线。 移位寄存器包括在基底基板上沿第一方向布置的多个级以输出多个栅极信号。 时钟接线沿着第一个方向延伸。 时钟布线电连接到与第一方向相交的第二方向上延伸的多个时钟连接布线,以将时钟信号传送到各级。 启动布线包括沿着第一方向延伸的第一布线和连接到第一布线的第二布线,并沿着第一方向延伸以与时钟连接布线交叉,以将垂直启动信号传送到第一级。 因此,发送垂直起动信号的信号线的结构发生变化,从而保护栅极驱动电路免受静电。
    • 17. 发明授权
    • Liquid crystal display having cell gap maintaining members located in the switching element region and the storage line region
    • 具有位于开关元件区域和存储线区域中的单元间隙保持构件的液晶显示器
    • US07920243B2
    • 2011-04-05
    • US11181135
    • 2005-07-13
    • Jeong-Ho LeeKye-Hun LeeKweon-Sam HongBae-Heuk Yim
    • Jeong-Ho LeeKye-Hun LeeKweon-Sam HongBae-Heuk Yim
    • G02F1/1335G02F1/1339
    • G02F1/133514G02F1/13394
    • A color filter substrate includes a transparent substrate, a light-blocking layer, a color filter layer, a first cell gap maintaining member and a second cell gap maintaining member. The transparent substrate has a plurality of pixel regions. Each of the pixel regions includes first and second regions. The light-blocking layer is disposed over the transparent substrate. The light-blocking layer blocks light that leaks through boundaries of the pixel regions. The color filter layer is disposed over the transparent substrate. The color filter layer has a first thickness at the first region and a second thickness that is smaller than the first thickness at the second region. The first cell gap maintaining member is disposed at the first region. The second cell gap maintaining member is disposed at the second region. Therefore, a height difference between the main column spacer and the sub column spacer may be easily adjusted.
    • 滤色器基板包括透明基板,遮光层,滤色器层,第一单元间隙保持部件和第二单元间隙保持部件。 透明基板具有多个像素区域。 每个像素区域包括第一和第二区域。 遮光层设置在透明基板上。 遮光层阻挡通过像素区域的边界泄漏的光。 滤色器层设置在透明基板上。 滤色器层在第一区域具有第一厚度,在第二区域具有小于第一厚度的第二厚度。 第一细胞间隙保持部件设置在第一区域。 第二单元间隙保持构件设置在第二区域。 因此,可以容易地调整主柱间隔件和子柱间隔件之间的高度差。