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11. 发明申请

US20070005836A1 Memory having swizzled signal lines 审中-公开
标题翻译：存储器有信号线
公开(公告)号：US20070005836A1
公开(公告)日：2007-01-04
申请号：US11148160
申请日：2005-06-07
申请人： Sandeep Jain , George Vergis , John Halbert , Nilesh Shah
发明人： Sandeep Jain , George Vergis , John Halbert , Nilesh Shah
IPC分类号： G06F13/38
CPC分类号： G06F13/4013 , G11C5/06 , G11C7/04 , G11C7/1006 , G11C8/20
摘要： Swizzle information for signal lines on a memory component may be stored on the memory component. The swizzle information may be transmitted to a memory controller which may include logic to receive the swizzle information which is then used to deswizzle data received from the memory component. Data may be transmitted from a memory device to a memory controller in a format that is tolerant of swizzling on signal lines between the device and the controller. The format may include codes having unique of numbers of values. Data may be sent in multi-code bursts that divide a data range into progressively smaller ranges. Other embodiments are described and claimed.
摘要翻译：存储器组件上的信号线的交换信息可以存储在存储器组件上。交换信息可以被发送到存储器控制器，存储器控制器可以包括用于接收转移信息的逻辑，然后用于去除从存储器组件接收的数据。数据可以以容许在设备和控制器之间的信号线上进行转换的格式从存储器件发送到存储器控制器。该格式可以包括具有唯一值的值的代码。可以以将多个数字范围分割成逐渐变小的多码脉冲串来发送数据。描述和要求保护其他实施例。

12. 发明授权

US06453218B1 Integrated RAM thermal sensor 有权
标题翻译：集成RAM热传感器
公开(公告)号：US06453218B1
公开(公告)日：2002-09-17
申请号：US09280913
申请日：1999-03-29
申请人： George Vergis
发明人： George Vergis
IPC分类号： G05D2300
CPC分类号： G05D23/20 , G05D23/1917
摘要： A method and apparatus for the thermal sensing and regulating of a RAM device using temperature sensing circuitry, embedded directly in the device, is presented. A predetermined voltage is passed through a temperature sensitive diode to create an analog signal. The analog signal is converted into digital temperature data by a A/D converter. The digital temperature data is then transmitted to a controlling host, without interfering with the normal operation of the device, by either transmitting the data in an out-of-band signal or during the clock refresh cycle. The controlling host, upon receipt of the temperature data, checks to see if the temperature level of the device has exceeded a threshold value.
摘要翻译：提出了一种用于使用直接嵌入设备中的温度感测电路对RAM器件的热感测和调节的方法和装置。预定电压通过温度敏感二极管以产生模拟信号。模拟信号由A / D转换器转换为数字温度数据。然后，通过在带外信号中传输数据或在时钟刷新周期期间将数字温度数据发送到控制主机，而不干扰设备的正常操作。控制主机在接收到温度数据后，检查设备的温度水平是否超过阈值。

13. 发明申请

US20180247678A1 SYSTEM FOR IMPROVED POWER DISTRIBUTION TO A MEMORY CARD THROUGH REMOTE SENSE FEEDBACK 审中-公开
公开(公告)号：US20180247678A1
公开(公告)日：2018-08-30
申请号：US15718388
申请日：2017-09-28
申请人： George Vergis , Dat Le
发明人： George Vergis , Dat Le
IPC分类号： G11C5/14
CPC分类号： G11C5/147 , G11C5/04 , G11C5/063 , G11C5/14 , G11C7/1063 , G11C2207/10 , G11C2207/105
摘要： In one embodiment, an apparatus comprises a first connector to couple to a connector of a memory card, the memory card comprising a first sense node to sense a supply voltage at a first location of the memory card, the first connector comprising a voltage supply pin; a ground pin; and a sense pin to couple to the first sense node; a first sense line to couple to the first sense node through the sense pin; and a voltage regulator coupled to the first sense line, the voltage regulator to provide the supply voltage based on feedback received from the first sense node of the memory card via the first sense line.

14. 发明申请

US20160183374A1 CPU PACKAGE SUBSTRATES WITH REMOVABLE MEMORY MECHANICAL INTERFACES 有权
标题翻译： CPU封装基板与可拆卸的存储器机械接口
公开(公告)号：US20160183374A1
公开(公告)日：2016-06-23
申请号：US14575775
申请日：2014-12-18
申请人： Mani Prakash , Thomas T. Holden , Jeffory L. Smalley , Ram S. Viswanath , Bassam N. Coury , Dimitrios Ziakas , Chong J. Zhao , Jonathan W. Thibado , Gregorio R. Murtagian , Kuang C. Liu , Rajasekaran Swaminathan , Zhichao Zhang , John M. Lynch , David J. Llapitan , Sanka Ganesan , Xiang Li , George Vergis
发明人： Mani Prakash , Thomas T. Holden , Jeffory L. Smalley , Ram S. Viswanath , Bassam N. Coury , Dimitrios Ziakas , Chong J. Zhao , Jonathan W. Thibado , Gregorio R. Murtagian , Kuang C. Liu , Rajasekaran Swaminathan , Zhichao Zhang , John M. Lynch , David J. Llapitan , Sanka Ganesan , Xiang Li , George Vergis
IPC分类号： H05K1/18 , H01R12/72 , H05K1/11 , H05K1/02 , H05K3/30 , H05K3/34
CPC分类号： H05K1/181 , H01L23/00 , H01L23/498 , H01L2224/16225 , H01L2924/15311 , H01R12/712 , H01R12/79 , H05K2201/10159 , H05K2201/10325 , Y02P70/611
摘要： Configurable central processing unit (CPU) package substrates are disclosed. A package substrate is described that includes a processing device interface. The package substrate also includes a memory device electrical interface disposed on the package substrate. The package substrate also includes a removable memory mechanical interface disposed proximately to the memory device electrical interface. The removable memory mechanical interface is to allow a memory device to be easily removed from the package substrate after attachment of the memory device to the package substrate.
摘要翻译：公开了可配置的中央处理单元（CPU）封装基板。描述了包括处理设备接口的封装衬底。封装衬底还包括设置在封装衬底上的存储器件电接口。封装衬底还包括靠近存储器件电接口设置的可移除存储器机械接口。可移除存储器机械接口是允许在将存储器件附接到封装衬底之后容易地从封装衬底移除存储器件。

15. 发明申请

US20110102230A1 DYNAMIC LINKING OF CODESETS IN UNIVERSAL REMOTE CONTROL DEVICES 有权
标题翻译：通用远程控制设备中代码的动态链接
公开(公告)号：US20110102230A1
公开(公告)日：2011-05-05
申请号：US13005017
申请日：2011-01-12
申请人： George Vergis , Sunilkumar Mankame
发明人： George Vergis , Sunilkumar Mankame
IPC分类号： H04L17/02
CPC分类号： H04N5/4403 , G08C17/02 , G08C19/28 , G08C19/36 , G08C2201/20 , H04N21/42225
摘要： A codeset having function-code combinations is provisioned on a controlling device to control functions of an intended target device. Input is provided to the controlling device which designates a function to be controlled on the intended target device. From a plurality of codes that are each associated with the designated function in a database stored in a memory of the controlling device a first code that is determined to be valid for use in controlling the designated function on the intended target device is selected. When the codeset is then provisioned on the controlling device, the provisioned codeset includes as a function-code combination thereof the designated function and the first code.
摘要翻译：具有功能代码组合的代码集被提供在控制设备上以控制预期目标设备的功能。向控制装置提供输入，该控制装置指定要在目标装置上控制的功能。从存储在控制装置的存储器中的数据库中的与指定功能相关联的多个代码中选择被确定为有效用于控制预期目标设备上的指定功能的第一代码。当代码集然后在控制设备上被提供时，所提供的代码集包括作为其指定功能和第一代码的功能代码组合。

16. 发明授权

US07414426B2 Time multiplexed dynamic on-die termination 有权
标题翻译：时间复用动态片上终端
公开(公告)号：US07414426B2
公开(公告)日：2008-08-19
申请号：US11296993
申请日：2005-12-07
申请人： Christopher Cox , George Vergis
发明人： Christopher Cox , George Vergis
IPC分类号： H03K17/16 , H03K19/003
CPC分类号： H04L25/0298 , G06F13/4086
摘要： Embodiments of the invention are generally directed to systems, methods, and apparatuses for time-multiplexed dynamic on-die termination. In an embodiment, an integrated circuit receives, during a first clock, an on-die termination (ODT) activation signal at its ODT pin. The integrated circuit also receives, during a second clock, an ODT value selection signal on its ODT pin. In an embodiment, the integrated circuit prevents a reset of the state of the ODT activation signal for a predetermined period of time to enable the multiplexing of signals on the ODT pin. Other embodiments are described and claimed.
摘要翻译：本发明的实施例一般涉及用于时分复用动态片上终端的系统，方法和装置。在一个实施例中，集成电路在第一时钟期间接收其ODT引脚上的管芯端接（ODT）激活信号。在第二个时钟期间，集成电路还在其ODT引脚上接收ODT值选择信号。在一个实施例中，集成电路防止了ODT激活信号的状态的复位达预定的时间段，以便能够复用ODT引脚上的信号。描述和要求保护其他实施例。

17. 发明申请

US20070126464A1 Dynamic on-die termination launch latency reduction 有权
标题翻译：动态片上终端启动延迟降低
公开(公告)号：US20070126464A1
公开(公告)日：2007-06-07
申请号：US11296960
申请日：2005-12-07
申请人： George Vergis , Christopher Cox
发明人： George Vergis , Christopher Cox
IPC分类号： H03K19/003
CPC分类号： G11C29/02 , G11C5/063 , G11C7/1048 , G11C7/20 , G11C29/025 , G11C29/028 , G11C29/50008 , H04L25/0298
摘要： Embodiments of the invention are generally directed to systems, methods, and apparatuses for dynamic on-die termination launch latency reduction. In some embodiments, an integrated circuit includes an input/output (I/O) circuit to receive a command and a termination resistance circuit to provide a termination resistance for the I/O circuit. The integrated circuit may further include control logic to establish an initial termination resistance during a preamble associated with the command. Other embodiments are described and claimed.
摘要翻译：本发明的实施例通常涉及用于动态片上终端启动延迟降低的系统，方法和装置。在一些实施例中，集成电路包括用于接收命令的输入/输出（I / O）电路和用于为I / O电路提供终端电阻的终端电阻电路。集成电路还可以包括控制逻辑，以在与命令相关联的前导码段期间建立初始终止电阻。描述和要求保护其他实施例。

18. 发明授权

US07099735B2 Method and apparatus to control the temperature of a memory device 有权
公开(公告)号：US07099735B2
公开(公告)日：2006-08-29
申请号：US10882546
申请日：2004-06-30
申请人： Sandeep K. Jain , George Vergis , Animesh Mishra , Jun Shi
发明人： Sandeep K. Jain , George Vergis , Animesh Mishra , Jun Shi
IPC分类号： G01K1/00 , G01K1/08 , G06F7/00
CPC分类号： G01K7/42
摘要： In one embodiment a memory controller is provided. The memory controller comprises a predictive logic circuit to predict an increase in a current operating temperature of a memory device coupled to the memory controller, based on memory cycles to be issued to the memory device; and a temperature control circuit to perform a temperature control operation wherein if the sum of the current operating temperature and the predicted increase in temperature is greater than a threshold temperature associated with the memory device, then the number of memory cycles issued to the memory device is reduced.

19. 发明授权

US09621836B2 Dynamic linking of codesets in universal remote control devices 有权
公开(公告)号：US09621836B2
公开(公告)日：2017-04-11
申请号：US13005017
申请日：2011-01-12
申请人： George Vergis
发明人： George Vergis , Sunilkumar Mankame
IPC分类号： G08C19/12 , H04N5/44 , G08C19/28 , H04N21/422
CPC分类号： H04N5/4403 , G08C17/02 , G08C19/28 , G08C19/36 , G08C2201/20 , H04N21/42225
摘要： A codeset having function-code combinations is provisioned on a controlling device to control functions of an intended target device. Input is provided to the controlling device which designates a function to be controlled on the intended target device. From a plurality of codes that are each associated with the designated function in a database stored in a memory of the controlling device a first code that is determined to be valid for use in controlling the designated function on the intended target device is selected. When the codeset is then provisioned on the controlling device, the provisioned codeset includes as a function-code combination thereof the designated function and the first code.

20. 发明授权

US09355688B2 Adaptive voltage input to a charge pump 有权
标题翻译：自适应电压输入到电荷泵
公开(公告)号：US09355688B2
公开(公告)日：2016-05-31
申请号：US13976791
申请日：2012-05-08
申请人： Kuljit Bains , George Vergis
发明人： Kuljit Bains , George Vergis
IPC分类号： G05F1/10 , G11C5/14 , G11C11/4074 , G11C29/02
CPC分类号： G11C5/145 , G11C11/4074 , G11C29/021 , G11C29/028
摘要： A memory subsystem includes an adaptive output voltage to provide a voltage based on a power profile of a memory device of the memory subsystem. A charge pump increases the voltage to a level needed to write data to the memory device. The voltage provided is based on the power profile of the memory device, which indicates a voltage level that provides good efficiency for the charge pump, and is within maximum levels for the memory device. The voltage can be higher than a nominal voltage indicated for the memory device in a specification.
摘要翻译：存储器子系统包括自适应输出电压，以基于存储器子系统的存储器件的功率曲线来提供电压。电荷泵将电压提高到将数据写入存储器件所需的水平。所提供的电压基于存储器件的功率曲线，其指示为电荷泵提供良好效率的电压电平，并且在存储器件的最大电平内。电压可以高于规范中为存储器件指示的额定电压。

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