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11. 发明授权

US08308819B2 Method for detecting the removal of a processing unit from a printed circuit board 有权
标题翻译：用于检测从印刷电路板移除处理单元的方法
公开(公告)号：US08308819B2
公开(公告)日：2012-11-13
申请号：US11641180
申请日：2006-12-19
申请人： Wesley A. Kirschner , Robert W. Sisson , John A. Hurd , Frederick W. Ryan, Jr. , Gary S. Jacobson
发明人： Wesley A. Kirschner , Robert W. Sisson , John A. Hurd , Frederick W. Ryan, Jr. , Gary S. Jacobson
IPC分类号： G08B13/00
CPC分类号： G06F21/554 , G06F21/725 , G06F21/86 , G07B17/00314 , G07B2017/00258 , G07B2017/00322 , G07B2017/00411
摘要： Various methods for detecting the removal of a processing unit, such as a microprocessor or a microcontroller, form a printed circuit board in a secure printing system, such as a postage metering system are provided. The methods utilize one or more of a real time clock provided internal to the processing unit, a CMOS device provided on the printed circuit board external to the processing unit, and CMOS memory internal to the processing unit to detect the removal of the processing unit and therefore an attack.
摘要翻译：提供了用于检测处理单元（诸如微处理器或微控制器）的移除的各种方法，在诸如邮资计费系统之类的安全打印系统中形成印刷电路板。该方法利用提供在处理单元内部的实时时钟中的一个或多个，设置在处理单元外部的印刷电路板上的CMOS器件，以及处理单元内部的CMOS存储器，以检测处理单元的移除，因此是一次攻击。

12. 发明授权

US08510231B2 Method and system for printing multiple regions across a mail piece 有权
标题翻译：在邮件上打印多个区域的方法和系统
公开(公告)号：US08510231B2
公开(公告)日：2013-08-13
申请号：US11083462
申请日：2005-03-17
申请人： Joseph P. Tokarski , John A. Hurd , Gary S. Jacobson , Wesley A. Kirschner , Robert G. Arsenault
发明人： Joseph P. Tokarski , John A. Hurd , Gary S. Jacobson , Wesley A. Kirschner , Robert G. Arsenault
IPC分类号： G06Q30/00 , G01R11/56 , G01R21/133 , G06F17/00
CPC分类号： G07B17/00362 , G07B17/00508 , G07B2017/00395 , G07B2017/00419 , G07B2017/00637
摘要： A method and system that allows for large amounts of data to be printed utilizing a small memory is provided. The complete image to be printed on the print medium is separated into different regions each having associated print data. The memory device, while being too small to store all of the print data for the full image, is capable of storing the print data associated with each region. The print data for each region is released from the print head controller to the memory device for printing in a timed fashion based on movement of the print medium. The print data for a subsequent region will not be passed to the memory until the print medium has moved a sufficient distance, thereby indicating that printing of the preceding region has been completed.
摘要翻译：提供了允许使用小存储器打印大量数据的方法和系统。要打印在打印介质上的完整图像被分成不同的区域，每个区域具有关联的打印数据。存储器设备虽然太小而不能存储全部图像的所有打印数据，但是能够存储与每个区域相关联的打印数据。基于打印介质的移动，每个区域的打印数据从打印头控制器被释放到存储装置，以便以定时的方式进行打印。用于后续区域的打印数据将不会传递到存储器，直到打印介质移动足够的距离，从而指示前一区域的打印已经完成。

13. 发明申请

US20100205509A1 SYSTEMS AND METHODS FOR EFFICIENT UNCORRECTABLE ERROR DETECTION IN FLASH MEMORY 有权
标题翻译：闪存中有效的不正确的错误检测的系统和方法
公开(公告)号：US20100205509A1
公开(公告)日：2010-08-12
申请号：US12763563
申请日：2010-04-20
申请人： Wesley A. KIRSCHNER , Robert W. Sisson , John A. Hurd , Gary S. Jacobson
发明人： Wesley A. KIRSCHNER , Robert W. Sisson , John A. Hurd , Gary S. Jacobson
IPC分类号： H03M13/05 , G06F11/10
CPC分类号： G06F11/1012
摘要： A system and method for efficient uncorrectable error detection in flash memory is described. A microcontroller including a non-volatile flash memory utilizes an Error Correction Code (ECC) having a certain error detection and correction bit strength. The user data is first processed by a hash function and hash data is stored with the user data. Then, the user data and hash data are processed by the ECC system. In detection, the hash ensures that a relatively low bit-strength ECC system did not incorrectly manipulate the user data. Such a hash integrity check provides an efficient, robust detection of incorrectly corrected user data resulting from errors beyond the correction but strength of the ECC system utilized.
摘要翻译：描述了一种用于闪存中有效的不可校正错误检测的系统和方法。包括非易失性闪速存储器的微控制器利用具有一定的错误检测和校正位强度的纠错码（ECC）。用户数据首先通过散列函数处理，散列数据与用户数据一起存储。然后，ECC系统处理用户数据和散列数据。在检测中，散列确保相对较低的位强ECC系统不会错误地操纵用户数据。这样的散列完整性检查提供了对错误校正的用户数据的有效的，鲁棒的检测，该错误纠正的用户数据是由于校正之外的错误而导致的ECC系统的强度。

14. 发明授权

US07707481B2 System and method for efficient uncorrectable error detection in flash memory 有权
标题翻译：闪存中有效的不可校正错误检测的系统和方法
公开(公告)号：US07707481B2
公开(公告)日：2010-04-27
申请号：US11436171
申请日：2006-05-16
申请人： Wesley A. Kirschner , Robert W. Sisson , John A. Hurd , Gary S. Jacobson
发明人： Wesley A. Kirschner , Robert W. Sisson , John A. Hurd , Gary S. Jacobson
IPC分类号： G11C29/00
CPC分类号： G06F11/1012
摘要： A system and method for efficient uncorrectable error detection in flash memory is described. A microcontroller including a non-volatile flash memory utilizes an Error Correction Code (ECC) having a certain error detection and correction bit strength. The user data is first processed by a hash function and hash data is stored with the user data. Then, the user data and hash data are processed by the ECC system. In detection, the hash ensures that a relatively low bit-strength ECC system did not incorrectly manipulate the user data. Such a hash integrity check provides an efficient, robust detection of incorrectly corrected user data resulting from errors beyond the correction but strength of the ECC system utilized.
摘要翻译：描述了一种用于闪存中有效的不可校正错误检测的系统和方法。包括非易失性闪速存储器的微控制器利用具有一定的错误检测和校正位强度的纠错码（ECC）。用户数据首先通过散列函数处理，散列数据与用户数据一起存储。然后，ECC系统处理用户数据和散列数据。在检测中，散列确保相对较低的位强ECC系统不会错误地操纵用户数据。这样的散列完整性检查提供了对错误校正的用户数据的有效的，鲁棒的检测，该错误纠正的用户数据是由于校正之外的错误而导致的ECC系统的强度。

15. 发明授权

US08176567B2 Apparatus and method to limit access to selected sub-program in a software system 有权
标题翻译：限制对软件系统中所选子程序的访问的装置和方法
公开(公告)号：US08176567B2
公开(公告)日：2012-05-08
申请号：US11317463
申请日：2005-12-22
申请人： Wesley A. Kirschner , Gary S. Jacobson , John A. Hurd , Walter J. Baker
发明人： Wesley A. Kirschner , Gary S. Jacobson , John A. Hurd , Walter J. Baker
IPC分类号： G06F7/04 , G06F17/30 , H04N7/16
CPC分类号： G06F21/629
摘要： A method includes receiving at a sub-program a request from an external entity the request comprising at least one parameter and a return address, utilizing the return address and an address list associated with the sub-program to authenticate the external entity, and processing the request if the external entity is authenticated.
摘要翻译：一种方法包括在子程序中从外部实体接收包含至少一个参数和返回地址的请求，该请求利用返回地址和与子程序相关联的地址列表来认证外部实体，并且处理请求外部实体进行身份验证。

16. 发明授权

US08010873B2 Systems and methods for efficient uncorrectable error detection in flash memory 有权
标题翻译：闪存中有效的不可校正错误检测的系统和方法
公开(公告)号：US08010873B2
公开(公告)日：2011-08-30
申请号：US12763563
申请日：2010-04-20
申请人： Wesley A. Kirschner , Robert W. Sisson , John A. Hurd , Gary S. Jacobson
发明人： Wesley A. Kirschner , Robert W. Sisson , John A. Hurd , Gary S. Jacobson
IPC分类号： G11C29/00
CPC分类号： G06F11/1012
摘要： A system and method for efficient uncorrectable error detection in flash memory is described. A microcontroller including a non-volatile flash memory utilizes an Error Correction Code (ECC) having a certain error detection and correction bit strength. The user data is first processed by a hash function and hash data is stored with the user data. Then, the user data and hash data are processed by the ECC system. In detection, the hash ensures that a relatively low bit-strength ECC system did not incorrectly manipulate the user data. Such a hash integrity check provides an efficient, robust detection of incorrectly corrected user data resulting from errors beyond the correction but strength of the ECC system utilized.
摘要翻译：描述了一种用于闪存中有效的不可校正错误检测的系统和方法。包括非易失性闪速存储器的微控制器利用具有一定的错误检测和校正位强度的纠错码（ECC）。用户数据首先通过散列函数处理，散列数据与用户数据一起存储。然后，ECC系统处理用户数据和散列数据。在检测中，散列确保相对较低的位强ECC系统不会错误地操纵用户数据。这样的散列完整性检查提供了对错误校正的用户数据的有效的，鲁棒的检测，该错误纠正的用户数据是由于校正之外的错误而导致的ECC系统的强

17. 发明申请

US20070283224A1 System and method for efficient uncorrectable error detection in flash memory 有权
标题翻译：闪存中有效的不可校正错误检测的系统和方法
公开(公告)号：US20070283224A1
公开(公告)日：2007-12-06
申请号：US11436171
申请日：2006-05-16
申请人： Wesley A. Kirschner , Robert W. Sisson , John A. Hurd , Gary S. Jacobson
发明人： Wesley A. Kirschner , Robert W. Sisson , John A. Hurd , Gary S. Jacobson
IPC分类号： G11C29/00
CPC分类号： G06F11/1012
摘要： A system and method for efficient uncorrectable error detection in flash memory is described. A microcontroller including a non-volatile flash memory utilizes an Error Correction Code (ECC) having a certain error detection and correction bit strength. The user data is first processed by a hash function and hash data is stored with the user data. Then, the user data and hash data are processed by the ECC system. In detection, the hash ensures that a relatively low bit-strength ECC system did not incorrectly manipulate the user data. Such a hash integrity check provides an efficient, robust detection of incorrectly corrected user data resulting from errors beyond the correction but strength of the ECC system utilized.
摘要翻译：描述了一种用于闪存中有效的不可校正错误检测的系统和方法。包括非易失性闪速存储器的微控制器利用具有一定的错误检测和校正位强度的纠错码（ECC）。用户数据首先通过散列函数处理，散列数据与用户数据一起存储。然后，ECC系统处理用户数据和散列数据。在检测中，散列确保相对较低的位强ECC系统不会错误地操纵用户数据。这样的散列完整性检查提供了对错误校正的用户数据的有效的，鲁棒的检测，该错误纠正的用户数据是由于校正之外的错误而导致的ECC系统的强度。

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