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11. 发明申请

WO2010058247A1 FREQUENCY MULTIPLIER CIRCUIT 审中-公开
标题翻译：频率乘法器电路
公开(公告)号：WO2010058247A1
公开(公告)日：2010-05-27
申请号：PCT/IB2008/054919
申请日：2008-11-24
申请人： FREESCALE SEMICONDUCTOR, INC. , TROTTA, Saverio , DEHLINK, Bernhard
发明人： TROTTA, Saverio , DEHLINK, Bernhard
IPC分类号： H03B19/14 , H03D7/16
CPC分类号： H03B19/14 , H03D7/12
摘要： A frequency multiplier circuit (200), comprising a first stage including a first differential pair of amplifier elements (Q1, Q2) having respective current conduction paths connected in parallel between first and second nodes (202, 204) and respective control terminals connected to receive input signals of opposite polarity at an input frequency (ωRF) in the radio frequency range, the first and second nodes (202, 204) being connected to respective bias voltage supply terminals (206, 208) through first and second impedances (ZL1, ZL2) respectively so that current flowing differentially in the current conduction paths of the first differential pair of amplifier elements (Q1, Q2) produces a voltage difference across the first and second nodes (202, 204) at a frequency which contains a harmonic (2ωRF) of the input frequency, and a second stage including a second differential pair of amplifier elements (Q3, Q4) coupled at the harmonic of the input frequency with the first and second nodes (202, 204) to amplify differentially the voltage difference and produce an output signal at the harmonic (2ωRF) of the input frequency. Radio frequency connections apply the voltage difference across the first and second nodes (202, 204) at the frequency of the harmonic to the second differential pair of amplifier elements (Q3, Q4) and block direct current, and separate direct current connections connect respectively the first differential pair of amplifier elements (Q1, Q2) and the second differential pair of amplifier elements (Q3, Q4) across the bias voltage supply terminals (206, 208).
摘要翻译：一种倍频器电路（200），包括：第一级，包括具有在第一和第二节点（202,204）之间并联连接的各自的电流传导路径的第一差分放大器元件（Q1，Q2）对，以及连接到接收在射频范围内的输入频率（ΔRF）具有相反极性的输入信号，第一和第二节点（202,204）通过第一和第二阻抗（ZL1，...）连接到相应的偏置电压提供端子（206,208） ZL2），使得在第一差分放大器元件（Q1，Q2）对的电流传导路径中流动的电流在包含谐波（2）的频率下在第一和第二节点（202,204）之间产生电压差（RF））和第二级，其包括以输入频率的谐波与第一和第二节点耦合的放大器元件（Q3，Q4）的第二差分对（ 202,204）以差分地放大电压差并在输入频率的谐波（2πRF）下产生输出信号。射频连接将谐波频率处的第一和第二节点（202,204）之间的电压差施加到第二差分放大器元件对（Q3，Q4）并阻塞直流电流，分离的直流连接分别连接放大器元件（Q1，Q2）的第一差分对和偏置电压源端子（206,208）之间的第二差分放大器元件（Q3，Q4）对。

12. 发明申请

WO2012098437A1 PHASED-ARRAY RECEIVER, RADAR SYSTEM AND VEHICLE 审中-公开
标题翻译：同步阵列接收机，雷达系统和车辆
公开(公告)号：WO2012098437A1
公开(公告)日：2012-07-26
申请号：PCT/IB2011/050278
申请日：2011-01-21
申请人： FREESCALE SEMICONDUCTOR, INC. , DEHLINK, Bernhard , TROTTA, Saverio
发明人： DEHLINK, Bernhard , TROTTA, Saverio
IPC分类号： G01S13/88 , G01S7/03
CPC分类号： G01S7/03 , G01S3/043 , G01S7/032 , G01S13/931 , G01S2007/2886 , G01S2007/358 , H01Q1/3233 , H01Q3/26
摘要： A phased-array receiver (600) comprises a plurality of analog beamforming receive channels (602), each comprising an antenna element (610) arranged to receive a radio frequency signal and a channel output (628) arranged to provide an analog channel output signal. At least one of the plurality of analog beamforming receive channels comprises an in-phase downconversion mixing circuit (614) connected to the antenna element and a local oscillator source (616) and arranged to provide a downconverted in-phase signal to a phase rotation circuit (612), and a quadrature downconversion mixing circuit (620) connected to the antenna element and the local oscillator source and arranged to provide a downconverted quadrature signal to the phase rotation circuit. The phase rotation circuit is arranged to provide to the channel output a phase-shifted analog output signal generated from the downconverted in-phase signal and the downconverted quadrature signal.
摘要翻译：相控阵接收机（600）包括多个模拟波束成形接收信道（602），每个接收信道包括布置成接收射频信号的天线元件（610）和布置成提供模拟信道输出信号的信道输出（628）。多个模拟波束成形接收通道中的至少一个包括连接到天线元件的同相下变频混合电路（614）和本地振荡器源（616），并且被布置成向相位旋转电路提供下变频的同相信号（612）和连接到天线元件和本地振荡器源的正交下变频混频电路（620），并被布置成向相位旋转电路提供下变频正交信号。相位旋转电路被布置为向通道输出提供从下变频同相信号和下变频正交信号产生的相移模拟输出信号。

13. 发明申请

WO2010010425A1 HETERODYNE RECEIVER 审中-公开
标题翻译：异位接收器
公开(公告)号：WO2010010425A1
公开(公告)日：2010-01-28
申请号：PCT/IB2008/053000
申请日：2008-07-25
申请人： FREESCALE SEMICONDUCTOR, INC. , TROTTA, Saverio , REUTER, Ralf
发明人： TROTTA, Saverio , REUTER, Ralf
IPC分类号： H03D7/16
CPC分类号： H03D7/163
摘要： A down-conversion module (300, 400) for a heterodyne receiver comprises a first mixer circuit (Mixer 1 ), a second mixer circuit (Mixer 2) and an interconnection (302). The first mixer circuit includes first and second differential control terminals (304, 306) and is arranged to produce a first down-converted differential voltage signal (IF 1 ) at a first down-converted frequency ( fI F 1 ) as a function of a first RF differential input signal applied to the first differential control terminals (304) and of a first RF differential reference frequency signal (LO) applied to the second differential control terminals (306). The second mixer circuit includes two differential pairs (318, 320) of second amplifier elements and the second amplifier elements comprise second differential control terminals and cross-connected pairs of second amplifier output paths for producing a second down-converted differential voltage signal (IF 2 ) at a second down-converted frequency as a function of the first down-converted differential voltage signal (IF 1 ) and of a second RF differential reference frequency signal applied to the second differential control terminals. The interconnection (302) includes transmission line elements (Z L1 , Z L2 ) and is arranged to apply a differential current signal which is a function of the first down-converted differential voltage signal (IF 1 ) to differential input terminals of the second mixer circuit common to respective pairs (318, 320) of the second amplifier elements.
摘要翻译：用于外差接收机的下变频模块（300,400）包括第一混频器电路（混频器1），第二混频器电路（混频器2）和互连（302）。第一混频器电路包括第一和第二差分控制端子（304,306），并且被布置成作为第一RF差分的函数以第一下变频频率（fIF1）产生第一下变频差分电压信号（IF1）施加到第一差分控制端子（304）的输入信号和施加到第二差分控制端子（306）的第一RF差分参考频率信号（LO）。第二混频器电路包括第二放大器元件的两个差分对（318,320），并且第二放大器元件包括用于产生第二下变频差分电压信号（IF2）的第二差分控制端子和交叉连接的第二放大器输出路径对，以第二下变频频率作为第一下变频差分电压信号（IF1）的函数和施加到第二差分控制端的第二RF差分参考频率信号的函数。互连（302）包括传输线路元件（ZL1，ZL2），并且被布置成将作为第一下变频差分电压信号（IF1）的函数的差分电流信号施加到第二混频器电路的公共的差分输入端子第二放大器元件的相应对（318,320）。

14. 发明申请

WO2009138816A1 OSCILLATOR CIRCUIT 审中-公开
标题翻译：振荡器电路
公开(公告)号：WO2009138816A1
公开(公告)日：2009-11-19
申请号：PCT/IB2008/051881
申请日：2008-05-13
申请人： FREESCALE SEMICONDUCTOR, INC. , LI, Hao , TROTTA, Saverio
发明人： LI, Hao , TROTTA, Saverio
IPC分类号： H03B5/12
CPC分类号： H03B5/1231 , H03B5/1218 , H03B5/1243
摘要： The invention relates to an oscillator circuit (10) comprising: a VCO core (8) having an output terminal (56) for providing an oscillatory output signal thereat and having a supply terminal (60) for receiving a supply voltage from a voltage supply (28), a subsequent circuit (6) coupled to the VCO core's output terminal (56) and having a supply terminal (72) for receiving a supply voltage from the voltage supply (28). According to the invention, a decoupling member (82, 83) is arranged between the VCO core's supply terminal (60) and the subsequent circuit's supply terminal (72) for preventing high-frequency signals generated by the subsequent circuit at its supply terminal (72) from entering the VCO core. The decoupling member (82, 83) may comprise a transmission line the length of which is one quarter wavelength associated with a second-harmonic oscillation.
摘要翻译：本发明涉及一种振荡器电路（10），包括：VCO核心（8），其具有用于在其上提供振荡输出信号的输出端子（56），并具有用于从电压源接收电源电压的电源端子（60） 28），耦合到VCO核心的输出端子（56）并且具有用于从电压源（28）接收电源电压的电源端子（72）的后续电路（6）。根据本发明，在VCO核心的供电端子（60）和后续电路的供电端子（72）之间布置有去耦构件（82,83），用于防止在其供电端子（72）处由后续电路产生的高频信号）进入VCO核心。解耦构件（82,83）可以包括其长度是与二次谐波振荡相关联的四分之一波长的传输线。

15. 发明公开

EP2699936A1 ANTENNA DEVICE, AMPLIFIER AND RECEIVER CIRCUIT, AND RADAR CIRCUIT 有权转让
标题翻译：天线装置，放大器和接收器电路以及雷达电路
公开(公告)号：EP2699936A1
公开(公告)日：2014-02-26
申请号：EP11863983.0
申请日：2011-04-20
申请人： Freescale Semiconductor, Inc.
发明人： TROTTA, Saverio
IPC分类号： G01S7/03
CPC分类号： H01Q3/34 , G01S7/032 , G01S13/426 , G01S13/931 , G01S2013/9375 , H01Q1/3233 , H01Q3/00 , H01Q21/065
摘要： An antenna device (1i) comprises a first chain (301 ) of at least two antenna components (31i), wherein each of the antenna components (31i) comprises a transmit antenna (2i) having a line of antenna patches (92) for emitting radar waves (22i); and a receive antenna (4i) having a line of antenna patches (92) for receiving radar response waves (320); wherein the line of antenna patches (92) of the receive antenna (4i) is aligned with the line of antenna patches (92) of the transmit antenna (2i). An amplifier and receiver circuit (3i) for amplifying radar signals (20) and for receiving radar response signals (320), the amplifier and receiver circuit (3i) comprises a phase shifter (323) for shifting a phase of the radar signals (20) to be amplified and for synchronously shifting the received radar response signals (320). A radar circuit (310) comprises a first chain (301 ) of at least two radar components (39i), wherein each of the radar components (39i) comprises: an amplifier and receiver circuit (3i) as described above; and a transmit antenna (2i) for emitting radar waves (20); and a receive antenna (4i) for receiving radar response waves (320).
摘要翻译：一种天线装置（1i），包括至少两个天线部件（31i）的第一链（301），其中每个天线部件（31i）包括具有一行天线贴片（92）的发射天线（2i）雷达波（22i）; 和具有用于接收雷达响应波（320）的一排天线贴片（92）的接收天线（4i）; 其中接收天线（4i）的天线贴片线（92）与发射天线（2i）的天线贴片线（92）对齐。用于放大雷达信号（20）和接收雷达响应信号（320）的放大器和接收器电路（3i），放大器和接收器电路（3i）包括移相器（323），用于移位雷达信号）被放大并且用于同步地移动所接收的雷达响应信号（320）。雷达电路（310）包括至少两个雷达组件（39i）的第一链（301），其中每个雷达组件（39i）包括：如上所述的放大器和接收器电路（3i）和发射雷达波（20）的发射天线（2i）; 和用于接收雷达响应波的接收天线（4i）（320）。

16. 发明公开

EP2599220A2 LATCH CIRCUIT, FLIP-FLOP CIRCUIT AND FREQUENCY DIVIDER 审中-公开
标题翻译：门锁回路，翻转和分频器
公开(公告)号：EP2599220A2
公开(公告)日：2013-06-05
申请号：EP10855252.2
申请日：2010-07-27
申请人： Freescale Semiconductor, Inc.
发明人： TROTTA, Saverio
IPC分类号： H03K3/00 , H03K21/00
CPC分类号： H03K3/00 , H03B19/14 , H03K3/011 , H03K3/2885
摘要： The invention pertains to a latch circuit comprising a sensing arrangement with one or more sensing transistors adapted to sense an input signal and to provide a first signal based on the sensed input signal, and a sensing arrangement switch device connected or connectable to a first current source, the sensing arrangement switch device being adapted to switch on or off a current to the one or more sensing transistors based on a first clock signal. The latch circuit further comprises a storage arrangement with one or more storage transistors adapted to store the first signal and to provide a second signal based on the first signal, and a storage arrangement switching device connected or connectable to the first current source or a second current source, the storage arrangement switching device being adapted to switch on or off a current to the storage transistors based on a second clock signal, as well as a tuning arrangement connected or connectable to a temperature sensor, the tuning arrangement being adapted to bias a current of the sensing arrangement and/or the storage arrangement based on a temperature signal provided by the temperature sensor. The invention also pertains to a flip-flop circuit with two or more latch circuits and a frequency divider comprising at least one latch circuit as described.

17. 发明公开

EP2666033A1 PHASED-ARRAY RECEIVER, RADAR SYSTEM AND VEHICLE 审中-公开
标题翻译：相受控接收机，雷达系统和车辆
公开(公告)号：EP2666033A1
公开(公告)日：2013-11-27
申请号：EP11856370.9
申请日：2011-01-21
申请人： Freescale Semiconductor, Inc.
发明人： DEHLINK, Bernhard , TROTTA, Saverio
IPC分类号： G01S13/88 , G01S7/03
CPC分类号： G01S7/03 , G01S3/043 , G01S7/032 , G01S13/931 , G01S2007/2886 , G01S2007/358 , H01Q1/3233 , H01Q3/26
摘要： A phased-array receiver (600) comprises a plurality of analog beamforming receive channels (602), each comprising an antenna element (610) arranged to receive a radio frequency signal and a channel output (628) arranged to provide an analog channel output signal. At least one of the plurality of analog beamforming receive channels comprises an in-phase downconversion mixing circuit (614) connected to the antenna element and a local oscillator source (616) and arranged to provide a downconverted in-phase signal to a phase rotation circuit (612), and a quadrature downconversion mixing circuit (620) connected to the antenna element and the local oscillator source and arranged to provide a downconverted quadrature signal to the phase rotation circuit. The phase rotation circuit is arranged to provide to the channel output a phase-shifted analog output signal generated from the downconverted in-phase signal and the downconverted quadrature signal.

18. 发明公开

EP2454832A1 INTEGRATED CIRCUIT, TRANSCEIVER AND METHOD FOR LEAKAGE CANCELLATION IN A RECEIVE PATH 有权转让
标题翻译：集成电路，用于在接收路径减损收发器和方法
公开(公告)号：EP2454832A1
公开(公告)日：2012-05-23
申请号：EP09847274.9
申请日：2009-07-16
申请人： Freescale Semiconductor, Inc.
发明人： TROTTA, Saverio , DEHLINK, Bernhard , REUTER, Ralf
IPC分类号： H04B15/00 , H04B1/40
CPC分类号： H04B1/525 , G01S7/023
摘要： An integrated circuit for cancelling a radio frequency transmit leakage signal comprises: a transmitter portion comprising at least one amplifier stage for transmitting a radio frequency signal to an antenna port; and a first coupler arranged to operably couple the transmitter portion, the antenna port and a receiver portion. The receiver portion is arranged to receive a first composite signal that comprises a received radio frequency signal from the antenna port and the transmit leakage signal. The receiver portion comprises: a first down-conversion circuit arranged to receive the first composite signal and a local oscillator signal such that the first down-conversion circuit outputs a down-converted composite signal at a first intermediate frequency signal; and a second coupler arranged to receive the down-converted first composite signal at the first intermediate frequency signal and a phase shifted version of the local oscillator signal such that the phase shifted version of the local oscillator signal is arranged to cancel at least a portion of the transmit leakage signal from the down-converted first composite signal.
摘要翻译：用于抵消的射频发射信号泄漏的集成电路包括：一个发射器部分，其包括至少一个放大级在天线端口发送无线电频率信号; 和第一耦合器设置成可操作地联接所述发射器部分，所述天线端口和接收器部分。接收器部分被布置成接收一个第一复合信号的确包括来自所述天线端口接收到的无线电频率信号和发射泄漏信号。接收器部分包括：布置在第一下变频电路，用于接收所述第一复合信号，并检查做的第一下变频电路输出在第一中频信号下变频合成信号的本地振荡器信号; 和布置在所述第一中间频率信号，并检查了本地振荡器信号的相移版本以接收所述下变频第一复合信号的第二耦合器做所述本机振荡器信号的相移版本被设置为取消的至少一部分从经下变频的第一复合信号的发射泄漏信号。

19. 发明公开

EP2609680A1 PUSH-PUSH OSCILLATOR CIRCUIT 审中-公开
标题翻译：双推振荡器电路
公开(公告)号：EP2609680A1
公开(公告)日：2013-07-03
申请号：EP10856352.9
申请日：2010-08-26
申请人： Freescale Semiconductor, Inc.
发明人： YIN, Yi , LI, Hao , TROTTA, Saverio
IPC分类号： H03B5/18 , H01P7/08 , H03F3/45
CPC分类号： H02M7/53835 , H03B5/1209 , H03B5/1218 , H03B5/1231 , H03B5/124 , H03B5/1847 , H03B25/00 , H03B2200/007
摘要： The invention pertains to a push-push oscillator circuit (10) with a first oscillation branch with a first active device (12) and a first tank (16, 20) adapted to provide a signal having a fundamental frequency f
0 , a second oscillation branch with a second active device (14) and a second tank (18, 22) symmetrical to the first oscillation branch and adapted to provide a signal having the fundamental frequency f
0 . Output branches (24, 28, 50, 60) are coupled to the first oscillation branch and the second oscillation branch to provide signals having the second harmonic frequency 2f0 of the fundamental signal based on the signals having the fundamental frequency f
0 and/or to provide signals having the fundamental frequency f
0 . The push-push oscillator circuit (10) further comprises at least one terminal branch (36, 58, 68, 78) with a terminal (42, 82, 94, 100) adapted to provide a component of a differential signal having the second harmonic frequency 2f0 or the fundamental frequency f
0 . The at least one terminal branch (36, 58, 68, 78) comprises a RF stub (44, 84) comprising a quarter-wavelength transmission line (46, 86, 102, 106) and a corresponding capacitor (48, 88, 104, 108) for a signal having the second harmonic frequency 2f
0 or the fundamental frequency f
0 . The invention also pertains to a push-push oscillator circuit (10) having output branches (24, 28, 50, 60) coupled to the first oscillation branch and the second oscillation branch to provide signals having the fundamental frequency f
0 . One of the output branches (50) comprises two coupling inductors (52, 54) and a first fundamental frequency branch (58) having a first fundamental frequency terminal (94), the first fundamental frequency branch (58) being coupled in series with one of the coupling inductors (54), the two coupling inductors being coupled to each other in series via a first connection point. Another one of the output branches (60) comprises two coupling inductors (62, 64) and a second fundamental frequency branch (68) with a second fundamental frequency terminal (100), the second fundamental frequency branch (68) being coupled in series to one of the coupling inductors (54) of this output branch (6), and the two coupling inductors (62, 64) of this output branch (60) being coupled to each other in series via a second connection point. The push-push-oscillator circuit (10) is adapted to provide a differential signal having the fundamental frequency f
0 at the first and second fundamental frequency terminals.

20. 发明公开

EP2839580A1 A DYNAMIC FREQUENCY DIVIDER CIRCUIT 审中-公开
标题翻译：动态分频电路
公开(公告)号：EP2839580A1
公开(公告)日：2015-02-25
申请号：EP12874652.6
申请日：2012-04-20
申请人： Freescale Semiconductor, Inc.
发明人： GHAZINOUR, Akbar , TROTTA, Saverio
IPC分类号： H03F3/45 , H03K23/00
CPC分类号： H03B19/14 , H03F1/0205 , H03F3/45085 , H03F3/60 , H03F3/602 , H03F2200/423 , H03F2200/513 , H03F2200/543 , H03F2203/45612 , H03F2203/45652 , H03F2203/45668 , H03F2203/45702 , H03K23/667 , H03L7/00
摘要： The invention relates to a Frequency Divider Circuit (300) for dividing an input RF signal (312) to a frequency divided RF signal (316). The circuit comprises a RF pair (310), a switching-quad pair (306) coupled in series with a transimpedance amplifier (302) and a double pair of emitter followers (318). The circuit (300) comprises coupling elements Rfc1.. Rfc 4, Z1, Z2, Z7, Z8 for providing first DC paths to first amplifier paths of the RF pair and for providing second DC paths to second amplifier paths of the series arrangement of the switching-quad pair (306) and the transimpedance amplifier (302). The first DC paths are independent of the second DC paths. RF connections are provided to couple the first and the second amplifier paths for transferring a signal from the first amplifier paths to the second amplifier paths.

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