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11. 发明申请

US20080145988A1 Method for Fabricating Semiconductor Device 失效
标题翻译：半导体器件制造方法
公开(公告)号：US20080145988A1
公开(公告)日：2008-06-19
申请号：US11863442
申请日：2007-09-28
申请人： DONG KI JEON , Han Choon Lee
发明人： DONG KI JEON , Han Choon Lee
IPC分类号： H01L21/44 , H01L21/336
CPC分类号： H01L21/28052 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： A method for fabricating a semiconductor device is provided. A nickel layer is deposited on a semiconductor substrate and plasma-processed. Rapid thermal processing is performed on the plasma-processed nickel layer to form a nickel silicide layer. The portion of the nickel layer that has not reacted with silicon is then removed.
摘要翻译：提供一种制造半导体器件的方法。将镍层沉积在半导体衬底上并进行等离子体处理。在等离子体处理的镍层上进行快速热处理以形成硅化镍层。然后除去未与硅反应的镍层的部分。

12. 发明申请

US20080057700A1 Apparatus for manufacturing semiconductor device and method for manufacturing semiconductor device using the same 失效
标题翻译：用于制造半导体器件的装置及使用其的半导体器件的制造方法
公开(公告)号：US20080057700A1
公开(公告)日：2008-03-06
申请号：US11895324
申请日：2007-08-24
申请人： Han Choon Lee
发明人： Han Choon Lee
IPC分类号： H01L21/4763 , C23C16/00
CPC分类号： C23C16/54 , C23C14/568 , C23C16/34 , H01L21/28562 , H01L21/76805 , H01L21/76814 , H01L21/76843 , H01L21/76844 , H01L21/76846 , H01L21/76856 , H01L21/76862
摘要： Disclosed are an apparatus and a method for manufacturing a semiconductor device. The apparatus comprises a transfer chamber for transferring a substrate, a first process chamber connected to the transfer chamber configured to form a TiSiN layer on the substrate, a second process chamber connected to the transfer chamber configured to form a tantalum layer on the TiSiN layer, and a third process chamber connected to the transfer chamber configured to form a copper seed layer on the tantalum layer. After forming the TiSiN layer, a portion of the TiSiN layer in contact with the lower metal interconnection is etched, the tantalum layer is formed on the TiSiN layer in contact with the exposed lower metal interconnection, the copper seed layer is formed on the tantalum layer, and then the copper interconnection is formed on the copper seed layer. In this way, the copper interconnection can be efficiently formed.
摘要翻译：公开了一种用于制造半导体器件的装置和方法。该装置包括用于传送基板的传送室，连接到传送室的第一处理室，被配置为在基板上形成TiSiN层，连接到传送室的第二处理室，被配置为在TiSiN层上形成钽层，以及连接到所述传送室的第三处理室，被配置为在所述钽层上形成铜籽晶层。在形成TiSiN层之后，蚀刻与下金属互连接触的TiSiN层的一部分，在暴露的下金属互连接触的TiSiN层上形成钽层，在钽层上形成铜籽晶层然后在铜籽晶层上形成铜互连。以这种方式，可以有效地形成铜互连。

13. 发明授权

US07037836B2 Method of manufacturing a semiconductor device without oxidized copper layer 失效
标题翻译：制造没有氧化铜层的半导体器件的方法
公开(公告)号：US07037836B2
公开(公告)日：2006-05-02
申请号：US10733276
申请日：2003-12-12
申请人： Han Choon Lee
发明人： Han Choon Lee
IPC分类号： H01L21/44
CPC分类号： H01L21/76877 , H01L21/76814 , H01L21/76843 , H01L21/76862 , H01L21/76864 , H01L21/76873
摘要： A semiconductor device which effectively reduces copper oxide layers on copper conductive lines is disclosed. The method includes forming a first insulating layer on a semiconductor substrate; forming a first conductive line by depositing a conductive material on the first insulating layer and selectively patterning the conductive material. A second insulating layer is deposited on top of the substrate including on the first conductive line. A via hole is formed by selectively patterning the second insulating layer to expose a certain portion of the first conductive line. A natural oxide layer is removed by plasma-processing the natural oxide layer using H2+CO gas.
摘要翻译：公开了一种半导体器件，其有效地减少铜导电线上的氧化铜层。该方法包括在半导体衬底上形成第一绝缘层; 通过在第一绝缘层上沉积导电材料并选择性地图案化导电材料来形成第一导电线。第二绝缘层沉积在包括在第一导电线上的衬底的顶部上。通过选择性地图案化第二绝缘层以暴露第一导电线的某一部分来形成通孔。通过使用H + 2 + CO气体等离子体处理天然氧化物层来去除天然氧化物层。

14. 发明申请

US20130314838A1 Capacitive Device and Method for Fabricating the Same 有权
标题翻译：电容器件及其制造方法
公开(公告)号：US20130314838A1
公开(公告)日：2013-11-28
申请号：US13560318
申请日：2012-07-27
申请人： Jong Taek HWANG , Han Choon Lee , Oh Jin Jung , Jin Youn Cho
发明人： Jong Taek HWANG , Han Choon Lee , Oh Jin Jung , Jin Youn Cho
IPC分类号： H01G4/30 , H01G7/00
CPC分类号： H01G4/30 , H01G4/005 , H01G4/228 , H01G4/385 , H01G4/40 , Y10T29/435
摘要： A capacitive device includes a first capacitor including a first wiring layer, a first dielectric film, a first conductive layer, a first insulating layer on the first capacitor, a second capacitor on the first insulating layer including a second conductive layer, a second dielectric film, and a third conductive layer, a second insulating layer on the second capacitor, a second wiring layer on the second insulating layer including first and second connection wires, a first via connecting the first wiring layer to the second conductive layer, a second via connecting the third conductive layer to the second wiring layer, a third via connecting the first connection wire to the first conductive layer, and a fourth via connecting the second connection wire to the first wiring layer.
摘要翻译：电容式器件包括：第一电容器，包括第一布线层，第一电介质膜，第一导电层，第一电容器上的第一绝缘层，第一绝缘层上的第二电容器，第二导电层，第二电介质膜以及第三导电层，第二电容器上的第二绝缘层，第二绝缘层上的包括第一和第二连接线的第二布线层，将第一布线层连接到第二导电层的第一通孔，向第二布线层的第三导电层，将第一连接线连接到第一导电层的第三通孔和将第二连接线连接到第一布线层的第四通孔。

15. 发明授权

US07897425B2 Image sensor and method for fabricating the same 失效
标题翻译：图像传感器及其制造方法
公开(公告)号：US07897425B2
公开(公告)日：2011-03-01
申请号：US12145441
申请日：2008-06-24
申请人： In Cheol Baek , Kyung Min Park , Sun Chan Lee , Han Choon Lee
发明人： In Cheol Baek , Kyung Min Park , Sun Chan Lee , Han Choon Lee
IPC分类号： H01L27/14 , H01L21/311
CPC分类号： H01L27/14609 , H01L27/14689
摘要： A method for fabricating an image sensor. The method may include forming a gate, a photo diode, and a floating diffusion region on a pixel region of a semiconductor substrate; forming an oxide film on the pixel region and on an edge region of the semiconductor substrate; forming a sacrificial oxide layer by etching the oxide film using a first photoresist pattern as a mask; forming a metal layer on the first photoresist pattern, the gate, and the floating diffusion region; forming a salicide layer on the gate and the floating diffusion region; etching a remaining non-salicided portion of the metal layer, the first photoresist pattern, and the sacrificial oxide layer; forming an interlayer insulating film on the semiconductor substrate and planarizing the interlayer insulating film; and forming contact holes and forming an edge open part by etching the interlayer insulating film using a second photoresist pattern as a mask.
摘要翻译：一种图像传感器的制造方法。该方法可以包括在半导体衬底的像素区域上形成栅极，光电二极管和浮动扩散区域; 在所述半导体衬底的像素区域和边缘区域上形成氧化物膜; 通过使用第一光致抗蚀剂图案作为掩模蚀刻氧化膜来形成牺牲氧化物层; 在第一光致抗蚀剂图案，栅极和浮动扩散区上形成金属层; 在栅极和浮动扩散区上形成硅化物层; 蚀刻金属层，第一光致抗蚀剂图案和牺牲氧化物层的剩余非水洗部分; 在所述半导体衬底上形成层间绝缘膜并使所述层间绝缘膜平坦化; 并且通过使用第二光致抗蚀剂图案作为掩模蚀刻层间绝缘膜来形成接触孔并形成边缘开口部。

16. 发明授权

US07666762B2 Method for fabricating semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US07666762B2
公开(公告)日：2010-02-23
申请号：US11863442
申请日：2007-09-28
申请人： Dong Ki Jeon , Han Choon Lee
发明人： Dong Ki Jeon , Han Choon Lee
IPC分类号： H01L21/322 , H01L21/44
CPC分类号： H01L21/28052 , H01L29/665 , H01L29/6659 , H01L29/7833
摘要： A method for fabricating a semiconductor device is provided. A nickel layer is deposited on a semiconductor substrate and plasma-processed. Rapid thermal processing is performed on the plasma-processed nickel layer to form a nickel silicide layer. The portion of the nickel layer that has not reacted with silicon is then removed.
摘要翻译：提供一种制造半导体器件的方法。将镍层沉积在半导体衬底上并进行等离子体处理。在等离子体处理的镍层上进行快速热处理以形成硅化镍层。然后除去未与硅反应的镍层的部分。

17. 发明申请

US20070152333A1 Metal Interconnection of Semiconductor Device and Method of Fabricating the Same 审中-公开
标题翻译：半导体器件的金属互连及其制造方法
公开(公告)号：US20070152333A1
公开(公告)日：2007-07-05
申请号：US11616044
申请日：2006-12-26
申请人： Han Choon Lee
发明人： Han Choon Lee
IPC分类号： H01L23/52 , H01L21/4763
CPC分类号： H01L21/76846 , H01L21/28562 , H01L21/76856 , H01L23/5226 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： Disclosed are a metal interconnection of a semiconductor device and a method of fabricating the same. The metal interconnection includes an interlayer dielectric layer formed having a trench on a semiconductor layer, a first TaN layer formed at an inner wall of the trench, a second TaN layer formed on the first TaN layer, and a conductive material filling the trench, wherein TaN of the first TaN layer has a grain size smaller than a grain size of TaN of the second TaN layer.
摘要翻译：公开了半导体器件的金属互连及其制造方法。金属互连包括形成在半导体层上的沟槽的层间电介质层，形成在沟槽的内壁的第一TaN层，形成在第一TaN层上的第二TaN层和填充沟槽的导电材料，其中第一TaN层的TaN的粒径小于第二TaN层的TaN的粒径。

18. 发明申请

US20070141833A1 Method for manufacturing semiconductor device 失效
标题翻译：制造半导体器件的方法
公开(公告)号：US20070141833A1
公开(公告)日：2007-06-21
申请号：US11604921
申请日：2006-11-27
申请人： Sang Chul Kim , Han Choon Lee
发明人： Sang Chul Kim , Han Choon Lee
IPC分类号： H01L21/4763
CPC分类号： H01L21/76886 , H01L21/02074
摘要： Provided is a method for manufacturing a semiconductor device. An insulation layer is formed on a bottom structure of a semiconductor substrate. Then, a trench and a via hole are formed by selectively etching the insulation layer, and a copper layer is deposited to fill the via hole and the trench. Next, a copper line is formed by a CMP (chemical mechanical polishing) process to planarize the copper layer, and a plasma process is performed to form a plasma-treated surface layer of the semiconductor substrate. The plasma-treated surface layer is then removed.
摘要翻译：提供一种半导体器件的制造方法。绝缘层形成在半导体衬底的底部结构上。然后，通过选择性地蚀刻绝缘层形成沟槽和通孔，并且沉积铜层以填充通孔和沟槽。接下来，通过CMP（化学机械抛光）工艺形成铜线以使铜层平坦化，并且进行等离子体处理以形成半导体衬底的等离子体处理的表面层。然后除去等离子体处理的表面层。

19. 发明授权

US06927163B2 Method and apparatus for manufacturing a barrier layer of semiconductor device 失效
标题翻译：用于制造半导体器件的阻挡层的方法和装置
公开(公告)号：US06927163B2
公开(公告)日：2005-08-09
申请号：US10180754
申请日：2002-06-26
申请人： Bi O Lim , Han Choon Lee
发明人： Bi O Lim , Han Choon Lee
IPC分类号： H01L21/28 , C23C14/58 , H01L21/285 , H01L21/768 , H01L21/4763
CPC分类号： H01L21/76856 , C23C14/5826 , C23C14/586 , H01L21/2855 , H01L21/76843
摘要： Disclosed is a method and an apparatus for manufacturing a barrier layer of semiconductor device. The disclosed comprises the steps of: forming an interlayer insulating layer having a contact hole on a semiconductor substrate; forming a Ti layer on the contact hole and on the interlayer insulating layer; and reacting the Ti layer with nitrogen radical to transform a part of the Ti layer into a TiN layer.
摘要翻译：公开了一种用于制造半导体器件的阻挡层的方法和装置。所公开的方法包括以下步骤：在半导体衬底上形成具有接触孔的层间绝缘层; 在所述接触孔和所述层间绝缘层上形成Ti层; 并使Ti层与氮自由基反应，将Ti层的一部分转变为TiN层。

20. 发明授权

US08760843B2 Capacitive device and method for fabricating the same 有权
标题翻译：电容装置及其制造方法
公开(公告)号：US08760843B2
公开(公告)日：2014-06-24
申请号：US13560318
申请日：2012-07-27
申请人： Jong Taek Hwang , Han Choon Lee , Oh Jin Jung , Jin Youn Cho
发明人： Jong Taek Hwang , Han Choon Lee , Oh Jin Jung , Jin Youn Cho
IPC分类号： H01G4/30 , H01G4/005 , H01G4/228 , H01G4/40
CPC分类号： H01G4/30 , H01G4/005 , H01G4/228 , H01G4/385 , H01G4/40 , Y10T29/435
摘要： A capacitive device includes a first capacitor including a first wiring layer, a first dielectric film, a first conductive layer, a first insulating layer on the first capacitor, a second capacitor on the first insulating layer including a second conductive layer, a second dielectric film, and a third conductive layer, a second insulating layer on the second capacitor, a second wiring layer on the second insulating layer including first and second connection wires, a first via connecting the first wiring layer to the second conductive layer, a second via connecting the third conductive layer to the second wiring layer, a third via connecting the first connection wire to the first conductive layer, and a fourth via connecting the second connection wire to the first wiring layer.
摘要翻译：电容式器件包括：第一电容器，包括第一布线层，第一电介质膜，第一导电层，第一电容器上的第一绝缘层，第一绝缘层上的第二电容器，第二导电层，第二电介质膜以及第三导电层，第二电容器上的第二绝缘层，第二绝缘层上的包括第一和第二连接线的第二布线层，将第一布线层连接到第二导电层的第一通孔，向第二布线层的第三导电层，将第一连接线连接到第一导电层的第三通孔和将第二连接线连接到第一布线层的第四通孔。

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