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11. 发明授权

US07977793B2 Metal line of semiconductor device having a diffusion barrier with an amorphous TaBN layer and method for forming the same 有权
标题翻译：具有无定形TaBN层的扩散阻挡层的半导体器件的金属线及其形成方法
公开(公告)号：US07977793B2
公开(公告)日：2011-07-12
申请号：US11939666
申请日：2007-11-14
申请人： Dong Ha Jung , Seung Jin Yeom , Baek Mann Kim , Young Jin Lee , Jeong Tae Kim
发明人： Dong Ha Jung , Seung Jin Yeom , Baek Mann Kim , Young Jin Lee , Jeong Tae Kim
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L23/53238 , H01L21/76843 , H01L21/76846 , H01L21/76856 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A metal line in a semiconductor device includes an insulation layer formed on a semiconductor substrate. A metal line forming region is formed in the insulation layer. A metal line is formed to fill the metal line forming region of the insulation layer. And a diffusion barrier that includes an amorphous TaBN layer is formed between the metal line and the insulation layer. The amorphous TaBN layer prevents a copper component from diffusing into the semiconductor substrate, thereby improving upon the characteristics and the reliability of a device.
摘要翻译：半导体器件中的金属线包括形成在半导体衬底上的绝缘层。在绝缘层中形成金属线形成区域。形成金属线以填充绝缘层的金属线形成区域。并且在金属线和绝缘层之间形成包括非晶态TaBN层的扩散阻挡层。无定形TaBN层防止铜成分扩散到半导体衬底中，从而改善器件的特性和可靠性。

12. 发明授权

US07875979B2 Metal line of semiconductor device having a diffusion barrier including CRxBy and method for forming the same 失效
标题翻译：具有包含CRxBy的扩散阻挡层的半导体器件的金属线及其形成方法
公开(公告)号：US07875979B2
公开(公告)日：2011-01-25
申请号：US12619147
申请日：2009-11-16
申请人： Dong Ha Jung , Seung Jin Yeom , Baek Mann Kim , Young Jin Lee , Jeong Tae Kim
发明人： Dong Ha Jung , Seung Jin Yeom , Baek Mann Kim , Young Jin Lee , Jeong Tae Kim
IPC分类号： H01L29/40
CPC分类号： H01L21/76843 , H01L21/28556 , H01L21/76873 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A metal line of a semiconductor device having a diffusion barrier including CrxBy and a method for forming the same is described. The metal line of a semiconductor device includes an insulation layer formed on a semiconductor substrate. The insulation layer is formed having a metal line forming region. A diffusion barrier including a CrxBy layer is subsequently formed on the surface of the metal line forming region and the insulation layer. A metal line is finally formed to fill the metal line forming region of the insulation layer on the diffusion barrier including a CrxBy layer.
摘要翻译：描述了具有包括CrxBy的扩散阻挡层的半导体器件的金属线及其形成方法。半导体器件的金属线包括形成在半导体衬底上的绝缘层。绝缘层形成有金属线形成区域。随后在金属线形成区域和绝缘层的表面上形成包括Cr x B y层的扩散阻挡层。最后形成金属线以填充包含CrxBy层的扩散阻挡层上的绝缘层的金属线形成区域。

13. 发明授权

US07855456B2 Metal line of semiconductor device without production of high resistance compound due to metal diffusion and method for forming the same 有权
标题翻译：由于金属扩散而不生产高电阻化合物的半导体器件的金属线及其形成方法
公开(公告)号：US07855456B2
公开(公告)日：2010-12-21
申请号：US12328988
申请日：2008-12-05
申请人： Baek Mann Kim , Seung Jin Yeom , Dong Ha Jung , Jeong Tae Kim
发明人： Baek Mann Kim , Seung Jin Yeom , Dong Ha Jung , Jeong Tae Kim
IPC分类号： H01L23/48
CPC分类号： H01L21/76846 , H01L21/2855 , H01L21/28556 , H01L21/76856
摘要： A metal line includes a lower metal line formed on a semiconductor substrate. An insulation layer is formed on the semiconductor substrate having the lower metal line, and a metal line forming region exposing at least a portion of the lower metal line is defined in the insulation layer. A diffusion barrier is formed on a surface of the metal line forming region of the insulation layer and includes a WNx layer, a W—N—B ternary layer, and a Ti—N—B ternary layer. A wetting layer is formed on the diffusion barrier and is made of one of a Ti layer or a TiN layer. An upper metal line is formed on the wetting layer to fill the metal line forming region of the insulation layer.
摘要翻译：金属线包括形成在半导体衬底上的下金属线。在具有下金属线的半导体衬底上形成绝缘层，并且在绝缘层中限定暴露下金属线的至少一部分的金属线形成区域。在绝缘层的金属线形成区域的表面上形成扩散阻挡层，其包括WNx层，W-N-B三元层和Ti-N-B三元层。在扩散阻挡层上形成润湿层，由Ti层或TiN层之一构成。在润湿层上形成上金属线以填充绝缘层的金属线形成区域。

14. 发明授权

US08338951B2 Metal line of semiconductor device having a diffusion barrier with an amorphous TaBN layer and method for forming the same 有权
标题翻译：具有无定形TaBN层的扩散阻挡层的半导体器件的金属线及其形成方法
公开(公告)号：US08338951B2
公开(公告)日：2012-12-25
申请号：US13152665
申请日：2011-06-03
申请人： Dong Ha Jung , Seung Jin Yeom , Baek Mann Kim , Young Jin Lee , Jeong Tae Kim
发明人： Dong Ha Jung , Seung Jin Yeom , Baek Mann Kim , Young Jin Lee , Jeong Tae Kim
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L23/53238 , H01L21/76843 , H01L21/76846 , H01L21/76856 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A metal line in a semiconductor device includes an insulation layer formed on a semiconductor substrate. A metal line forming region is formed in the insulation layer. A metal line is formed to fill the metal line forming region of the insulation layer. And a diffusion barrier that includes an amorphous TaBN layer is formed between the metal line and the insulation layer. The amorphous TaBN layer prevents a copper component from diffusing into the semiconductor substrate, thereby improving upon the characteristics and the reliability of a device.
摘要翻译：半导体器件中的金属线包括形成在半导体衬底上的绝缘层。在绝缘层中形成金属线形成区域。形成金属线以填充绝缘层的金属线形成区域。并且在金属线和绝缘层之间形成包括非晶态TaBN层的扩散阻挡层。无定形TaBN层防止铜成分扩散到半导体衬底中，从而改善器件的特性和可靠性。

15. 发明授权

US07902065B2 Multi-layered metal line having an improved diffusion barrier of a semiconductor device and method for forming the same 失效
标题翻译：具有改善的半导体器件的扩散势垒的多层金属线及其形成方法
公开(公告)号：US07902065B2
公开(公告)日：2011-03-08
申请号：US11939798
申请日：2007-11-14
申请人： Baek Mann Kim , Seung Jin Yeom , Young Jin Lee , Dong Ha Jung , Jeong Tae Kim
发明人： Baek Mann Kim , Seung Jin Yeom , Young Jin Lee , Dong Ha Jung , Jeong Tae Kim
IPC分类号： H01L21/00
CPC分类号： H01L21/76843 , H01L21/76846 , H01L21/76856 , H01L23/53223 , H01L2924/0002 , H01L2924/00
摘要： A multi-layered metal line of a semiconductor device and a process of forming the same are described. The multi-layered metal line includes a lower metal line formed on a semiconductor substrate. An insulation layer is subsequently formed on the semiconductor substrate including the lower metal line and has an upper metal line forming region that exposes a portion of the lower metal line. A diffusion barrier formed on a surface of the upper metal line forming region of the insulation layer. The diffusion barrier includes a W—B—N ternary layer. An upper metal line is finally formed on the diffusion barrier to fill the upper metal line forming region of the insulation layer.
摘要翻译：描述半导体器件的多层金属线及其形成方法。多层金属线包括形成在半导体衬底上的下金属线。随后在包括下金属线的半导体衬底上形成绝缘层，并且具有暴露下部金属线的一部分的上部金属线形成区域。形成在绝缘层的上部金属线形成区域的表面上的扩散阻挡层。扩散阻挡层包括W-B-N三元层。在扩散阻挡层上最终形成上金属线以填充绝缘层的上金属线形成区域。

16. 发明授权

US07741216B2 Metal line of semiconductor device and method for forming the same 失效
标题翻译：半导体器件的金属线及其形成方法
公开(公告)号：US07741216B2
公开(公告)日：2010-06-22
申请号：US12326374
申请日：2008-12-02
申请人： Jeong Tae Kim , Seung Jin Yeom , Baek Mann Kim , Dong Ha Jung
发明人： Jeong Tae Kim , Seung Jin Yeom , Baek Mann Kim , Dong Ha Jung
IPC分类号： H01L23/52 , H01L21/4763
CPC分类号： H01L23/53238 , H01L21/76807 , H01L21/76843 , H01L21/76846 , H01L21/76856 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： A metal line of a semiconductor device includes an insulation layer formed on a semiconductor substrate and having a metal line forming region. A diffusion barrier is formed on a surface of the metal line forming region of the insulation layer. The diffusion barrier has a multi-layered structure of a V layer, a VxNy layer and a VxNyOz layer. A metal layer is formed on the diffusion barrier to fill the metal line forming region of the insulation layer.
摘要翻译：半导体器件的金属线包括形成在半导体衬底上并具有金属线形成区域的绝缘层。在绝缘层的金属线形成区域的表面上形成扩散阻挡层。扩散势垒具有V层，VxNy层和VxNyOz层的多层结构。在扩散阻挡层上形成金属层以填充绝缘层的金属线形成区域。

17. 发明授权

US08088687B2 Method for forming copper line having self-assembled monolayer for ULSI semiconductor devices 有权
标题翻译：用于形成具有用于ULSI半导体器件的自组装单层的铜线的方法
公开(公告)号：US08088687B2
公开(公告)日：2012-01-03
申请号：US12491826
申请日：2009-06-25
申请人： Seung Jin Yeom , Jae Hong Kim , Sung Goon Kang , Won Kyu Han
发明人： Seung Jin Yeom , Jae Hong Kim , Sung Goon Kang , Won Kyu Han
IPC分类号： H01L21/44
CPC分类号： H01L23/53238 , H01L21/288 , H01L21/76861 , H01L21/76873 , H01L21/76874 , H01L2924/0002 , H01L2924/12044 , H01L2924/00
摘要： A copper line having self assembled monolayer for use in ULSI semiconductor devices and methods of making the same are presented. The copper line includes an interlayer dielectric, a self-assembled monolayer, catalytic particles on the monolayer, and a copper layer on the monolayer with the catalytic particles. The method includes the steps of forming an interlayer dielectric on a semiconductor substrate having a metal line forming region; forming a self-assembled monolayer on the metal line forming region; adsorbing catalytic particles on the self-assembled monolayer; forming using an electroless process a copper seed layer on the self-assembled monolayer having the catalytic particles adsorbed thereto; and forming a copper layer on the copper seed layer to fill in the metal line forming region.
摘要翻译：提出了一种用于ULSI半导体器件的自组装单层的铜线及其制造方法。铜线包括层间电介质，自组装单层，单层上的催化颗粒，以及具有催化颗粒的单层上的铜层。该方法包括在具有金属线形成区域的半导体衬底上形成层间电介质的步骤; 在金属线形成区域上形成自组装单层; 在自组装单层上吸附催化剂颗粒; 使用无电解方法在具有吸附催化剂颗粒的自组装单层上形成铜种子层; 并在铜籽晶层上形成铜层以填充金属线形成区域。

18. 发明授权

US06455329B1 Method for fabricating a capacitor in a semiconductor device 失效
标题翻译：在半导体器件中制造电容器的方法
公开(公告)号：US06455329B1
公开(公告)日：2002-09-24
申请号：US10022512
申请日：2001-12-20
申请人： Nam Kyeong Kim , Seung Jin Yeom
发明人： Nam Kyeong Kim , Seung Jin Yeom
IPC分类号： H01E706
CPC分类号： H01L27/11502 , H01L21/02197 , H01L21/02282 , H01L21/02318 , H01L21/02356 , H01L21/31691 , H01L27/11507 , H01L28/55
摘要： A method for fabricating a capacitor in a semiconductor device includes forming a semiconductor device having a source, a drain, and a gate on a semiconductor substrate, forming an interlayer insulating film having a contact hole exposing the source, forming a conductive layer in the contact hole, forming a lower electrode on the interlayer insulating film, inclusive of the conductive layer, coating an insulating material on the lower electrode for forming a dielectric film, subjecting the insulating material to a first rapid thermal annealing of a first temperature in a chamber, to form nuclei oriented along an a-b axis, subjecting the insulating material to a second rapid thermal annealing at a second temperature higher than the first temperature in the chamber, to grow the nuclei oriented along the a-b axis, to form a dielectric film, and forming an upper electrode on the dielectric film.
摘要翻译：一种在半导体器件中制造电容器的方法包括在半导体衬底上形成具有源极，漏极和栅极的半导体器件，形成具有暴露源极的接触孔的层间绝缘膜，在接触中形成导电层在层间绝缘膜上形成下电极，包括导电层，在用于形成电介质膜的下电极上涂覆绝缘材料，对绝缘材料进行室内第一温度的第一快速热退火，以形成沿着ab轴取向的核，使绝缘材料在室内比第一温度高的第二温度进行第二快速热退火，以使沿着ab轴取向的核生长，形成电介质膜，并形成电介质膜上的上电极。

19. 发明授权

US08252686B2 Method for forming copper wiring in a semiconductor device 失效
标题翻译：在半导体器件中形成铜布线的方法
公开(公告)号：US08252686B2
公开(公告)日：2012-08-28
申请号：US12427870
申请日：2009-04-22
申请人： Hyung Soon Park , Noh Jung Kwak , Seung Jin Yeom , Choon Kun Ryu , Jong Goo Jung , Sung Jun Kim
发明人： Hyung Soon Park , Noh Jung Kwak , Seung Jin Yeom , Choon Kun Ryu , Jong Goo Jung , Sung Jun Kim
IPC分类号： H01L21/302
CPC分类号： H01L21/02074 , H01L21/3212 , H01L21/7684 , H01L21/76883
摘要： A process for forming a copper wiring and the prevention of copper ion migration in a semiconductor device is disclosed herein. The process includes conducting a post-cleaning process for a copper layer that is to form the cooper wiring after already having undergone a CMP process. The post-cleaning process includes conducting a primary chemical cleaning using a citric acid-based chemical. A secondary chemical cleaning is then conducted on the copper layer having undergone the primary chemical cleaning using an ascorbic acid-based chemical. After the post-cleaning process is completed, the migration of copper ions over time is prevented thereby improving the reliability of the semiconductor device.
摘要翻译：本文公开了一种用于形成铜布线的方法和防止半导体器件中的铜离子迁移。该方法包括在已经经过CMP工艺的铜层之后对铜层进行后清洗处理。后清洗过程包括使用基于柠檬酸的化学品进行初级化学清洗。然后在使用抗坏血酸的化学品进行了主要化学清洗的铜层上进行二次化学清洗。在完成后清洗处理之后，防止了铜离子随时间的迁移，从而提高了半导体器件的可靠性。

20. 发明申请

US20100210104A1 METHOD FOR FORMING COPPER WIRING IN A SEMICONDUCTOR DEVICE 失效
标题翻译：在半导体器件中形成铜线的方法
公开(公告)号：US20100210104A1
公开(公告)日：2010-08-19
申请号：US12427870
申请日：2009-04-22
申请人： Hyung Soon Park , Noh Jung Kwak , Seung Jin Yeom , Choon Kun Ryu , Jong Goo Jung , Sung Jun Kim
发明人： Hyung Soon Park , Noh Jung Kwak , Seung Jin Yeom , Choon Kun Ryu , Jong Goo Jung , Sung Jun Kim
IPC分类号： H01L21/768 , H01L21/306
CPC分类号： H01L21/02074 , H01L21/3212 , H01L21/7684 , H01L21/76883
摘要： A process for forming a copper wiring and the prevention of copper ion migration in a semiconductor device is disclosed herein. The process includes conducting a post-cleaning process for a copper layer that is to form the cooper wiring after already having undergone a CMP process. The post-cleaning process includes conducting a primary chemical cleaning using a citric acid-based chemical. A secondary chemical cleaning is then conducted on the copper layer having undergone the primary chemical cleaning using an ascorbic acid-based chemical. After the post-cleaning process is completed, the migration of copper ions over time is prevented thereby improving the reliability of the semiconductor device.
摘要翻译：本文公开了一种用于形成铜布线的方法和防止半导体器件中的铜离子迁移。该方法包括对经过CMP工艺形成铜线的铜层进行后清洗处理。后清洗过程包括使用基于柠檬酸的化学品进行初级化学清洗。然后在使用抗坏血酸的化学品进行了主要化学清洗的铜层上进行二次化学清洗。在完成后清洗处理之后，防止了铜离子随时间的迁移，从而提高了半导体器件的可靠性。

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