专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明专利

AU2018100321A4 Person ReID method based on metric learning with hard mining 未知
公开(公告)号：AU2018100321A4
公开(公告)日：2018-04-26
申请号：AU2018100321
申请日：2018-03-15
申请人： CHEN JINGHAN MR , LI GUANGYAO MR , ZHANG MING MR
发明人： ZHANG MING , LI GUANGYAO , CHEN JINGHAN
IPC分类号： G06K9/00 , G06T7/00
摘要： Abstract Based on the construction of Resnet-50 model, related DNN conception, Triplet Loss and hard mining algorithm, this invention puts forward a method for re-identifying people through images or even videos, named person re-identification(ReID). Compare to other algorithms in ReID filed, The utilizing of the algorithm enable the invention to achieve a higher accuracy and efficiency, which will be articulated in the description. The invention mainly involves several steps: For the preparation of training model, images are collected from database market1501 on the internet and processed and the resnet-50 model will be constructed; then image features will be extracted as the input in the training phase, where, in the same time, the weights of the model will be consistently optimized by adopting Triplet Loss and hard mining algorithm; finally, the trained model will be saved and it is proved in the final test that it can reach a high accuracy in ReID tasks. training datasets epoch=O Input (contend of start trainin NOoch

12. 发明专利

AT503336A1 未知
公开(公告)号：AT503336A1
公开(公告)日：2007-09-15
申请号：AT7052001
申请日：2001-05-02
申请人： ZHANG MING , DU FANGLIN
发明人： ZHANG MING , DU FANGLIN
IPC分类号： B29C48/90
摘要： A new plastic tandem extrusion sizer mold. The mold includes an inlet plate, middle plates and an outlet plate which are connected with each other in series by columniform pin, and then side baffles are added to mount on a base with the aid of bolts. A rectangular inlet plate, middle plates and outlet plate, which constitute a cavity of different shape, are placed upright and connected together in sequence and in series. Compared with the conventional sizer mold, the present sizer mold gets over the limitations of cavity parting, machining deep holes, cutting gas slots, trivial design and complex manufacture process, and has a shortened design period and simplified technological process, and can be manufactured rapidly.

13. 发明申请

WO2010101691A3 METHODS OF FORMING PATTERNS 审中-公开
标题翻译：形成图案的方法
公开(公告)号：WO2010101691A3
公开(公告)日：2010-11-18
申请号：PCT/US2010023209
申请日：2010-02-04
申请人： MICRON TECHNOLOGY INC , SILLS SCOTT , SANDHU GURTEJ S , SMYTHE JOHN , ZHANG MING
发明人： SILLS SCOTT , SANDHU GURTEJ S , SMYTHE JOHN , ZHANG MING
IPC分类号： H01L21/027 , G03F7/00
CPC分类号： H01L21/0274 , G03F7/20 , G03F7/40 , H01L21/0337 , H01L21/0338
摘要： Some embodiments include methods of forming patterns of openings. The methods may include forming spaced features over a substrate. The features may have tops and may have sidewalls extending downwardly from the tops. A first material may be formed along the tops and sidewalls of the features. The first material may be formed by spin-casting a conformal layer of the first material across the features, or by selective deposition along the features relative to the substrate. After the first material is formed, fill material may be provided between the features while leaving regions of the first material exposed. The exposed regions of the first material may then be selectively removed relative to both the fill material and the features to create the pattern of openings.
摘要翻译：一些实施例包括形成开口图案的方法。该方法可以包括在衬底上形成间隔特征。特征可以具有顶部并且可以具有从顶部向下延伸的侧壁。第一材料可以沿着特征的顶部和侧壁形成。第一材料可以通过在特征上旋转浇铸第一材料的共形层来形成，或者通过沿着特征相对于衬底的选择性沉积来形成。在形成第一材料之后，可以在特征之间提供填充材料，同时使第一材料的区域暴露。然后可以相对于填充材料和特征选择性地去除第一材料的暴露区域，以产生开口图案。

14. 发明申请

WO2010039532A3 DISABLING CACHE PORTIONS DURING LOW VOLTAGE OPERATIONS 审中-公开
标题翻译：在低电压运行期间禁用高速缓存部分
公开(公告)号：WO2010039532A3
公开(公告)日：2010-07-01
申请号：PCT/US2009058026
申请日：2009-09-23
申请人： INTEL CORP , WILKERSON CHRISTOPHER , KHELLAH MUHAMMAD M , DE VIVEK , ZHANG MING , ABELLA JAUME , CARRETERO CASADO JAVIER , CHAPARRO MONFERRER PEDRO , VERA XAVIER , GONZALEZ ANTONIO
发明人： WILKERSON CHRISTOPHER , KHELLAH MUHAMMAD M , DE VIVEK , ZHANG MING , ABELLA JAUME , CARRETERO CASADO JAVIER , CHAPARRO MONFERRER PEDRO , VERA XAVIER , GONZALEZ ANTONIO
IPC分类号： G06F1/32 , G06F12/00
CPC分类号： G06F12/0895 , G06F1/3203 , G06F1/3275 , G06F1/3296 , G06F12/0864 , Y02D10/13 , Y02D10/14 , Y02D10/172
摘要： Methods and apparatus relating to disabling one or more cache portions during low voltage operations are described. In some embodiments, one or more extra bits may be used for a portion of a cache that indicate whether the portion of the cache is capable at operating at or below Vccmin levels. Other embodiments are also described and claimed.
摘要翻译：描述了在低电压操作期间禁用一个或多个高速缓存部分的方法和装置。在一些实施例中，一个或多个额外的比特可以用于高速缓存的一部分，其指示高速缓存的部分是否能够在Vccmin等级或更低的值下运行。还描述和要求保护其他实施例。

15. 发明申请

WO2008033639A3 BROADSIDE SMALL ARRAY MICROPHONE BEAMFORMING APPARATUS 审中-公开
标题翻译：广播小型阵列麦克风波束形成装置
公开(公告)号：WO2008033639A3
公开(公告)日：2008-11-20
申请号：PCT/US2007076191
申请日：2007-08-17
申请人： FORTEMEDIA INC , ZHANG MING , PAI WAN-CHIEH
发明人： ZHANG MING , PAI WAN-CHIEH
IPC分类号： H04R3/00 , G10L15/00 , G10L21/00 , H04B15/00 , H04R29/00
CPC分类号： H04R3/005
摘要： A broadside small array microphone beamforming apparatus comprises first and second omni-directional microphones, a microphone calibration unit, and a directional microphone forming unit. The first and second omni-directional microphones respectively convert voice from a desired near-end talker into first and second signals. The second and first omni-directional microphones and the desired near-end talker are respectively arranged at three points of a triangle. The microphone calibration unit receives the first and second signals and correspondingly outputs first and second calibration signals. The directional microphone forming unit receives the first and second calibration signals to generate a first directional microphone signal with a bidirectional polar pattern. The adaptive channel decoupling unit receives the first calibration signal and the first directional microphone signal to generate a first main channel signal and a first reference channel signal for noise detection.
摘要翻译：宽边小阵列麦克风波束形成装置包括第一和第二全向麦克风，麦克风校准单元和定向麦克风形成单元。第一和第二全向麦克风分别将来自期望的近端讲话者的语音转换为第一和第二信号。第二和第一全向麦克风以及所需的近端讲话者分别布置在三角形的三个点处。麦克风校准单元接收第一和第二信号并相应地输出第一和第二校准信号。定向传声器形成单元接收第一和第二校准信号以产生具有双向极性图案的第一定向传声器信号。自适应信道解耦单元接收第一校准信号和第一定向麦克风信号以生成用于噪声检测的第一主信道信号和第一参考信道信号。

16. 发明申请

WO2013176667A3 MASPIN-BASED TREATMENT AND PREVENTION OF CANCER 审中-公开
标题翻译：基于MASPIN的治疗和预防癌症
公开(公告)号：WO2013176667A3
公开(公告)日：2014-06-19
申请号：PCT/US2012039165
申请日：2012-05-23
申请人： UNIV NORTHWESTERN , ZHANG MING
发明人： ZHANG MING
IPC分类号： A61K38/08 , A01N63/00 , C12N5/00
CPC分类号： A61K38/57
摘要： The present invention provides compositions and methods for the treatment of prevention of cancer through enhanced cell adhesion. In particular the present invention provides maspin-related peptides, and methods or use thereof, for the promotion of cell adhesion.
摘要翻译：本发明提供了通过增强细胞粘附来治疗预防癌症的组合物和方法。特别地，本发明提供了maspin相关肽及其方法或用途，用于促进细胞粘附。

17. 发明申请

WO2008033640A3 MICROPHONE MODULE AT CORNER OR EDGE OF ELECTRONIC DEVICE 审中-公开
标题翻译：麦克风模块在电子设备的拐角或边缘
公开(公告)号：WO2008033640A3
公开(公告)日：2008-10-09
申请号：PCT/US2007076192
申请日：2007-08-17
申请人： FORTEMEDIA INC , LIU HAN-HSIN , XU KAI , ZHANG MING
发明人： LIU HAN-HSIN , XU KAI , ZHANG MING
IPC分类号： H04R25/00
CPC分类号： H04R9/08
摘要： An electronic device (1 ) includes a body (19) and a microphone module (10). The body (19) includes a plurality of corners and a plurality of edges meeting at the corners. The microphone module (10) is provided with a plurality of acoustic openings and disposed at the corners and/or the edges of the body to expose the acoustic openings.
摘要翻译：电子设备（1）包括主体（19）和麦克风模块（10）。主体（19）包括在拐角处相交的多个拐角和多个边缘。麦克风模块（10）设置有多个声学开口并且设置在主体的角部和/或边缘以露出声学开口。

18. 发明申请

WO2008033638A3 MICROPHONE ARRAY IN HOUSING 审中-公开
标题翻译：麦克风阵列住房
公开(公告)号：WO2008033638A3
公开(公告)日：2008-10-09
申请号：PCT/US2007076186
申请日：2007-08-17
申请人： FORTEMEDIA INC , ZHANG MING , CHEN LILI , ZHANG BO
发明人： ZHANG MING , CHEN LILI , ZHANG BO
IPC分类号： H04R25/00
CPC分类号： H04R1/406
摘要： An electronic device includes a circuit board (24), a first microphone module (26), and a second microphone module (28). The first microphone module (26) includes a first omnidirectional microphone (261 ) connected to the circuit board (24), a first boot (263) also connected to the circuit board (24), and a first tube (265) extending from the first boot (263). The second microphone module (28) includes a second omnidirectional microphone (281 ) connected to the circuit board (24), a second boot (283) also connected to the circuit board (24), and a second tube (285) extending from the second boot (283). The first and second omnidirectional microphones (26, 28) are identical, and the first and second boots (263, 283) are identical.
摘要翻译：电子设备包括电路板（24），第一麦克风模块（26）和第二麦克风模块（28）。所述第一麦克风模块（26）包括连接到所述电路板（24）的第一全向麦克风（261），还连接到所述电路板（24）的第一引导件（263）以及从所述电路板第一次启动（263）。第二麦克风模块（28）包括连接到电路板（24）的第二全向麦克风（281），还连接到电路板（24）的第二引导件（283）第二次启动（283）。第一和第二全向麦克风（26,28）是相同的，并且第一和第二靴子（263,283）是相同的。

19. 发明申请

WO2004013949A3 VOLTAGE-VOLTAGE CONVERTER FOR INTEGRATED CIRCUITS 审中-公开
标题翻译：用于集成电路的电压转换器
公开(公告)号：WO2004013949A3
公开(公告)日：2004-04-08
申请号：PCT/FR0302351
申请日：2003-07-25
申请人： CENTRE NAT RECH SCIENT , ZHANG MING , LLASER NICOLAS
发明人： ZHANG MING , LLASER NICOLAS
IPC分类号： H02M3/07
CPC分类号： H02M3/073
摘要： Disclosed is a voltage-voltage converter for integrated circuits. The invention is characterized by the fact that said converter has a multi-stage symmetric structure and comprises at least one input stage that is formed by a clock booster (CB) circuit which has a symmetric structure and supplies two output voltages, a voltage multiplier stage that has a symmetric structure and comprises two voltage multiplier circuits (CMi; CMip) which are mounted in two branches (B1; B2) of the converter and to which the two output voltages of the input stage are applied, respectively, and an output stage (S) formed by a multiplexing (MX) circuit to which the two output voltages of the voltage multiplier stage are applied. The invention applies to EEPROM memories and low-voltage integrated circuits.
摘要翻译：公开了一种用于集成电路的电压 - 电压转换器。本发明的特征在于所述转换器具有多级对称结构，并且包括由具有对称结构并提供两个输出电压的时钟增强器（CB）电路形成的至少一个输入级，电压倍增器级具有对称结构，并且包括分别安装在转换器的两个分支（B1; B2）中并且分别施加输入级的两个输出电压的两个电压倍增器电路（CMi; CMip）和输出级（MX）电路所形成的多个（S）电路，施加电压倍增器级的两个输出电压。本发明适用于EEPROM存储器和低压集成电路。

20. 发明申请

WO0009960A3 ICE BANK CONTROL WITH VOLTAGE PROTECTION SENSING 审中-公开
标题翻译：冰箱控制与电压保护感应
公开(公告)号：WO0009960A3
公开(公告)日：2000-05-11
申请号：PCT/US9918366
申请日：1999-08-12
申请人： IMI CORNELIUS INC , ZHANG MING , SHANNON JOSEPH W , JONES BRIAN
发明人： ZHANG MING , SHANNON JOSEPH W , JONES BRIAN
IPC分类号： B67D1/08 , F25D21/02 , F25D31/00 , F25C1/08
CPC分类号： B67D1/0864 , F25D21/02 , F25D31/003
摘要： The present invention is an apparatus and method that regulates the size of an ice bank (50) and that prevents short cycling of the compressor (30) therefor and operation thereof at undesired voltages. A microprocessor based control circuit (10) includes a circuit for sensing line voltage (14) combined with an ice bank sensing circuit (18, 20). The ice bank sensing circuit is of the conductivity sensing type wherein the electrical conductivity between two probes (P1, P2) is sensed. The microprocessor (16) continually monitors the probes (P1, P2) to determine if refrigeration is needed or not, and continually senses the line voltage to determine if that voltage is within the design limits of the refrigeration compressor (30). The voltage sensing circuit (14) can also sense if power has been interrupted where the voltage drops to zero.
摘要翻译：本发明是一种调节冰块（50）的尺寸并且防止压缩机（30）的短路循环及其在不期望的电压下的操作的装置和方法。基于微处理器的控制电路（10）包括用于感测与冰块感测电路（18,20）组合的线路电压（14）的电路。冰堤感测电路是电导率检测类型，其中感测两个探针（P1，P2）之间的电导率。微处理器（16）连续地监测探头（P1，P2）以确定是否需要制冷，并且连续地感测线路电压以确定该电压是否在制冷压缩机（30）的设计极限内。电压检测电路（14）还可以感测在电压下降到零的情况下电源是否被中断。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式