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11. 发明公开

EP3571722A1 VERTICAL FET STRUCTURE 有权转让
公开(公告)号：EP3571722A1
公开(公告)日：2019-11-27
申请号：EP18702873.3
申请日：2018-01-17
申请人： Cree, Inc.
发明人： RYU, Sei-Hyung , SCHUPBACK, Marcelo , BARKLEY, Adam , ALLEN, Scott
IPC分类号： H01L29/423 , H01L29/739 , H01L29/78 , H01L29/06

12. 发明公开

EP1974373A1 METHODS OF FABRICATING TRANSISTORS INCLUDING SUPPORTED GATE ELECTRODES AND RELATED DEVICES 有权
标题翻译：工艺生产负载型晶体管，栅电极和相关设备
公开(公告)号：EP1974373A1
公开(公告)日：2008-10-01
申请号：EP07718065.1
申请日：2007-01-16
申请人： Cree Inc.
发明人： SMITH, Richard, Peter , SHEPPARD, Scott, Thomas , ALLEN, Scott
IPC分类号： H01L21/338 , H01L29/423 , H01L29/778 , H01L21/335
CPC分类号： H01L29/42312 , H01L29/2003 , H01L29/66431 , H01L29/66462 , H01L29/7787
摘要： Transistors are fabricated by forming a protective layer having a first opening extending therethrough on a substrate, forming a dielectric layer on the protective layer having a second opening extending therethrough that is wider than the first opening, and forming a gate electrode in the first and second openings. A first portion of the gate electrode laterally extends on surface portions of the protective layer outside the first opening, and a second portion of the gate electrode is spaced apart from the protective layer and laterally extends beyond the first portion on portions of the dielectric layer outside the second opening. Related devices and fabrication methods are also discussed.

13. 发明公开

EP3635780A1 SILICON CARBIDE POWER MODULE 有权转让
公开(公告)号：EP3635780A1
公开(公告)日：2020-04-15
申请号：EP18728501.0
申请日：2018-05-15
申请人： Cree, Inc.
发明人： DAS, Mrinal, K. , BARKLEY, Adam , FETZER, Brian , YOUNG, Jonathan , MIECZKOWSKI, Van , ALLEN, Scott
IPC分类号： H01L23/31 , H01L23/482 , H01L23/373 , H02M3/15 , H02M7/00 , H03K17/12 , H03K17/74 , H01L25/07

14. 发明公开

EP3240043A1 SCHOTTKY DIODE 有权转让
标题翻译：肖特基二极管
公开(公告)号：EP3240043A1
公开(公告)日：2017-11-01
申请号：EP17176898.9
申请日：2012-09-07
申请人： Cree, Inc.
发明人： HENNING, Jason Patrick , ZHANG, Qingchun , RYU, Sei-Hyung , AGARWAL, Anant Kumar , PALMOUR, John Williams , ALLEN, Scott
IPC分类号： H01L29/872 , H01L29/06 , H01L29/16
CPC分类号： H01L29/872 , H01L29/0619 , H01L29/0661 , H01L29/1608 , H01L29/8611 , H01L2224/04042 , H01L2224/05554 , H01L2224/05567 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2924/00014 , H01L2924/12032 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/00 , H01L2224/05552
摘要： A semiconductor device (10) comprises a drift layer (22) having a first surface with an active region (14) and a plurality of junction barrier element recesses (40), the drift layer being doped with a doping material of a first conductivity type and associated with an edge termination region (16) that is substantially laterally adjacent the active region. A Schottky layer (24) is over the active region of the first surface to form a Schottky junction. A plurality of first doped regions (30) extend into the drift layer about corresponding ones of the plurality of junction barrier element recesses (40) wherein the plurality of first doped regions are doped with a doping material of a second conductivity type, which is opposite the first conductivity type, and form an array of junction barrier elements in the drift layer below the Schottky junction. A well (34) ia formed in the drift layer in the edge termination region, the well having guard rings (36) and being doped with the doping material of the second conductivity type where the plurality of guard rings are formed in the well, wherein the guard rings are coplanar with the junction barrier element recesses.
摘要翻译：一种半导体器件（10）包括具有第一表面和第二表面的漂移层（22），所述第一表面具有有源区（14）和多个结势垒元件凹槽（40），所述漂移层掺杂有第一导电类型的掺杂材料并且与基本横向邻近有源区域的边缘终端区域（16）相关联。肖特基层（24）位于第一表面的有源区上以形成肖特基结。多个第一掺杂区域（30）围绕所述多个结势垒元件凹部（40）中的对应的一个延伸到所述漂移层中，其中所述多个第一掺杂区域掺杂有第二导电类型的掺杂材料，所述第二导电类型的掺杂材料相反第一导电类型，并在肖特基结下方的漂移层中形成结势垒元件的阵列。形成在边缘终端区域中的漂移层中的阱（34），阱具有保护环（36）并且掺杂有第二导电类型的掺杂材料，其中多个保护环形成在阱中，其中保护环与接合屏障元件凹部共面。

15. 发明授权

EP2754179B1 SCHOTTKY DIODE EMPLOYING RECESSES FOR ELEMENTS OF JUNCTION BARRIER ARRAY 有权转让
标题翻译：与具有约束力的屏障装置的要素凹槽肖特基二极管
公开(公告)号：EP2754179B1
公开(公告)日：2017-04-12
申请号：EP12766237.7
申请日：2012-09-07
申请人： Cree, Inc.
发明人： HENNING, Jason, Patrick , ZHANG, Qingchun , RYU, Sei-Hyung , AGARWAL, Anant, Kumar , PALMOUR, John, Williams , ALLEN, Scott
IPC分类号： H01L29/872 , H01L29/861 , H01L29/06
CPC分类号： H01L29/872 , H01L29/0619 , H01L29/0661 , H01L29/8611 , H01L2224/04042 , H01L2224/05567 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2924/00014 , H01L2924/12032 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/00 , H01L2224/05552

16. 发明公开

EP2754180A1 EDGE TERMINATION STRUCTURE EMPLOYING RECESSES FOR EDGE TERMINATION ELEMENTS 有权转让
标题翻译： EDGE终端结构使用边缘终端元件的凹陷
公开(公告)号：EP2754180A1
公开(公告)日：2014-07-16
申请号：EP12766760.8
申请日：2012-09-07
申请人： Cree, Inc.
发明人： HENNING, Jason, Patrick , ZHANG, Qingchun , RYU, Sei-Hyung , AGARWAL, Anant, Kumar , PALMOUR, John, Williams , ALLEN, Scott
IPC分类号： H01L29/872 , H01L29/06
CPC分类号： H01L29/872 , H01L29/0619 , H01L29/0661 , H01L29/8611 , H01L2224/04042 , H01L2224/05567 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2924/00014 , H01L2924/12032 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/00 , H01L2224/05552
摘要： Elements of an edge termination structure, such as multiple concentric guard rings, are effectively doped regions in a drift layer. To increase the depth of these doped regions, individual recesses may be formed in a surface of the drift layer where the elements of the edge termination structure are to be formed. Once the recesses are formed in the drift layer, these areas about and at the bottom of the recesses are doped to form the respective edge termination elements.
摘要翻译：边缘终端结构的元件，例如多个同心保护环，是漂移层中的有效掺杂区域。为了增加这些掺杂区域的深度，可以在将要形成边缘终端结构的元件的漂移层的表面中形成单独的凹陷。一旦在漂移层中形成凹槽，凹槽底部周围和底部的这些区域被掺杂以形成相应的边缘终端元件。

17. 发明公开

EP2754179A1 SCHOTTKY DIODE EMPLOYING RECESSES FOR ELEMENTS OF JUNCTION BARRIER ARRAY 有权转让
标题翻译：肖特二氧化锰麻醉品AUSSPARUNGENFÜRELEMENTE AUS EINER BINDUNGSBARRIERENANORDNUNG
公开(公告)号：EP2754179A1
公开(公告)日：2014-07-16
申请号：EP12766237.7
申请日：2012-09-07
申请人： Cree, Inc.
发明人： HENNING, Jason, Patrick , ZHANG, Qingchun , RYU, Sei-Hyung , AGARWAL, Anant, Kumar , PALMOUR, John, Williams , ALLEN, Scott
IPC分类号： H01L29/872 , H01L29/861 , H01L29/06
CPC分类号： H01L29/872 , H01L29/0619 , H01L29/0661 , H01L29/8611 , H01L2224/04042 , H01L2224/05567 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2924/00014 , H01L2924/12032 , H01L2924/1301 , H01L2924/1305 , H01L2924/13055 , H01L2924/00 , H01L2224/05552
摘要： The present disclosure generally relates to a Schottky diode that has a substrate, a drift layer provided over the substrate, and a Schottky layer provided over an active region of the substrate. A junction barrier array is provided in the drift layer just below the Schottky layer. The elements of the junction barrier array are generally doped regions in the drift layer. To increase the depth of these doped regions, individual recesses may be formed in the surface of the drift layer where the elements of the junction barrier array are to be formed. Once the recesses are formed in the drift layer, areas about and at the bottom of the recesses are doped to form the respective elements of the junction barrier array.
摘要翻译：诸如多个同心保护环的边缘终端结构的元件在漂移层中是有效的掺杂区域。为了增加这些掺杂区域的深度，可以在要形成边缘终端结构的元件的漂移层的表面中形成各自的凹部。一旦凹陷形成在漂移层中，凹槽周围和底部的这些区域被掺杂以形成相应的边缘终端元件。

18. 发明公开

EP2754177A1 HIGH CURRENT DENSITY POWER MODULE COMPRISING TRANSISTORS WITH IMPROVED LAYOUT 无效转让
标题翻译： STRMMODUL MIT HOHER STROMDICHTE UND TRANSISTOREN MIT VERBESSERTER KONZEPTION
公开(公告)号：EP2754177A1
公开(公告)日：2014-07-16
申请号：EP12762112.6
申请日：2012-08-17
申请人： Cree, Inc.
发明人： HENNING, Jason, Patrick , ZHANG, Qingchun , RYU, Sei-Hyung , AGARWAL, Anant, Kumar , PALMOUR, John, Williams , ALLEN, Scott
IPC分类号： H01L29/06 , H01L29/78 , H01L29/739 , H01L29/04 , H01L29/16
CPC分类号： H01L29/7805 , H01L21/046 , H01L21/049 , H01L25/18 , H01L27/0629 , H01L29/045 , H01L29/0696 , H01L29/1608 , H01L29/66068 , H01L29/7395 , H01L29/7802 , H01L29/7806 , H01L2924/0002 , H01L2924/13091 , H02M7/003 , H02P7/04 , H01L2924/00
摘要： A power module is disclosed that includes a housing with an interior chamber wherein multiple switch modules are mounted within the interior chamber. The switch modules comprise multiple transistors and diodes that are interconnected to facilitate switching power to a load. In one embodiment, at least one of the switch modules supports a current density of at least 10 amperes per cm2.
摘要翻译：公开了一种功率模块，其包括具有内部室的壳体，其中多个开关模块安装在所述内部室内。开关模块包括多个晶体管和二极管，这些晶体管和二极管互连以便于将功率切换到负载。在一个实施例中，至少一个开关模块支持每平方厘米至少10安培的电流密度。

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