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11. 发明专利

JP2005263187A Sun visor with net panel 审中-公开
标题翻译：净面板遮阳板
公开(公告)号：JP2005263187A
公开(公告)日：2005-09-29
申请号：JP2004116198
申请日：2004-03-16
申请人： Toshihiko Sato , 稔彦佐藤
发明人： NAKAMURA MASAYUKI , SATO TOSHIHIKO
IPC分类号： B60J3/02
摘要： PROBLEM TO BE SOLVED: To provide a sun visor making reduction of dazzle of sunlight and insurance of a visual field for recognizing a color and an object compatible at driving of a vehicle such as an automobile.
SOLUTION: The net panel 2 is mounted to a plate-like panel 1 not transmitting a light by a hinge 5 capable of rotating/fixing it at an optional angle. In the net panel 2, a net obtained by weaving natural fiber, synthetic resin fiber, inorganic fiber or thread made of metal at an equal interval is fixed by a four-way frame made of resin. Shielding or reduction of the sunlight is performed by rotating downward two sheets of the panels and reduction of dazzle of the sunlight is performed by rotating downward only the net panel.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：
要解决的问题：要用于识别的颜色和在车辆的驱动兼容的对象例如汽车提供一种遮阳板制造还原的视场的阳光和保险的眩光。
的解决方案：净面板2安装到板状面板1不通过铰链5能够旋转/在任意的角度固定它的发射光。在网面板2中，通过由树脂制成的四通框架固定由天然纤维，合成树脂纤维，无机纤维或由金属制成的螺纹等间隔编织而成的网。通过向下旋转两张面板来进行阳光的屏蔽或减少，仅通过网板向下旋转来进行阳光的眩目的减少。版权所有（C）2005，JPO＆NCIPI

12. 发明专利

JP2009174043A Apparatus for generating water electrolytic gas 审中-公开
标题翻译：用于生成水电解气体的装置
公开(公告)号：JP2009174043A
公开(公告)日：2009-08-06
申请号：JP2008277756
申请日：2008-10-29
申请人： Toshigoro Sato , Toshihiko Sato , Nobuo Takayama , 利五郎佐藤 , 寿彦佐藤 , 伸雄高山
发明人： SATO TOSHIGORO , SATO TOSHIHIKO , TAKAYAMA NOBUO
IPC分类号： C25B9/00
CPC分类号： C25B1/04 , C25B9/063 , C25B15/08 , F02M25/12 , Y02E60/366
摘要： PROBLEM TO BE SOLVED: To provide an apparatus that produces a large quantity of a water electrolytic gas in a potassium hydroxide electrolyte, and that separates and extracts the water electrolytic gas from the electrolyte by gas/liquid separation.
SOLUTION: Water electrolysis is performed in an electrolytic cell 10 for generating water electrolytic gas, including an electrolyte inlet 11 formed in a bottom wall, an outlet 15 formed in a top wall to extract a mixture of an electrolyte and a generated gas, an anode plate 12, a cathode plate 13, and an electrolyte spinning and passing means 14, for spinning and passing an alkali electrolyte in a direction leading from the anode plate to the cathode plate. The mixture that has been extracted from the outlet 15 in the upper end of the electrolytic cell 10 and includes the electrolyte and a water electrolytic gas is gas/liquid separated in a separation cell 20 for an electrolyte/water electrolytic gas to externally extract the water electrolytic gas and the electrolyte is circulated to the electrolytic cell 10 by an electrolyte circulation means 40 to continuously perform the electrolytic reaction.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种在氢氧化钾电解质中产生大量水电解气体的设备，并且通过气/液分离从电解液中分离和提取水电解气体。解决方案：在用于产生水电解气体的电解池10中进行水电解，其包括形成在底壁中的电解质入口11，形成在顶壁中的出口15，以提取电解质和产生气体的混合物，阳极板12，阴极板13和电解质纺丝和通过装置14，用于沿着从阳极板到阴极板的方向纺丝和通过碱性电解质。从电解槽10的上端的出口15抽出并包含电解质和水电解气体的混合物在用于电解质/水电解气体的分离单元20中被气/液分离以从外部提取水电解气体和电解质通过电解质循环装置40循环到电解池10中，以连续进行电解反应。版权所有（C）2009，JPO＆INPIT

13. 发明专利

JP2007148645A Device having function of calculating predicted medical examination time and determining priority order of medical examination 审中-公开
标题翻译：具有计算预测医学检查时间的功能的设备和确定医学检查的优先顺序
公开(公告)号：JP2007148645A
公开(公告)日：2007-06-14
申请号：JP2005340504
申请日：2005-11-25
申请人： Toshihiko Sato , 寿彦佐藤
发明人： SATO TOSHIHIKO
IPC分类号： G06Q50/22
摘要： PROBLEM TO BE SOLVED: To minimize the waiting time for medical examination by calculating a predicted examination time, determining the priority order of medical examination so that the ratio of examination waiting time to examination time is further equalized, thereby preferentially performing medical examination of a person needing a short examination time. SOLUTION: Prior to medical examination, a patient answers questions. Calculation of predicted examination time is performed based on the answers, an examination time per patient recorded for each medical examination, and records of examination contents. Based on the predicted time, high priority is assigned to a person with a short examination time, so that he/she can receive medical examination early. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：通过计算预测的检查时间来最小化体检的等待时间，确定体格检查的优先顺序，使检查等待时间与检查时间的比例进一步相等，从而优先进行体格检查一个需要较短考试时间的人。
解决方案：在体格检查之前，患者回答问题。根据答案，每个体格检查记录的每个病人的检查时间和检查内容的记录，进行预测检查时间的计算。根据预测时间，优先考虑一个较短的考试时间，以便他/她能早日接受体格检查。版权所有（C）2007，JPO＆INPIT

14. 发明授权

US09176515B2 Accelerator pedal reaction force control device 有权
标题翻译：加速踏板反作用力控制装置
公开(公告)号：US09176515B2
公开(公告)日：2015-11-03
申请号：US14130675
申请日：2012-06-13
申请人： Kohei Maruyama , Naoto Sen , Hideto Nebuya , Toshihiko Sato , Takayuki Yoshimura , Go Suzaki , Hirotaka Takiguchi , Masaru Kanda
发明人： Kohei Maruyama , Naoto Sen , Hideto Nebuya , Toshihiko Sato , Takayuki Yoshimura , Go Suzaki , Hirotaka Takiguchi , Masaru Kanda
IPC分类号： G06F7/70 , G05D1/00 , B60W10/04 , F16H59/48 , G05G1/40 , B60K26/02 , B60W50/16 , B60W30/14
CPC分类号： G05G1/40 , B60K26/021 , B60K2026/023 , B60W30/146 , B60W50/16 , Y10T74/20534
摘要： An accelerator pedal reaction force control device for controlling a depression reaction force of an accelerator pedal provided to a motor vehicle, the control device including: a reaction force actuator that provides the accelerator pedal with a depression reaction force; a target reaction force setting unit that sets a target depression reaction force; and a vehicle speed maintenance depression amount setting unit that sets an amount of depression of the accelerator pedal for maintaining a current vehicle speed as a vehicle speed maintenance depression amount, wherein, when a pedal depression amount exceeds the vehicle speed maintenance depression amount, the target reaction force setting unit performs a cruize assist whereby the target depression reaction force is set to a value of a cruize assist depression reaction force.
摘要翻译：一种加速踏板反作用力控制装置，用于控制设置在机动车辆上的加速器踏板的抑制反作用力，所述控制装置包括：反作用力致动器，其向加速踏板提供抑制反作用力; 目标反力设定单元，其设定目标抑制反作用力; 以及车速维持抑制量设定单元，其将用于维持当前车速的加速踏板的下压量设定为车速维持抑制量，其中，当踏板下压量超过车速维持抑制量时，所述目标反作用力设定单元进行冲击辅助，由此将目标抑制反作用力设定为冲击辅助抑制反作用力的值。

15. 发明授权

US08524534B2 Semiconductor device and manufacturing method thereof 有权
公开(公告)号：US08524534B2
公开(公告)日：2013-09-03
申请号：US13533779
申请日：2012-06-26
申请人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
发明人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
IPC分类号： H01L21/00
CPC分类号： H01L24/14 , H01L23/28 , H01L23/3128 , H01L23/50 , H01L23/5386 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0652 , H01L25/18 , H01L2224/1134 , H01L2224/13144 , H01L2224/16 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/06558 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/20752 , H01L2924/30105 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2224/92247 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2924/00011
摘要： Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).

16. 发明申请

US20120264240A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120264240A1
公开(公告)日：2012-10-18
申请号：US13533779
申请日：2012-06-26
申请人： Yoshiyuki KADO , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kirkuchi
发明人： Yoshiyuki KADO , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kirkuchi
IPC分类号： H01L21/50 , H01L21/66
CPC分类号： H01L24/14 , H01L23/28 , H01L23/3128 , H01L23/50 , H01L23/5386 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0652 , H01L25/18 , H01L2224/1134 , H01L2224/13144 , H01L2224/16 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/06558 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/20752 , H01L2924/30105 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2224/92247 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2924/00011
摘要： Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).
摘要翻译：在多芯片模块（MCM）中安装在封装基板（1）的主表面上的三个芯片（2A），（2B）和（2C）中，形成有DRAM的芯片（2A）和芯片（2B），其上形成有闪速存储器，通过Au凸块（4）与封装基板（1）的布线（5）电连接，并且在芯片（2A）的主表面（下表面）之间形成间隙，（2B）和封装基板（1）的主表面填充有未填充树脂（6）。其上形成有高速微处理器的芯片（2C）安装在两个芯片（2A）和（2B）上，并且通过Au导线（8）电连接到封装衬底（1）的焊盘（9）。

17. 发明授权

US08278147B2 Semiconductor device and manufacturing method thereof 失效
标题翻译：半导体装置及其制造方法
公开(公告)号：US08278147B2
公开(公告)日：2012-10-02
申请号：US12565747
申请日：2009-09-23
申请人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
发明人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
IPC分类号： H01L21/00
CPC分类号： H01L24/14 , H01L23/28 , H01L23/3128 , H01L23/50 , H01L23/5386 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0652 , H01L25/18 , H01L2224/1134 , H01L2224/13144 , H01L2224/16 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/06558 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/20752 , H01L2924/30105 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2224/92247 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2924/00011
摘要： Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).
摘要翻译：在多芯片模块（MCM）中安装在封装基板（1）的主表面上的三个芯片（2A），（2B）和（2C）中，形成有DRAM的芯片（2A）和芯片（2B），其上形成有闪速存储器，通过Au凸块（4）与封装基板（1）的布线（5）电连接，并且在芯片（2A）的主表面（下表面）之间形成间隙，（2B）和封装基板（1）的主表面填充有未填充树脂（6）。其上形成有高速微处理器的芯片（2C）安装在两个芯片（2A）和（2B）上，并且通过Au导线（8）电连接到封装衬底（1）的焊盘（9）。

18. 发明申请

US20110171780A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20110171780A1
公开(公告)日：2011-07-14
申请号：US13053410
申请日：2011-03-22
申请人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
发明人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
IPC分类号： H01L21/50
CPC分类号： H01L24/14 , H01L23/28 , H01L23/3128 , H01L23/50 , H01L23/5386 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0652 , H01L25/18 , H01L2224/1134 , H01L2224/13144 , H01L2224/16 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/06558 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/20752 , H01L2924/30105 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2224/92247 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2924/00011
摘要： Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).
摘要翻译：在多芯片模块（MCM）中安装在封装基板（1）的主表面上的三个芯片（2A），（2B）和（2C）中，形成有DRAM的芯片（2A）和芯片（2B），其上形成有闪速存储器，通过Au凸块（4）与封装基板（1）的布线（5）电连接，并且在芯片（2A）的主表面（下表面）之间形成间隙，（2B）和封装基板（1）的主表面填充有未填充树脂（6）。其上形成有高速微处理器的芯片（2C）安装在两个芯片（2A）和（2B）上，并且通过Au导线（8）电连接到封装衬底（1）的焊盘（9）。

19. 发明授权

US07859095B2 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07859095B2
公开(公告)日：2010-12-28
申请号：US12419357
申请日：2009-04-07
申请人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
发明人： Yoshiyuki Kado , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
IPC分类号： H01L23/498
CPC分类号： H01L24/14 , H01L23/28 , H01L23/3128 , H01L23/50 , H01L23/5386 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0652 , H01L25/18 , H01L2224/1134 , H01L2224/13144 , H01L2224/16 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/06558 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/20752 , H01L2924/30105 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2224/92247 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2924/00011
摘要： Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).
摘要翻译：在多芯片模块（MCM）中安装在封装基板（1）的主表面上的三个芯片（2A），（2B）和（2C）中，形成有DRAM的芯片（2A）和芯片（2B），其上形成有闪速存储器，通过Au凸块（4）与封装基板（1）的布线（5）电连接，并且在芯片（2A）的主表面（下表面）之间形成间隙，（2B）和封装基板（1）的主表面填充有未填充树脂（6）。其上形成有高速微处理器的芯片（2C）安装在两个芯片（2A）和（2B）上，并且通过Au导线（8）电连接到封装衬底（1）的焊盘（9）。

20. 发明申请

US20100015760A1 SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 失效
标题翻译：半导体器件及其制造方法
公开(公告)号：US20100015760A1
公开(公告)日：2010-01-21
申请号：US12565747
申请日：2009-09-23
申请人： Yoshiyuki KADO , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
发明人： Yoshiyuki KADO , Takahiro Naito , Toshihiko Sato , Hikaru Ikegami , Takafumi Kikuchi
IPC分类号： H01L21/50
CPC分类号： H01L24/14 , H01L23/28 , H01L23/3128 , H01L23/50 , H01L23/5386 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L24/97 , H01L25/0652 , H01L25/18 , H01L2224/1134 , H01L2224/13144 , H01L2224/16 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/49171 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/06558 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/0105 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/1433 , H01L2924/15173 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/20752 , H01L2924/30105 , H01L2924/00014 , H01L2224/85 , H01L2224/81 , H01L2224/83 , H01L2224/92247 , H01L2224/13099 , H01L2924/00 , H01L2924/00012 , H01L2924/00011
摘要： Of three chips (2A), (2B), and (2C) mounted on a main surface of a package substrate (1) in a multi-chip module (MCM), a chip (2A) with a DRAM formed thereon and a chip (2B) with a flash memory formed thereon are electrically connected to wiring lines (5) of the package substrate (1) through Au bumps (4), and a gap formed between main surfaces (lower surfaces) of the chips (2A), (2B) and a main surface of the package substrate (1) is filled with an under-fill resin (6). A chip (2C) with a high-speed microprocessor formed thereon is mounted over the two chips (2A) and (2B) and is electrically connected to bonding pads (9) of the package substrate (1) through Au wires (8).
摘要翻译：在多芯片模块（MCM）中安装在封装基板（1）的主表面上的三个芯片（2A），（2B）和（2C）中，形成有DRAM的芯片（2A）和芯片（2B），其上形成有闪速存储器，通过Au凸块（4）与封装基板（1）的布线（5）电连接，并且在芯片（2A）的主表面（下表面）之间形成间隙，（2B）和封装基板（1）的主表面填充有未填充树脂（6）。其上形成有高速微处理器的芯片（2C）安装在两个芯片（2A）和（2B）上，并且通过Au导线（8）电连接到封装衬底（1）的焊盘（9）。

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