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    • 11. 发明授权
    • Crutch pack
    • 拐杖包
    • US5465884A
    • 1995-11-14
    • US248959
    • 1994-05-25
    • Eric E. BohlBrent HaleTim Parker
    • Eric E. BohlBrent HaleTim Parker
    • A45B1/00A45B3/00A61H3/00A61H3/02
    • A45B1/00A45B3/00A45B2200/1054A61H2003/002A61H3/02
    • A carrying pack for a crutch and a method for using the pack are provided. The carrying pack has plural side walls and a bottom wall that are integrally coupled together about a cavity. Flaps extend from a back side wall for location about crutch arms. The flaps have apertures extending therethrough that accept the shaft of a crutch hand grip bolt therethrough. The hand grip bolt secures the flaps to the crutch arms, securing the pack to the crutch. Straps also extend from the back side wall. The straps may be cinched about the crutch to stabilize the pack on the crutch. Inner and outer pockets are provided in the carrying pack for further storage space.
    • 提供了用于拐杖的携带包和用于使用该包的方法。 承载包具有多个侧壁和底壁,其围绕空腔一体地联接在一起。 襟翼从背侧壁延伸,用于定位拐杖臂。 翼片具有穿过其中的孔,其接收通过其中的拐杖手柄螺栓的轴。 手柄螺栓将襟翼固定到拐杖臂上,将包装固定到拐杖上。 表带也从后壁延伸。 绑带可以围绕拐杖固定,以将包装稳定在拐杖上。 内袋和外袋设置在承载包中,用于进一步的存放空间。
    • 18. 发明授权
    • Automatic integrated circuit routing using spines
    • 使用脊柱自动集成电路布线
    • US07823113B1
    • 2010-10-26
    • US11530613
    • 2006-09-11
    • Mark WallerTim ParkerMark WilliamsJeremy BirchGraham BalsdonFumiako Sato
    • Mark WallerTim ParkerMark WilliamsJeremy BirchGraham BalsdonFumiako Sato
    • G06F17/50
    • G06F17/5077
    • A method and technique of routing interconnects of an integrated circuit providing improved routing quality. In an embodiment of the invention, the technique provides linear spine interconnect routing. In memory array blocks, such as in DRAM and SRAM memory designs, connected pins are generally separated by large distances in a first direction and small distances in a second direction, or a spine or channel region. A route area is defined within the spine region. In one embodiment, obstacles in the route area are identified and corresponding forbidden areas are demarcated. The linear spine interconnect is routed in the first direction within the route area while avoiding the forbidden areas. Pins are connected to the spine interconnect by stitching interconnects. Stitching interconnects are generally routed in the second direction.
    • 提供提供改进的路由质量的集成电路的互连路由的方法和技术。 在本发明的一个实施例中,该技术提供线性脊柱互连路由。 在诸如DRAM和SRAM存储器设计的存储器阵列块中,连接的引脚通常在第一方向上分开大距离,在第二方向或脊柱或通道区域上分开小距离。 在脊椎区域内定义路线区域。 在一个实施例中,识别路线区域中的障碍物并且划定对应的禁止区域。 线性脊线互连在路线区域内沿第一方向路由,同时避免禁止区域。 引脚通过缝合互连连接到脊柱互连。 缝合互连通常沿第二方向布线。
    • 20. 发明授权
    • Method of automatic shape-based routing of interconnects in spines for integrated circuit design
    • 用于集成电路设计的脊柱互连的自动形状路由的方法
    • US07257797B1
    • 2007-08-14
    • US10908895
    • 2005-05-31
    • Mark WallerTim ParkerMark WilliamsJeremy BirchGraham BalsdonFumiaki Sato
    • Mark WallerTim ParkerMark WilliamsJeremy BirchGraham BalsdonFumiaki Sato
    • G06F17/50
    • G06F17/5077
    • A method and technique of routing interconnects of an integrated circuit providing improved routing quality. In an embodiment of the invention, the technique provides linear spine interconnect routing. In memory array blocks, such as in DRAM and SRAM memory designs, connected pins are generally separated by large distances in a first direction and small distances in a second direction, or a spine or channel region. A route area is defined within the spine region. In one embodiment, obstacles in the route area are identified and corresponding forbidden areas are demarcated. The linear spine interconnect is routed in the first direction within the route area while avoiding the forbidden areas. Pins are connected to the spine interconnect by stitching interconnects. Stitching interconnects are generally routed in the second direction.
    • 提供提供改进的路由质量的集成电路的互连路由的方法和技术。 在本发明的一个实施例中,该技术提供线性脊柱互连路由。 在诸如DRAM和SRAM存储器设计的存储器阵列块中,连接的引脚通常在第一方向上分开大距离,在第二方向或脊柱或通道区域上分开小距离。 在脊椎区域内定义路线区域。 在一个实施例中,识别路线区域中的障碍物并且划定对应的禁止区域。 线性脊线互连在路线区域内沿第一方向路由,同时避免禁止区域。 引脚通过缝合互连连接到脊柱互连。 缝合互连通常沿第二方向布线。