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    • 12. 发明授权
    • Clock data recovery system
    • 时钟数据恢复系统
    • US06981168B2
    • 2005-12-27
    • US10284547
    • 2002-10-30
    • Martin SchmatzChristian MenofliThomas Morf
    • Martin SchmatzChristian MenofliThomas Morf
    • H03K5/1534H03L7/093H04L7/033G06F1/04
    • H03L7/093H03K5/1534H04L7/033
    • A clock data recovery system is provided for resampling a clock signal according to an incoming data signal stream. It comprises a clock generator for generating said clock signal wherein one of the frequency and phase of that clock signal is dependent upon a control signal. It is further provided a phase detector operable to detect the phase difference between said clock signal and said incoming data signal stream and is operable to generate a phase difference signal. A loop controller has a variable-gain and is operable to control said clock generator by generating said control signal. That control signal is dependent in said phase difference signal and that variable-gain. The variable-gain is dependent upon a transition rate of the incoming data signal stream. The loop controller can comprise a low-pass filter to generate from the phase difference signal a low-pass filered phase signal and to adjust the bandwidth of the clock data recovery system. The loop controller further can comprise a variable-gain element to amplify the filtered signal in accordance with a received bit transition rate provided by a bit transition detector and a density calculator.
    • 提供时钟数据恢复系统,用于根据输入数据信号流重新采样时钟信号。 它包括用于产生所述时钟信号的时钟发生器,其中该时钟信号的频率和相位之一取决于控制信号。 还提供了一种相位检测器,可操作以检测所述时钟信号和所述输入数据信号流之间的相位差,并可操作以产生相位差信号。 环路控制器具有可变增益,并且可操作以通过产生所述控制信号来控制所述时钟发生器。 该控制信号依赖于所述相位差信号和该可变增益。 可变增益取决于输入数据信号流的转换速率。 环路控制器可以包括低通滤波器,以从相位差信号产生低通档案相位信号并调整时钟数据恢复系统的带宽。 环路控制器还可以包括可变增益元件,以根据由位跃迁检测器和密度计算器提供的接收位转换速率来放大经滤波的信号。