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11. 发明授权

US08569212B2 Superconducting wire 有权
标题翻译：超导线
公开(公告)号：US08569212B2
公开(公告)日：2013-10-29
申请号：US13037475
申请日：2011-03-01
申请人： Hong Soo Ha , Sang Soo Oh , Seok Ho Kim , Gi Deok Shim
发明人： Hong Soo Ha , Sang Soo Oh , Seok Ho Kim , Gi Deok Shim
IPC分类号： H01B12/00
CPC分类号： H01L39/143 , H01F6/06 , H01L39/16
摘要： Disclosed herein is a superconducting wire which is used in, for example, superconducting magnet energy storage systems. The superconducting wire includes: a wire comprising a metal substrate, a superconducting layer and a buffer interposed between the metal substrate and the superconducting layer; and a stabilizer layer plated on the wire, wherein an epoxy resin insulating layer coats the entire surface of the stabilizer layer. The superconducting wire makes it possible to reduce damage to an insulating material when forming the insulating material during the production of the superconducting wire, and it has a uniform surface and can be produced in a simple manner.
摘要翻译：这里公开了用于例如超导磁体能量存储系统中的超导线。超导线包括：包括金属基底，超导层和介于金属基底和超导层之间的缓冲器的线; 以及镀在电线上的稳定层，其中环氧树脂绝缘层涂覆稳定层的整个表面。超导线材在制造超导线材时形成绝缘材料时可以减少对绝缘材料的损伤，并且具有均匀的表面并且可以以简单的方式制造。

12. 发明授权

US08431479B2 Semiconductor devices having redistribution structures and packages, and methods of forming the same 有权
标题翻译：具有再分布结构和封装的半导体器件及其形成方法
公开(公告)号：US08431479B2
公开(公告)日：2013-04-30
申请号：US12797837
申请日：2010-06-10
申请人： Ki-Hyuk Kim , Nam-Seog Kim , Hyun-Soo Chung , Seok-Ho Kim , Myeong-Soon Park , Chang-Woo Shin
发明人： Ki-Hyuk Kim , Nam-Seog Kim , Hyun-Soo Chung , Seok-Ho Kim , Myeong-Soon Park , Chang-Woo Shin
IPC分类号： H01L21/4763
CPC分类号： H01L21/76813 , H01L21/561 , H01L21/76879 , H01L23/3114 , H01L23/3171 , H01L23/49816 , H01L23/525 , H01L24/03 , H01L24/05 , H01L24/13 , H01L24/48 , H01L24/73 , H01L25/0657 , H01L25/105 , H01L2224/02317 , H01L2224/0401 , H01L2224/04042 , H01L2224/05599 , H01L2224/13021 , H01L2224/13022 , H01L2224/16145 , H01L2224/16225 , H01L2224/32225 , H01L2224/48145 , H01L2224/48227 , H01L2224/73265 , H01L2225/06506 , H01L2225/0651 , H01L2225/06513 , H01L2225/06517 , H01L2225/06527 , H01L2225/06541 , H01L2225/06562 , H01L2225/1023 , H01L2225/1041 , H01L2225/1058 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01029 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/15311 , H01L2924/15788 , H01L2924/181 , H01L2924/00 , H01L2224/32145 , H01L2924/00012 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： Semiconductor devices and methods of forming the same, including forming a chip pad on a chip substrate, forming a passivation layer on the chip pad and the chip substrate, forming a first insulation layer on the passivation layer, forming a recess and a first opening in the first insulation layer, forming a second opening in the passivation layer to correspond to the first opening, forming a redistribution line in a redistribution line area of the recess, the first opening, and the second opening, forming a second insulation layer on the redistribution line and the first insulation layer, and forming an opening in the second insulation to expose a portion of the redistribution line as a redistribution pad.
摘要翻译：半导体器件及其形成方法，包括在芯片衬底上形成芯片焊盘，在芯片焊盘和芯片衬底上形成钝化层，在钝化层上形成第一绝缘层，形成凹槽和第一开口所述第一绝缘层在所述钝化层中形成对应于所述第一开口的第二开口，在所述凹部，所述第一开口和所述第二开口的再分布线区域中形成再分配线，在所述再分布上形成第二绝缘层线和第一绝缘层，并且在第二绝缘体中形成开口以将再分配线的一部分暴露为再分布焊盘。

13. 发明授权

US08390608B2 Plasma display apparatus 失效
标题翻译：等离子显示装置
公开(公告)号：US08390608B2
公开(公告)日：2013-03-05
申请号：US12487692
申请日：2009-06-19
申请人： Dong Hyun Park , Seok Ho Kim , Young Seop Moon , Hyung Jae Kim
发明人： Dong Hyun Park , Seok Ho Kim , Young Seop Moon , Hyung Jae Kim
IPC分类号： G06F3/038 , G09G5/00 , G09G3/28
CPC分类号： G09G3/294 , G09G3/2925 , G09G2310/04 , G09G2320/0228
摘要： A plasma display apparatus according to the present invention efficiently accumulates charges in respective electrodes, using a driving signal supplied in a second set-down period, to prevent a flickering erroneous discharge caused by deficiency of wall charges. As a result, the plasma display apparatus can improve picture quality of a display image.
摘要翻译：根据本发明的等离子体显示装置使用在第二设定周期内提供的驱动信号，有效地将电荷累积在各个电极中，以防止壁电荷不足引起的闪烁的错误放电。结果，等离子体显示装置可以提高显示图像的图像质量。

14. 发明申请

US20110218112A1 Superconducting Wire 有权
标题翻译：超导线
公开(公告)号：US20110218112A1
公开(公告)日：2011-09-08
申请号：US13037475
申请日：2011-03-01
申请人： Hong Soo Ha , Sang Soo Oh , Seok Ho Kim , Gi Deok Shim
发明人： Hong Soo Ha , Sang Soo Oh , Seok Ho Kim , Gi Deok Shim
IPC分类号： H01B12/04
CPC分类号： H01L39/143 , H01F6/06 , H01L39/16
摘要： Disclosed herein is a superconducting wire which is used in, for example, superconducting magnet energy storage systems. The superconducting wire includes: a wire comprising a metal substrate, a superconducting layer and a buffer interposed between the metal substrate and the superconducting layer; and a stabilizer layer plated on the wire, wherein an epoxy resin insulating layer coats the entire surface of the stabilizer layer. The superconducting wire makes it possible to reduce damage to an insulating material when forming the insulating material during the production of the superconducting wire, and it has a uniform surface and can be produced in a simple manner.
摘要翻译：这里公开了用于例如超导磁体能量存储系统中的超导线。超导线包括：包括金属基底，超导层和介于金属基底和超导层之间的缓冲器的线; 以及镀在电线上的稳定层，其中环氧树脂绝缘层涂覆稳定层的整个表面。超导线材在制造超导线材时形成绝缘材料时可以减少对绝缘材料的损伤，并且具有均匀的表面并且可以以简单的方式制造。

15. 发明申请

US20100053036A1 PLASMA DISPLAY APPARATUS 失效
标题翻译：等离子显示设备
公开(公告)号：US20100053036A1
公开(公告)日：2010-03-04
申请号：US12487697
申请日：2009-06-19
申请人： Seok Ho KIM , Hyung Jae KIM , Dong Hyun PARK
发明人： Seok Ho KIM , Hyung Jae KIM , Dong Hyun PARK
IPC分类号： G09G3/28
CPC分类号： G09G3/2932 , G09G3/2927 , G09G2310/0218 , G09G2310/066
摘要： A plasma display apparatus according to the present invention can drive a panel at a high speed, and reduce a brightness difference which may be generated in block driving, to thereby improve picture quality of a display image.
摘要翻译：根据本发明的等离子体显示装置可以高速驱动面板，并且减少在块驱动中可能产生的亮度差，从而提高显示图像的图像质量。

16. 发明申请

US20100045653A1 PLASMA DISPLAY DEVICE 审中-公开
标题翻译：等离子体显示设备
公开(公告)号：US20100045653A1
公开(公告)日：2010-02-25
申请号：US12432255
申请日：2009-04-29
申请人： Dong Hyun PARK , Seok Ho Kim , Hyung Jae Kim
发明人： Dong Hyun PARK , Seok Ho Kim , Hyung Jae Kim
IPC分类号： G06F3/038 , G09G3/28
CPC分类号： G09G3/2932 , G09G2310/0218 , G09G2310/066 , G09G2320/0228
摘要： A plasma display device is provided. The plasma display device may include a plasma display panel (PDP) including an upper substrate having a plurality of scan electrodes and a plurality of sustain electrodes formed thereon and a lower substrate having a plurality of address electrodes formed thereon; and a driving unit applying a number of driving signals to the scan electrodes, the sustain electrodes and the address electrodes, wherein the scan electrodes are divided into two or more groups including first and second groups, at least one of a plurality of subfields includes a first scan period during which a scan signal is applied to the scan electrodes included in the first group, a second scan period during which a scan signal is applied to the scan electrodes included in the second group, and a setting period between the first and second scan periods, and the time of application of a first pulse to the sustain electrodes during the setting period is earlier than the time of application of a second pulse applied to the scan electrodes during the setting period.
摘要翻译：提供等离子体显示装置。等离子体显示装置可以包括等离子体显示面板（PDP），其包括具有形成在其上的多个扫描电极和多个维持电极的上基板和形成有多个寻址电极的下基板; 以及向扫描电极，维持电极和寻址电极施加多个驱动信号的驱动单元，其中扫描电极被分成包括第一组和第二组的两个或更多个组，多个子场中的至少一个子场包括扫描信号施加到第一组中包括的扫描电极的第一扫描周期，扫描信号施加到包括在第二组中的扫描电极的第二扫描周期以及第一和第二扫描周期之间的设定周期扫描周期，并且在设定周期期间向维持电极施加第一脉冲的时间早于在设定周期期间施加到扫描电极的第二脉冲的时间。

17. 发明申请

US20080230923A1 CHIP STACK PACKAGE AND METHOD OF MANUFACTURING THE CHIP STACK PACKAGE 审中-公开
标题翻译：芯片堆叠包装和制造芯片堆叠包装的方法
公开(公告)号：US20080230923A1
公开(公告)日：2008-09-25
申请号：US12051619
申请日：2008-03-19
申请人： Cha-Jea JO , Myung-Kee CHUNG , Nam-Seog KIM , In-Young LEE , Seok-Ho KIM , Ho-Jin LEE , Ju-Il CHOI , Chang-Woo SHIN
发明人： Cha-Jea JO , Myung-Kee CHUNG , Nam-Seog KIM , In-Young LEE , Seok-Ho KIM , Ho-Jin LEE , Ju-Il CHOI , Chang-Woo SHIN
IPC分类号： H01L23/52 , H01L21/00
CPC分类号： H01L23/3128 , H01L21/76898 , H01L23/481 , H01L25/0657 , H01L25/50 , H01L2224/05001 , H01L2224/05009 , H01L2224/05025 , H01L2224/05124 , H01L2224/05166 , H01L2224/05181 , H01L2224/05184 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/13025 , H01L2224/16145 , H01L2225/06513 , H01L2225/06527 , H01L2225/06541 , H01L2924/00014 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/15311 , H01L2224/05599
摘要： A chip stack package includes a substrate, a plurality of chips, a plurality of adhesive layers and a plug. The substrate has a wiring pattern and a seed layer formed on the wiring pattern. Each of the chips has an electrode pad and a first through-hole that penetrates the electrode pad. The chips are stacked such that the first through-holes are aligned on the seed layer of the substrate. The adhesive layers are interposed between the substrate and one of the chips, as well as between the chips. Each of the adhesive layers has a second through-hole connected to the first through-hole. The plug fills up the first through-holes and the second through-holes and electrically connects the electrode pads to the wiring pattern of the substrate. A cross-sectional area of the plug in the second through-holes may be larger than that of the plug in the first through-holes.
摘要翻译：芯片堆叠封装包括基板，多个芯片，多个粘合剂层和插头。基板具有形成在布线图案上的布线图案和种子层。每个芯片具有电极焊盘和穿过电极焊盘的第一通孔。芯片被堆叠，使得第一通孔在衬底的籽晶层上排列。粘合层介于基片和芯片之一之间以及芯片之间。每个粘合层具有连接到第一通孔的第二通孔。插头填充第一通孔和第二通孔，并将电极焊盘电连接到衬底的布线图案。第二通孔中的插塞的横截面面积可以大于第一通孔中的插头的横截面面积。

18. 发明授权

US06996767B2 Memory configuration scheme enabling parallel decoding of turbo codes 失效
标题翻译：内存配置方案支持turbo码并行解码
公开(公告)号：US06996767B2
公开(公告)日：2006-02-07
申请号：US10211479
申请日：2002-08-02
申请人： Hyokang Chang , Seok Ho Kim
发明人： Hyokang Chang , Seok Ho Kim
IPC分类号： H03M13/00
CPC分类号： H03M13/3905 , H03M13/2957 , H03M13/3972
摘要： A memory configuration scheme that enables parallel decoding of a single block of turbo-encoded data is described. In this scheme a single code block is divided into multiple subblocks and decoding is performed on subblocks in parallel. The turbo decoder memory is configured so that subblock decoders can access the common memory resources independently of each other. This scheme is different from existing parallel decoding schemes in that it achieves the parallel implementation by applying multiple decoders to a single code block, not by assigning multiple decoders to multiple code blocks. The advantages of this scheme include minimum memory requirement and minimum decoding latency. The minimum memory requirement results from the fact that it needs memory resources only for a single code block regardless of the number of decoders used. The decoding latency is minimum since decoding of a code block is over when decoding on subblocks is completed.
摘要翻译：描述了能够并行解码单个turbo编码数据块的存储器配置方案。在该方案中，单个码块被划分为多个子块，并且对子块并行地执行解码。 turbo解码器存储器被配置为使得子块解码器可以彼此独立地访问公共存储器资源。该方案与现有的并行解码方案不同，它通过将多个解码器应用于单个码块来实现并行实现，而不是通过将多个解码器分配给多个码块。该方案的优点包括最小内存要求和最小解码延迟。最小内存要求是由于只需要单个代码块的内存资源，而不管使用的解码器数量如何。解码等待时间是最小的，因为在子块上的解码完成时，码块的解码结束。

19. 发明申请

US20080157287A1 Semiconductor devices and methods of forming the same 审中-公开
标题翻译：半导体器件及其形成方法
公开(公告)号：US20080157287A1
公开(公告)日：2008-07-03
申请号：US12003798
申请日：2008-01-02
申请人： Ju-Il Choi , Cha-Jea Jo , Seok-Ho Kim , Chang-Woo Shin
发明人： Ju-Il Choi , Cha-Jea Jo , Seok-Ho Kim , Chang-Woo Shin
IPC分类号： H01L21/768 , H01L23/48
CPC分类号： H01L25/0657 , H01L21/76898 , H01L2224/05001 , H01L2224/05009 , H01L2224/05181 , H01L2224/0557 , H01L2224/13025 , H01L2224/16 , H01L2224/16145 , H01L2225/06513 , H01L2225/06541 , H01L2225/06544 , H01L2225/06565 , H01L2924/00014 , H01L2224/05599
摘要： A semiconductor device and methods of forming the same are provided. The methods may include forming a hole in a preliminary semiconductor substrate, forming an insulating layer in the hole of the preliminary semiconductor substrate, forming a plating conductive layer on the insulating layer and the preliminary semiconductor substrate, forming a seed metal layer contacting the plating conductive layer at a lower portion of the hole and growing the seed metal layer to form a through-silicon via (TSV). The TSV may be formed through an electroplating process such that the seed metal layer grows from the lower portion of the hole to an upper portion of the hole.
摘要翻译：提供半导体器件及其形成方法。所述方法可以包括在初步半导体衬底中形成孔，在初步半导体衬底的孔中形成绝缘层，在绝缘层和初级半导体衬底上形成电镀导电层，形成与电镀导电性接触的晶种金属层层，并且生长种子金属层以形成穿硅通孔（TSV）。 TSV可以通过电镀工艺形成，使得种子金属层从孔的下部生长到孔的上部。

20. 发明申请

US20080111661A1 Method and system for transmission power reduction in RFID interrogators 审中-公开
标题翻译： RFID读写器传输功率降低的方法和系统
公开(公告)号：US20080111661A1
公开(公告)日：2008-05-15
申请号：US11599387
申请日：2006-11-15
申请人： Lang Lin , Seok Ho Kim , Jens Arnold , Mohammad Soleimani , Victor Hugo Molina
发明人： Lang Lin , Seok Ho Kim , Jens Arnold , Mohammad Soleimani , Victor Hugo Molina
IPC分类号： H04Q5/22
CPC分类号： G06K7/0008 , H04B5/0062 , H04W52/367
摘要： Methods, systems, and apparatuses for reading tags of tag populations are described. Rather than interrogating a tag population in a single query round, interrogations of tag populations are performed using reduced transmit power levels over multiple query rounds, each query round reading a portion of the tag population. In this manner, an overall power amount expended to transmit interrogations signals is reduced, while maintaining a substantially similar read rate as in single query round interrogations.
摘要翻译：描述了用于读取标签种群标签的方法，系统和装置。不是在单个查询循环中询问标签群体，而是使用多个查询轮次的减少的发送功率级别来执行标签群的询问，每个轮询读取标签群的一部分。以这种方式，减少了用于发送询问信号的总功率量，同时保持与单查询循环询问中相似的读取速率。

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