会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 15. 发明申请
    • LIQUID CRYSTAL DISPLAY AND METHOD OF DRIVING THE SAME
    • 液晶显示器及其驱动方法
    • US20080036934A1
    • 2008-02-14
    • US11834832
    • 2007-08-07
    • Yoon-Sung UMJi-Won SohnJin-Won ParkKang-Woo KimSeon-Ah Cho
    • Yoon-Sung UMJi-Won SohnJin-Won ParkKang-Woo KimSeon-Ah Cho
    • G02F1/133
    • G09G3/3659G09G3/3614G09G2300/0876G09G2310/061G09G2310/08G09G2320/0261
    • A liquid crystal display includes a gate driver generating a gate voltage including a gate on voltage and a gate off voltage, wherein the gate on voltage is applied for a first sub-frame and the gate off voltage is applied for a second sub-frame for at least one frame period, a data driver generating a data voltage, a plurality of gate lines sequentially receiving the gate voltage from the gate driver, a plurality of data lines receiving the data voltage from the data driver and insulated from the gate lines while crossing the gate lines, and a plurality of pixels formed on intersection areas of the gate lines and the data lines. Each of the pixels include a switching device operated by the gate voltage, a liquid crystal capacitor formed between a pixel electrode connected to the data line through the switching device and a common electrode corresponding to the pixel electrode, and a storage capacitor formed between a previous gate line and the pixel electrode, wherein a pixel electrode voltage applied to the pixel electrode is changed by the gate off voltage that is input to the previous gate line during the second sub-frame of the at least one frame period.
    • 液晶显示器包括栅极驱动器,其生成包括栅极导通电压和栅极截止电压的栅极电压,其中栅极导通电压被施加到第一子帧,并且栅极截止电压被施加到第二子帧 至少一个帧周期,产生数据电压的数据驱动器,顺序地从栅极驱动器接收栅极电压的多个栅极线;多个数据线,从数据驱动器接收数据电压,并跨越栅极线绝缘 栅极线和形成在栅极线和数据线的交叉区域上的多个像素。 每个像素包括由栅极电压操作的开关器件,形成在通过开关器件连接到数据线的像素电极和与像素电极相对应的公共电极之间的液晶电容器,以及形成在前一个 栅极线和像素电极,其中施加到像素电极的像素电极电压在至少一个帧周期的第二子帧期间被输入到先前栅极线的栅极截止电压改变。
    • 16. 发明授权
    • Planarization method for a semiconductor device
    • 半导体器件的平面化方法
    • US6117787A
    • 2000-09-12
    • US13095
    • 1998-01-26
    • Jin-Won Park
    • Jin-Won Park
    • H01L21/3205H01L21/302H01L21/31H01L21/316H01L21/768H01L21/3056
    • H01L21/76819
    • A method of planarizing a multilayer semiconductor wiring structure includes the steps of forming a planarization layer on a substrate, forming a first conductive line pattern over the planarization layer, forming an insulation layer over the first conductive line pattern and the planarization layer, forming holes in the insulation layer to selectively expose portions of a top surface of the first conductive line pattern, forming a second conductive line pattern over the insulation layer, over portions of the first conductive line pattern, selectively in contact with the first conductive layer through the holes, and filling the holes, and forming a passivation layer over the second conductive line pattern, wherein conductive lines of the first conductive line pattern have a width of less than approximately 2 .mu.m.
    • 平面化多层半导体布线结构的方法包括以下步骤:在衬底上形成平坦化层,在平坦化层上形成第一导电线图案,在第一导电线图案和平坦化层上形成绝缘层,在 所述绝缘层选择性地暴露所述第一导电线图案的顶表面的部分,在所述绝缘层上形成第二导线图案,所述第一导电线图案的部分通过所述孔选择性地与所述第一导电层接触, 并填充所述孔,并在所述第二导线图案上形成钝化层,其中所述第一导线图案的导线具有小于约2μm的宽度。