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11. 发明申请

US20100067298A1 Flash EEprom System With Simultaneous Multiple Data Sector Programming and Storage of Physical Block Characteristics in Other Designated Blocks 有权
标题翻译：闪存EEprom系统具有同时多数据扇区编程和存储其他指定块中的物理块特性
公开(公告)号：US20100067298A1
公开(公告)日：2010-03-18
申请号：US12624258
申请日：2009-11-23
申请人： Kevin M. Conley , John S. Mangan , Jeffrey G. Craig
发明人： Kevin M. Conley , John S. Mangan , Jeffrey G. Craig
IPC分类号： G11C16/04 , G11C16/10
CPC分类号： G11C16/107 , G06F12/0246 , G06F2212/7203 , G06F2212/7207 , G06F2212/7208 , G11C16/10 , G11C16/3459 , G11C29/82 , G11C2216/14
摘要： A non-volatile memory system is formed of floating gate memory cells arranged in blocks as the smallest unit of memory cells that are erasable together. The system includes a number of features that may be implemented individually or in various cooperative combinations. One feature is the storage in separate blocks of the characteristics of a large number of blocks of cells in which user data is stored. These characteristics for user data blocks being accessed may, during operation of the memory system by its controller, be stored in a random access memory for ease of access and updating. According to another feature, multiple sectors of user data are stored at one time by alternately streaming chunks of data from the sectors to multiple memory blocks. Bytes of data in the stream may be shifted to avoid defective locations in the memory such as bad columns. Error correction codes may also be generated from the streaming data with a single generation circuit for the multiple sectors of data. The stream of data may further be transformed in order to tend to even out the wear among the blocks of memory. Yet another feature, for memory systems having multiple memory integrated circuit chips, provides a single system record that includes the capacity of each of the chips and assigned contiguous logical address ranges of user data blocks within the chips which the memory controller accesses when addressing a block, making it easier to manufacture a memory system with memory chips having different capacities. A typical form of the memory system is as a card that is removably connectable with a host system but may alternatively be implemented in a memory embedded in a host system. The memory cells may be operated with multiple states in order to store more than one bit of data per cell.
摘要翻译：非易失性存储器系统由以块为单位布置的浮动栅极存储单元形成为可以一起可擦除的最小单元的存储器单元。该系统包括可以单独地或以各种协作组合实现的多个特征。一个特征是在单独的块中存储其中存储用户数据的大量小区块的特性。正在访问的用户数据块的这些特征可以在存储器系统由其控制器操作期间被存储在随机存取存储器中以便于访问和更新。根据另一特征，通过将来自扇区的数据块交替地流向多个存储块，一次存储多个扇区的用户数据。可以移动流中的数据字节以避免存储器中的不良位置，例如不良列。也可以通过用于多扇区数据的单一生成电路从流数据生成纠错码。可以进一步转换数据流，以便趋向于均匀地消除存储器块之间的磨损。对于具有多个存储器集成电路芯片的存储器系统，又一特征提供了单个系统记录，该系统记录包括每个芯片的容量，并且在寻址块时存储器控制器访问的芯片内分配的用户数据块的连续逻辑地址范围，使得容易制造具有不同容量的存储器芯片的存储器系统。存储器系统的典型形式是可拆卸地与主机系统连接的卡，但是也可以在嵌入在主机系统中的存储器中实现。存储器单元可以以多种状态操作，以便存储每个单元的多于一位的数据。

12. 发明申请

US20100049910A1 Flash EEprom System With Simultaneous Multiple Data Sector Programming and Storage of Physical Block Characteristics in Other Designated Blocks 有权
公开(公告)号：US20100049910A1
公开(公告)日：2010-02-25
申请号：US12611280
申请日：2009-11-03
申请人： Kevin M. Conley , John S. Mangan , Jeffrey G. Craig
发明人： Kevin M. Conley , John S. Mangan , Jeffrey G. Craig
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G11C16/107 , G06F12/0246 , G06F2212/7203 , G06F2212/7207 , G06F2212/7208 , G11C16/10 , G11C16/3459 , G11C29/82 , G11C2216/14
摘要： A non-volatile memory system is formed of floating gate memory cells arranged in blocks as the smallest unit of memory cells that are erasable together. The system includes a number of features that may be implemented individually or in various cooperative combinations. One feature is the storage in separate blocks of the characteristics of a large number of blocks of cells in which user data is stored. These characteristics for user data blocks being accessed may, during operation of the memory system by its controller, be stored in a random access memory for ease of access and updating. According to another feature, multiple sectors of user data are stored at one time by alternately streaming chunks of data from the sectors to multiple memory blocks. Bytes of data in the stream may be shifted to avoid defective locations in the memory such as bad columns. Error correction codes may also be generated from the streaming data with a single generation circuit for the multiple sectors of data. The stream of data may further be transformed in order to tend to even out the wear among the blocks of memory. Yet another feature, for memory systems having multiple memory integrated circuit chips, provides a single system record that includes the capacity of each of the chips and assigned contiguous logical address ranges of user data blocks within the chips which the memory controller accesses when addressing a block, making it easier to manufacture a memory system with memory chips having different capacities. A typical form of the memory system is as a card that is removably connectable with a host system but may alternatively be implemented in a memory embedded in a host system. The memory cells may be operated with multiple states in order to store more than one bit of data per cell.

13. 发明授权

US07646667B2 Flash EEprom system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks 有权
标题翻译：闪存EEprom系统，具有同时多个数据扇区编程和存储其他指定块中的物理块特性
公开(公告)号：US07646667B2
公开(公告)日：2010-01-12
申请号：US12403014
申请日：2009-03-12
申请人： Kevin M. Conley , John S. Mangan , Jeffrey G. Craig
发明人： Kevin M. Conley , John S. Mangan , Jeffrey G. Craig
IPC分类号： G11C8/00
CPC分类号： G11C16/107 , G06F12/0246 , G06F2212/7203 , G06F2212/7207 , G06F2212/7208 , G11C16/10 , G11C16/3459 , G11C29/82 , G11C2216/14
摘要： A non-volatile memory system is formed of floating gate memory cells arranged in blocks as the smallest unit of memory cells that are erasable together. The system includes a number of features that may be implemented individually or in various cooperative combinations. One feature is the storage in separate blocks of the characteristics of a large number of blocks of cells in which user data is stored. These characteristics for user data blocks being accessed may, during operation of the memory system by its controller, be stored in a random access memory for ease of access and updating. According to another feature, multiple sectors of user data are stored at one time by alternately streaming chunks of data from the sectors to multiple memory blocks. Bytes of data in the stream may be shifted to avoid defective locations in the memory such as bad columns. Error correction codes may also be generated from the streaming data with a single generation circuit for the multiple sectors of data. The stream of data may further be transformed in order to tend to even out the wear among the blocks of memory. Yet another feature, for memory systems having multiple memory integrated circuit chips, provides a single system record that includes the capacity of each of the chips and assigned contiguous logical address ranges of user data blocks within the chips which the memory controller accesses when addressing a block, making it easier to manufacture a memory system with memory chips having different capacities. A typical form of the memory system is as a card that is removably connectable with a host system but may alternatively be implemented in a memory embedded in a host system. The memory cells may be operated with multiple states in order to store more than one bit of data per cell.
摘要翻译：非易失性存储器系统由以块为单位布置的浮动栅极存储单元形成为可以一起可擦除的最小单元的存储器单元。该系统包括可以单独地或以各种协作组合实现的多个特征。一个特征是在单独的块中存储其中存储用户数据的大量小区块的特性。正在访问的用户数据块的这些特征可以在存储器系统由其控制器操作期间被存储在随机存取存储器中以便于访问和更新。根据另一特征，通过将来自扇区的数据块交替地流向多个存储块，一次存储多个扇区的用户数据。可以移动流中的数据字节以避免存储器中的不良位置，例如不良列。也可以通过用于多扇区数据的单一生成电路从流数据生成纠错码。可以进一步转换数据流，以便趋向于均匀地消除存储器块之间的磨损。对于具有多个存储器集成电路芯片的存储器系统，又一特征提供了单个系统记录，该系统记录包括每个芯片的容量，并且在寻址块时存储器控制器访问的芯片内分配的用户数据块的连续逻辑地址范围，使得容易制造具有不同容量的存储器芯片的存储器系统。存储器系统的典型形式是可拆卸地与主机系统连接的卡，但是也可以在嵌入在主机系统中的存储器中实现。存储器单元可以以多种状态操作，以便存储每个单元的多于一位的数据。

14. 发明申请

US20090175082A1 Flash EEprom System With Simultaneous Multiple Data Sector Programming and Storage of Physical Block Characteristics in Other Designated Blocks 有权
公开(公告)号：US20090175082A1
公开(公告)日：2009-07-09
申请号：US12402955
申请日：2009-03-12
申请人： Kevin M. Conley , John S. Mangan , Jeffrey G. Craig
发明人： Kevin M. Conley , John S. Mangan , Jeffrey G. Craig
IPC分类号： G11C16/04 , G11C16/06
CPC分类号： G11C16/107 , G06F12/0246 , G06F2212/7203 , G06F2212/7207 , G06F2212/7208 , G11C16/10 , G11C16/3459 , G11C29/82 , G11C2216/14
摘要： A non-volatile memory system is formed of floating gate memory cells arranged in blocks as the smallest unit of memory cells that are erasable together. The system includes a number of features that may be implemented individually or in various cooperative combinations. One feature is the storage in separate blocks of the characteristics of a large number of blocks of cells in which user data is stored. These characteristics for user data blocks being accessed may, during operation of the memory system by its controller, be stored in a random access memory for ease of access and updating. According to another feature, multiple sectors of user data are stored at one time by alternately streaming chunks of data from the sectors to multiple memory blocks. Bytes of data in the stream may be shifted to avoid defective locations in the memory such as bad columns. Error correction codes may also be generated from the streaming data with a single generation circuit for the multiple sectors of data. The stream of data may further be transformed in order to tend to even out the wear among the blocks of memory. Yet another feature, for memory systems having multiple memory integrated circuit chips, provides a single system record that includes the capacity of each of the chips and assigned contiguous logical address ranges of user data blocks within the chips which the memory controller accesses when addressing a block, making it easier to manufacture a memory system with memory chips having different capacities. A typical form of the memory system is as a card that is removably connectable with a host system but may alternatively be implemented in a memory embedded in a host system. The memory cells may be operated with multiple states in order to store more than one bit of data per cell.

15. 发明授权

US07362613B2 Flash EEPROM system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks 有权
标题翻译：闪存EEPROM系统具有同时多个数据扇区编程和存储其他指定块中的物理块特性
公开(公告)号：US07362613B2
公开(公告)日：2008-04-22
申请号：US11679012
申请日：2007-02-26
申请人： Kevin M. Conley , John S. Mangan , Jeffrey G. Craig
发明人： Kevin M. Conley , John S. Mangan , Jeffrey G. Craig
IPC分类号： G11C16/04
CPC分类号： G11C16/107 , G06F12/0246 , G06F2212/7203 , G06F2212/7207 , G06F2212/7208 , G11C16/10 , G11C16/3459 , G11C29/82 , G11C2216/14
摘要： A non-volatile memory system is formed of floating gate memory cells arranged in blocks as the smallest unit of memory cells that are erasable together. The system includes a number of features that may be implemented individually or in various cooperative combinations. One feature is the storage in separate blocks of the characteristics of a large number of blocks of cells in which user data is stored. These characteristics for user data blocks being accessed may, during operation of the memory system by its controller, be stored in a random access memory for ease of access and updating. According to another feature, multiple sectors of user data are stored at one time by alternately streaming chunks of data from the sectors to multiple memory blocks. Bytes of data in the stream may be shifted to avoid defective locations in the memory such as bad columns. Error correction codes may also be generated from the streaming data with a single generation circuit for the multiple sectors of data. The stream of data may further be transformed in order to tend to even out the wear among the blocks of memory. Yet another feature, for memory systems having multiple memory integrated circuit chips, provides a single system record that includes the capacity of each of the chips and assigned contiguous logical address ranges of user data blocks within the chips which the memory controller accesses when addressing a block, making it easier to manufacture a memory system with memory chips having different capacities. A typical form of the memory system is as a card that is removably connectable with a host system but may alternatively be implemented in a memory embedded in a host system. The memory cells may be operated with multiple states in order to store more than one bit of data per cell.
摘要翻译：非易失性存储器系统由以块为单位布置的浮动栅极存储单元形成为可以一起可擦除的最小单元的存储器单元。该系统包括可以单独地或以各种协作组合实现的多个特征。一个特征是在单独的块中存储其中存储用户数据的大量小区块的特性。正在访问的用户数据块的这些特征可以在存储器系统由其控制器操作期间被存储在随机存取存储器中以便于访问和更新。根据另一特征，通过将来自扇区的数据块交替地流向多个存储块，一次存储多个扇区的用户数据。可以移动流中的数据字节以避免存储器中的不良位置，例如不良列。也可以通过用于多扇区数据的单一生成电路从流数据生成纠错码。可以进一步转换数据流，以便趋向于均匀地消除存储器块之间的磨损。对于具有多个存储器集成电路芯片的存储器系统，又一特征提供了单个系统记录，该系统记录包括每个芯片的容量，并且在寻址块时存储器控制器访问的芯片内分配的用户数据块的连续逻辑地址范围，使得容易制造具有不同容量的存储器芯片的存储器系统。存储器系统的典型形式是可拆卸地与主机系统连接的卡，但是也可以在嵌入在主机系统中的存储器中实现。存储器单元可以以多种状态操作，以便存储每个单元的多于一位的数据。

16. 发明授权

US06426893B1 Flash eeprom system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks 有权
标题翻译：闪存eeprom系统具有同时多个数据扇区编程和存储其他指定块中的物理块特性
公开(公告)号：US06426893B1
公开(公告)日：2002-07-30
申请号：US09505555
申请日：2000-02-17
申请人： Kevin M. Conley , John S. Mangan , Jeffrey G. Craig
发明人： Kevin M. Conley , John S. Mangan , Jeffrey G. Craig
IPC分类号： G11C1604
CPC分类号： G11C16/107 , G06F12/0246 , G06F2212/7203 , G06F2212/7207 , G06F2212/7208 , G11C16/10 , G11C16/3459 , G11C29/82 , G11C2216/14
摘要： A non-volatile memory system is formed of floating gate memory cells arranged in blocks as the smallest unit of memory cells that are erasable together. The system includes a number of features that may be implemented individually or in various cooperative combinations. One feature is the storage in separate blocks of the characteristics of a large number of blocks of cells in which user data is stored. These characteristics for user data blocks being accessed may, during operation of the memory system by its controller, be stored in a random access memory for ease of access and updating. According to another feature, multiple sectors of user data are stored at one time by alternately streaming chunks of data from the sectors to multiple memory blocks. Bytes of data in the stream may be shifted to avoid defective locations in the memory such as bad columns. Error correction codes may also be generated from the streaming data with a single generation circuit for the multiple sectors of data. The stream of data may further be transformed in order to tend to even out the wear among the blocks of memory. Yet another feature, for memory systems having multiple memory integrated circuit chips, provides a single system record that includes the capacity of each of the chips and assigned contiguous logical address ranges of user data blocks within the chips which the memory controller accesses when addressing a block, making it easier to manufacture a memory system with memory chips having different capacities. A typical form of the memory system is as a card that is removably connectable with a host system but may alternatively be implemented in a memory embedded in a host system. The memory cells may be operated with multiple states in order to store more than one bit of data per cell.
摘要翻译：非易失性存储器系统由以块为单位布置的浮动栅极存储单元形成为可以一起可擦除的最小单元的存储器单元。该系统包括可以单独地或以各种协作组合实现的多个特征。一个特征是在单独的块中存储其中存储用户数据的大量小区块的特性。正在访问的用户数据块的这些特征可以在存储器系统由其控制器操作期间被存储在随机存取存储器中以便于访问和更新。根据另一特征，通过将来自扇区的数据块交替地流向多个存储块，一次存储多个扇区的用户数据。可以移动流中的数据字节以避免存储器中的不良位置，例如不良列。也可以通过用于多扇区数据的单一生成电路从流数据生成纠错码。可以进一步转换数据流，以便趋向于均匀地消除存储器块之间的磨损。对于具有多个存储器集成电路芯片的存储器系统，又一特征提供了单个系统记录，该系统记录包括每个芯片的容量，并且在寻址块时存储器控制器访问的芯片内分配的用户数据块的连续逻辑地址范围，使得容易制造具有不同容量的存储器芯片的存储器系统。存储器系统的典型形式是可拆卸地与主机系统连接的卡，但是也可以在嵌入在主机系统中的存储器中实现。存储器单元可以以多种状态操作，以便存储每个单元的多于一位的数据。

17. 发明授权

US07184306B2 Flash EEPROM system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks 有权
标题翻译：闪存EEPROM系统具有同时多个数据扇区编程和存储其他指定块中的物理块特性
公开(公告)号：US07184306B2
公开(公告)日：2007-02-27
申请号：US11323576
申请日：2005-12-29
申请人： Kevin M. Conley , John S. Mangan , Jeffrey G. Craig
发明人： Kevin M. Conley , John S. Mangan , Jeffrey G. Craig
IPC分类号： G11C16/04
CPC分类号： G11C16/107 , G06F12/0246 , G06F2212/7203 , G06F2212/7207 , G06F2212/7208 , G11C16/10 , G11C16/3459 , G11C29/82 , G11C2216/14
摘要： A non-volatile memory system is formed of floating gate memory cells arranged in blocks as the smallest unit of memory cells that are erasable together. The system includes a number of features that may be implemented individually or in various cooperative combinations. One feature is the storage in separate blocks of the characteristics of a large number of blocks of cells in which user data is stored. These characteristics for user data blocks being accessed may, during operation of the memory system by its controller, be stored in a random access memory for ease of access and updating. According to another feature, multiple sectors of user data are stored at one time by alternately streaming chunks of data from the sectors to multiple memory blocks. Bytes of data in the stream may be shifted to avoid defective locations in the memory such as bad columns. Error correction codes may also be generated from the streaming data with a single generation circuit for the multiple sectors of data. The stream of data may further be transformed in order to tend to even out the wear among the blocks of memory. Yet another feature, for memory systems having multiple memory integrated circuit chips, provides a single system record that includes the capacity of each of the chips and assigned contiguous logical address ranges of user data blocks within the chips which the memory controller accesses when addressing a block, making it easier to manufacture a memory system with memory chips having different capacities. A typical form of the memory system is as a card that is removably connectable with a host system but may alternatively be implemented in a memory embedded in a host system. The memory cells may be operated with multiple states in order to store more than one bit of data per cell.
摘要翻译：非易失性存储器系统由以块为单位布置的浮动栅极存储单元形成为可以一起可擦除的最小单元的存储器单元。该系统包括可以单独地或以各种协作组合实现的多个特征。一个特征是在单独的块中存储其中存储用户数据的大量小区块的特性。正在访问的用户数据块的这些特征可以在存储器系统由其控制器操作期间被存储在随机存取存储器中以便于访问和更新。根据另一特征，通过将来自扇区的数据块交替地流向多个存储块，一次存储多个扇区的用户数据。可以移动流中的数据字节以避免存储器中的不良位置，例如不良列。也可以通过用于多扇区数据的单一生成电路从流数据生成纠错码。可以进一步转换数据流，以便趋向于均匀地消除存储器块之间的磨损。对于具有多个存储器集成电路芯片的存储器系统，又一特征提供了单个系统记录，该系统记录包括每个芯片的容量，并且在寻址块时存储器控制器访问的芯片内分配的用户数据块的连续逻辑地址范围，使得容易制造具有不同容量的存储器芯片的存储器系统。存储器系统的典型形式是可拆卸地与主机系统连接的卡，但是也可以在嵌入在主机系统中的存储器中实现。存储器单元可以以多种状态操作，以便存储每个单元的多于一位的数据。

18. 发明授权

US08223547B2 Flash EEprom system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks 有权
标题翻译：闪存EEprom系统，具有同时多个数据扇区编程和存储其他指定块中的物理块特性
公开(公告)号：US08223547B2
公开(公告)日：2012-07-17
申请号：US13027055
申请日：2011-02-14
申请人： Kevin M. Conley , John S. Mangan , Jeffrey G. Craig
发明人： Kevin M. Conley , John S. Mangan , Jeffrey G. Craig
IPC分类号： G11C16/04
CPC分类号： G11C16/107 , G06F12/0246 , G06F2212/7203 , G06F2212/7207 , G06F2212/7208 , G11C16/10 , G11C16/3459 , G11C29/82 , G11C2216/14
摘要： A non-volatile memory system is formed of floating gate memory cells arranged in blocks as the smallest unit of memory cells that are erasable together. The system includes a number of features that may be implemented individually or in various cooperative combinations. One feature is the storage in separate blocks of the characteristics of a large number of blocks of cells in which user data is stored. These characteristics for user data blocks being accessed may, during operation of the memory system by its controller, be stored in a random access memory for ease of access and updating. According to another feature, multiple sectors of user data are stored at one time by alternately streaming chunks of data from the sectors to multiple memory blocks. Bytes of data in the stream may be shifted to avoid defective locations in the memory such as bad columns. Error correction codes may also be generated from the streaming data with a single generation circuit for the multiple sectors of data. The stream of data may further be transformed in order to tend to even out the wear among the blocks of memory. Yet another feature, for memory systems having multiple memory integrated circuit chips, provides a single system record that includes the capacity of each of the chips and assigned contiguous logical address ranges of user data blocks within the chips which the memory controller accesses when addressing a block, making it easier to manufacture a memory system with memory chips having different capacities. A typical form of the memory system is as a card that is removably connectable with a host system but may alternatively be implemented in a memory embedded in a host system. The memory cells may be operated with multiple states in order to store more than one bit of data per cell.
摘要翻译：非易失性存储器系统由以块为单位布置的浮动栅极存储单元形成为可以一起可擦除的最小单元的存储器单元。该系统包括可以单独地或以各种协作组合实现的多个特征。一个特征是在单独的块中存储其中存储用户数据的大量小区块的特性。正在访问的用户数据块的这些特征可以在存储器系统由其控制器操作期间被存储在随机存取存储器中以便于访问和更新。根据另一特征，通过将来自扇区的数据块交替地流向多个存储块，一次存储多个扇区的用户数据。可以移动流中的数据字节以避免存储器中的不良位置，例如不良列。也可以通过用于多扇区数据的单一生成电路从流数据生成纠错码。可以进一步转换数据流，以便趋向于均匀地消除存储器块之间的磨损。对于具有多个存储器集成电路芯片的存储器系统，又一特征提供了单个系统记录，该系统记录包括每个芯片的容量，并且在寻址块时存储器控制器访问的芯片内分配的用户数据块的连续逻辑地址范围，使得容易制造具有不同容量的存储器芯片的存储器系统。存储器系统的典型形式是可拆卸地与主机系统连接的卡，但是也可以在嵌入在主机系统中的存储器中实现。存储器单元可以以多种状态操作，以便存储每个单元的多于一位的数据。

19. 发明授权

US07889590B2 Flash EEPROM system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks 有权
公开(公告)号：US07889590B2
公开(公告)日：2011-02-15
申请号：US12611280
申请日：2009-11-03
申请人： Kevin M. Conley , John S. Mangan , Jeffrey G. Craig
发明人： Kevin M. Conley , John S. Mangan , Jeffrey G. Craig
IPC分类号： G11C8/00
CPC分类号： G11C16/107 , G06F12/0246 , G06F2212/7203 , G06F2212/7207 , G06F2212/7208 , G11C16/10 , G11C16/3459 , G11C29/82 , G11C2216/14
摘要： A non-volatile memory system is formed of floating gate memory cells arranged in blocks as the smallest unit of memory cells that are erasable together. One feature is the storage in separate blocks of the characteristics of a large number of blocks of cells in which user data is stored. According to another feature, multiple sectors of user data are stored at one time by alternately streaming chunks of data from the sectors to multiple memory blocks. Yet another feature, for memory systems having multiple memory integrated circuit chips, provides a single system record that includes the capacity of each of the chips and assigned contiguous logical address ranges of user data blocks within the chips which the memory controller accesses when addressing a block, making it easier to manufacture a memory system with memory chips having different capacities.

20. 发明授权

US06760255B2 Flash EEPROM system with simultaneous multiple data sector programming and storage of physical block characteristics in other designated blocks 有权
公开(公告)号：US06760255B2
公开(公告)日：2004-07-06
申请号：US10422216
申请日：2003-04-23
申请人： Kevin M. Conley , John S. Mangan , Jeffrey G. Craig
发明人： Kevin M. Conley , John S. Mangan , Jeffrey G. Craig
IPC分类号： G11C1604
CPC分类号： G11C16/107 , G06F12/0246 , G06F2212/7203 , G06F2212/7207 , G06F2212/7208 , G11C16/10 , G11C16/3459 , G11C29/82 , G11C2216/14
摘要： A non-volatile memory system is formed of floating gate memory cells arranged in blocks as the smallest unit of memory cells that are erasable together. The system includes a number of features that may be implemented individually or in various cooperative combinations. One feature is the storage in separate blocks of the characteristics of a large number of blocks of cells in which user data is stored. These characteristics for user data blocks being accessed may, during operation of the memory system by its controller, be stored in a random access memory for ease of access and updating. According to another feature, multiple sectors of user data are stored at one time by alternately streaming chunks of data from the sectors to multiple memory blocks. Bytes of data in the stream may be shifted to avoid defective locations in the memory such as bad columns. Error correction codes may also be generated from the streaming data with a single generation circuit for the multiple sectors of data. The stream of data may further be transformed in order to tend to even out the wear among the blocks of memory. Yet another feature, for memory systems having multiple memory integrated circuit chips, provides a single system record that includes the capacity of each of the chips and assigned contiguous logical address ranges of user data blocks within the chips which the memory controller accesses when addressing a block, making it easier to manufacture a memory system with memory chips having different capacities. A typical form of the memory system is as a card that is removably connectable with a host system but may alternatively be implemented in a memory embedded in a host system. The memory cells may be operated with multiple states in order to store more than one bit of data per cell.

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