专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明授权

US09039350B2 Impingement cooling system for use with contoured surfaces 有权
标题翻译：用于轮廓表面的冲击冷却系统
公开(公告)号：US09039350B2
公开(公告)日：2015-05-26
申请号：US13345779
申请日：2012-01-09
申请人： Aaron Gregory Winn
发明人： Aaron Gregory Winn
IPC分类号： F01D5/18 , F01D25/08
CPC分类号： F01D5/186 , F01D5/187 , F01D25/08
摘要： The present application provides an impingement cooling system for use with a contoured surface. The impingement cooling system may include an impingement plenum and an impingement plate with a linear shape facing the contoured surface. The impingement surface may include a number of projected area thereon with a number of impingement holes having varying sizes and varying spacings.
摘要翻译：本申请提供了一种用于轮廓表面的冲击冷却系统。冲击冷却系统可以包括冲击气室和具有面向轮廓表面的直线形状的冲击板。冲击表面可以包括其上具有多个具有不同尺寸和变化间隔的冲击孔的多个投影面积。

12. 发明申请

US20120290885A1 OVERSAMPLED CLOCK AND DATA RECOVERY WITH EXTENDED RATE ACQUISITION 有权
标题翻译：超级时钟和数据恢复与扩展速率获取
公开(公告)号：US20120290885A1
公开(公告)日：2012-11-15
申请号：US13106040
申请日：2011-05-12
申请人： Mohammad Mobin , Matthew Tota , Gregory Winn
发明人： Mohammad Mobin , Matthew Tota , Gregory Winn
IPC分类号： G06F11/08
CPC分类号： H04L7/0337
摘要： In described embodiments, a transceiver supports two or more rates using an oversampling clock and data recovery (CDR) circuit sampling high rate data with a predetermined CDR sampling clock. A timing recovery circuit detects and accounts for extra or missing samples when oversampling lower rate data. An edge detector detects each actual data symbol edge and provides for an edge decision offset in a current instant's block of samples. An edge error is generated from the previous instant's actual and calculated edges; and an edge distance between actual edges of the current and previous instants is generated. Filtered edge distance and error are combined to generate a calculated edge position for the data symbol edge for the current instant. The edge decision offset is applied to the current calculated edge position to identify a sample value to generate a decision for the data symbol to detect the current data value.
摘要翻译：在所描述的实施例中，收发器支持使用过采样时钟和数据恢复（CDR）电路采用具有预定CDR采样时钟的高速率数据采样的两个或更多个速率。定时恢复电路检测并考虑过采样较低速率数据时的额外或缺失样本。边缘检测器检测每个实际数据符号边缘并提供当前时刻的样本块中的边缘判定偏移。从前一时刻的实际和计算边缘产生边缘错误; 并且生成当前和前一时刻的实际边缘之间的边缘距离。滤波边缘距离和误差被组合以产生用于当前时刻的数据符号边缘的计算边缘位置。边缘判定偏移被应用于当前计算的边缘位置以识别采样值，以产生用于数据符号来检测当前数据值的决定。

13. 发明申请

US20070145413A1 Isolated power domain core regions in platform ASICS 失效
标题翻译：平台ASICS中的隔离式电源域核心区域
公开(公告)号：US20070145413A1
公开(公告)日：2007-06-28
申请号：US11318332
申请日：2005-12-23
申请人： Donald McGrath , Gregory Winn , Scott Savage
发明人： Donald McGrath , Gregory Winn , Scott Savage
IPC分类号： H01L27/10
CPC分类号： H03K19/1736 , H01L27/0207 , H01L27/11807
摘要： A platform application specific integrated circuit (ASIC) including a base layer. The base layer generally comprises a predefined input/output (I/O) region and a predefined core region. The predefined input/output (I/O) region may comprise a plurality of pre-diffused regions disposed in the platform ASIC. The predefined core region may comprise one or more metal layers defining a plurality of power regions formed according to a custom design created after the base layer is fabricated. The base layer can be customized by depositing one or more metal layers.
摘要翻译：一种包括基础层的平台专用集成电路（ASIC）。基本层通常包括预定义的输入/输出（I / O）区域和预定义的核心区域。预定义的输入/输出（I / O）区域可以包括布置在平台ASIC中的多个预扩散区域。预定义的芯区域可以包括一个或多个限定根据在制造基层之后创建的定制设计形成的多个功率区域的金属层。可以通过沉积一个或多个金属层来定制基层。

14. 发明申请

US20070023930A1 High speed interface design 有权
标题翻译：高速接口设计
公开(公告)号：US20070023930A1
公开(公告)日：2007-02-01
申请号：US11193808
申请日：2005-07-29
申请人： Leah Miller , Gregory Winn
发明人： Leah Miller , Gregory Winn
IPC分类号： H01L23/48
CPC分类号： H01L23/49838 , H01L23/49822 , H01L23/50 , H01L23/66 , H01L2223/6638 , H01L2224/16 , H01L2224/16225 , H01L2224/16235 , H01L2924/15173 , H01L2924/3011 , H05K1/0219 , H05K1/0245 , H05K1/112 , H05K2201/09236 , H05K2201/09627 , H05K2201/0979 , H05K2201/10674
摘要： The embodiments of the present invention are directed toward the design of routing patterns, including elements such as contacts, traces, and vias, for high speed differential signal pairs in integrated circuit package substrates.
摘要翻译：本发明的实施例涉及布线图案的设计，包括用于集成电路封装基板中的高速差分信号对的诸如触点，迹线和通孔的元件。

15. 发明申请

US20130177447A1 Turbine Nozzle Assembly Methods 有权
标题翻译：涡轮喷嘴装配方法
公开(公告)号：US20130177447A1
公开(公告)日：2013-07-11
申请号：US13345777
申请日：2012-01-09
申请人： Robert Walter Coign , Aaron Gregory Winn
发明人： Robert Walter Coign , Aaron Gregory Winn
IPC分类号： F01D5/18 , B21K25/00
CPC分类号： F01D9/041 , F01D5/188 , F05D2240/81 , F05D2260/201 , Y10T29/4932 , Y10T29/49321 , Y10T29/49323
摘要： The present application provides a method of installing an impingement cooling assembly in an inner platform of an airfoil of a turbine nozzle. The method may include the steps of positioning an insert within a cavity of the airfoil, positioning a core exit cover about an opening of the cavity, positioning an impingement plenum within a platform cavity, inserting an unfixed spoolie through an assembly port of the impingement plenum and into an airflow cavity of the insert, and closing the assembly port.
摘要翻译：本申请提供了一种将冲击冷却组件安装在涡轮喷嘴的翼型件的内平台中的方法。该方法可以包括以下步骤：将插入件定位在机翼的空腔内，将芯出口盖定位在空腔的开口周围，将冲击气室定位在平台空腔内，将未固定的轴套插入穿过冲击气室的组装端口并进入插入件的气流腔中，并关闭装配口。

16. 发明申请

US20130177396A1 Impingement Cooling System for Use with Contoured Surfaces 有权
标题翻译：用于轮廓曲面的冲击冷却系统
公开(公告)号：US20130177396A1
公开(公告)日：2013-07-11
申请号：US13345779
申请日：2012-01-09
申请人： Aaron Gregory Winn
发明人： Aaron Gregory Winn
IPC分类号： F01D9/02 , F28F1/00 , F01D25/12
CPC分类号： F01D5/186 , F01D5/187 , F01D25/08
摘要： The present application provides an impingement cooling system for use with a contoured surface. The impingement cooling system may include an impingement plenum and an impingement plate with a linear shape facing the contoured surface. The impingement surface may include a number of projected area thereon with a number of impingement holes having varying sizes and varying spacings.
摘要翻译：本申请提供了一种用于轮廓表面的冲击冷却系统。冲击冷却系统可以包括冲击气室和具有面向轮廓表面的直线形状的冲击板。冲击表面可以包括其上具有多个具有不同尺寸和变化间隔的冲击孔的多个投影面积。

17. 发明申请

US20130177383A1 DEVICE AND METHOD FOR SEALING A GAS PATH IN A TURBINE 审中-公开
标题翻译：用于密封涡轮气体路径的装置和方法
公开(公告)号：US20130177383A1
公开(公告)日：2013-07-11
申请号：US13343911
申请日：2012-01-05
申请人： Aaron Gregory Winn , Kevin Thomas McGovern , Ravichandran Meenakshisundaram
发明人： Aaron Gregory Winn , Kevin Thomas McGovern , Ravichandran Meenakshisundaram
IPC分类号： F01D11/08
CPC分类号： F01D11/005
摘要： A device for sealing a gas path in a turbine includes a first shroud segment and a slot in a surface of the first shroud segment. A barrier extends inside the slot, and a bypass channel in the slot provides fluid communication between the barrier and the slot to the gas path in the turbine. A method for sealing a gas path in a turbine includes placing a barrier between a first slot in a first shroud segment and a second slot in a second shroud segment and flowing a fluid between the barrier and the first slot to the gas path in the turbine, wherein the fluid flows through a first bypass channel in the first slot.
摘要翻译：用于密封涡轮机中的气体路径的装置包括第一护罩段和第一护罩区段的表面中的槽。障碍物在狭槽内部延伸，并且槽中的旁通通道提供阻挡层和槽之间到涡轮机中的气体路径的流体连通。用于密封涡轮机中的气体路径的方法包括在第一护罩区段中的第一狭槽和第二护罩区段中的第二狭槽之间放置障碍物，并且将阻挡物和第一狭缝之间的流体流动到涡轮机中的气体路径，其中所述流体流过所述第一槽中的第一旁通通道。

18. 发明授权

US08458546B2 Oversampled clock and data recovery with extended rate acquisition 有权
标题翻译：超采样时钟和数据恢复，扩展速率采集
公开(公告)号：US08458546B2
公开(公告)日：2013-06-04
申请号：US13106040
申请日：2011-05-12
申请人： Mohammad Mobin , Matthew Tota , Gregory Winn
发明人： Mohammad Mobin , Matthew Tota , Gregory Winn
IPC分类号： G06F11/00
CPC分类号： H04L7/0337
摘要： In described embodiments, a transceiver supports two or more rates using an oversampling clock and data recovery (CDR) circuit sampling high rate data with a predetermined CDR sampling clock. A timing recovery circuit detects and accounts for extra or missing samples when oversampling lower rate data. An edge detector detects each actual data symbol edge and provides for an edge decision offset in a current instant's block of samples. An edge error is generated from the previous instant's actual and calculated edges; and an edge distance between actual edges of the current and previous instants is generated. Filtered edge distance and error are combined to generate a calculated edge position for the data symbol edge for the current instant. The edge decision offset is applied to the current calculated edge position to identify a sample value to generate a decision for the data symbol to detect the current data value.
摘要翻译：在所描述的实施例中，收发器支持使用过采样时钟和数据恢复（CDR）电路采用具有预定CDR采样时钟的高速率数据采样的两个或更多个速率。定时恢复电路检测并考虑过采样较低速率数据时的额外或缺失样本。边缘检测器检测每个实际数据符号边缘并提供当前时刻的样本块中的边缘判定偏移。从前一时刻的实际和计算边缘产生边缘错误; 并且生成当前和前一时刻的实际边缘之间的边缘距离。滤波边缘距离和误差被组合以产生用于当前时刻的数据符号边缘的计算边缘位置。边缘判定偏移被应用于当前计算的边缘位置以识别采样值，以产生用于数据符号来检测当前数据值的决定。

19. 发明申请

US20130136589A1 TURBINE NOZZLE AIRFOIL PROFILE 有权
公开(公告)号：US20130136589A1
公开(公告)日：2013-05-30
申请号：US13304730
申请日：2011-11-28
申请人： Ross James Gustafson , Aaron Gregory Winn
发明人： Ross James Gustafson , Aaron Gregory Winn
IPC分类号： F01D25/00 , F01D1/04
CPC分类号： F01D5/141 , F01D9/041 , F05D2240/12 , F05D2240/30 , F05D2250/74
摘要： The present application provides a turbine nozzle including an airfoil shape. The airfoil shape may have a nominal profile substantially in accordance with Cartesian coordinate values of X, Y and Z set forth in Table 1. The Cartesian coordinate values of X, Y and Z are non-dimensional values from 0% to 100% convertible to dimensional distances in inches by multiplying the Cartesian coordinate values of X, Y and Z by a height of the airfoil in inches. The X and Y values are distances in inches which, when connected by smooth continuing arcs, define airfoil profile sections at each distance Z. The airfoil profile sections at Z distances may be joined smoothly with one another to form a complete airfoil shape.

20. 发明授权

US07566923B2 Isolated power domain core regions in platform ASICs 失效
标题翻译：平台ASIC中隔离的电源域核心区域
公开(公告)号：US07566923B2
公开(公告)日：2009-07-28
申请号：US11318332
申请日：2005-12-23
申请人： Donald T. McGrath , Gregory Winn , Scott C. Savage
发明人： Donald T. McGrath , Gregory Winn , Scott C. Savage
IPC分类号： H01L27/118
CPC分类号： H03K19/1736 , H01L27/0207 , H01L27/11807
摘要： A platform application specific integrated circuit (ASIC) including a base layer. The base layer generally comprises a predefined input/output (I/O) region and a predefined core region. The predefined input/output (I/O) region may comprise a plurality of pre-diffused regions disposed in the platform ASIC. The predefined core region may comprise one or more metal layers defining a plurality of power regions formed according to a custom design created after the base layer is fabricated. The base layer can be customized by depositing one or more metal layers.
摘要翻译：一种包括基础层的平台专用集成电路（ASIC）。基本层通常包括预定义的输入/输出（I / O）区域和预定义的核心区域。预定义的输入/输出（I / O）区域可以包括布置在平台ASIC中的多个预扩散区域。预定义的芯区域可以包括一个或多个限定根据在制造基层之后创建的定制设计形成的多个功率区域的金属层。可以通过沉积一个或多个金属层来定制基层。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式