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11. 发明授权

US4816883A Nonvolatile, semiconductor memory device 失效
标题翻译：非易失性半导体存储器件
公开(公告)号：US4816883A
公开(公告)日：1989-03-28
申请号：US64480
申请日：1987-06-22
申请人： Livio Baldi
发明人： Livio Baldi
IPC分类号： H01L21/8247 , H01L21/8246 , H01L27/112 , H01L27/115 , H01L29/788 , H01L29/792 , H01L29/78 , G11C11/34 , H01L27/02
CPC分类号： H01L29/7885 , H01L27/115
摘要： A nonvolatile, EPROM type memory cell, formed using a p-channel MOS device instead of an n-channel MOS device as customary according to the prior art, offers several advantages: improved programming characteristics, a relatively low gate voltage for writing, a lower power dissipation and above all compatability with the great majority of CMOS fabrication processes. An explanation of such surprising characteristics may be attributed to more favorable conditions of electric field during programming, i.e. during charging of the floating gate, in respect to those existing in the case of the conventional n-channel memory cell.
摘要翻译：使用根据现有技术的通常使用p沟道MOS器件代替n沟道MOS器件的非易失性EPROM型存储单元提供了几个优点：改进的编程特性，用于写入的相对较低的栅极电压，较低的功耗以及绝大多数CMOS制造工艺的兼容性。关于这种令人惊奇的特性的解释可以归因于在编程期间，即在对浮动栅极充电期间相对于在常规n沟道存储单元的情况下存在的电场的更有利的条件。

12. 发明授权

US4808261A Fabrication process for EPROM cells with oxide-nitride-oxide dielectric 失效
标题翻译：具有氧化物 - 氮化物 - 氧化物电介质的EPROM电池的制造方法
公开(公告)号：US4808261A
公开(公告)日：1989-02-28
申请号：US40152
申请日：1987-04-20
申请人： Gabriella Ghidini , Giuseppe Crisenza
发明人： Gabriella Ghidini , Giuseppe Crisenza
IPC分类号： H01L21/8247 , H01L21/28 , H01L27/115 , H01L29/788 , H01L29/792 , H01L21/306 , B44C1/22 , C03C15/00 , C03C25/06
CPC分类号： H01L21/28273 , H01L27/115
摘要： The process calls for covering of the dielectric with a thin additional layer of polysilicon which has the function of protecting the dielectric from any defects which would otherwise be introduced from the subsequent masking.
摘要翻译：该方法要求用薄的附加多晶硅层覆盖电介质，该多晶硅附加层具有保护电介质不会从随后的掩模引入的任何缺陷的功能。

13. 发明授权

US4799021A Method and apparatus for testing EPROM type semiconductor devices during burn-in 失效
标题翻译：在老化期间测试EPROM型半导体器件的方法和装置
公开(公告)号：US4799021A
公开(公告)日：1989-01-17
申请号：US73654
申请日：1987-07-15
申请人： Lucio Cozzi
发明人： Lucio Cozzi
IPC分类号： H01L27/10 , G01R31/26 , G01R31/28 , G01R31/30 , G11C29/00 , G11C29/06 , G11C29/50 , H01L21/66 , H01L21/8247 , H01L29/788 , H01L29/792 , G01R1/04 , G01R31/00
CPC分类号： G01R31/2868 , G01R31/2642 , G11C29/50 , G11C29/50012 , G11C29/50016 , G11C16/04
摘要： An apparatus and a relative method which permit carrying out a complete cycle of functional tests and parametric measurements on EPROM type semiconductor devices during their permanence inside a burn-in chamber, thus greatly reducing the time necessary for testing and classifying the devices, besides ensuring a higher reliability. The system utilizes special "intelligent" cards, i.e. provided with a card microprocessor which may be connected to a supervisory system's CPU directing the test and classification process of the devices.
摘要翻译：一种装置和相对方法，其允许在EPROM型半导体器件在老化室内的永久性期间执行功能测试和参数测量的完整循环，从而大大减少了测试和分类器件所需的时间，另外确保更高的可靠性。该系统使用特殊的“智能”卡，即设置有卡微处理器，其可以连接到指示设备的测试和分类处理的监督系统的CPU。

14. 发明授权

US4782288A Method for evaluating processing parameters in the manufacture of semiconductor devices 失效
标题翻译：用于评估半导体器件制造中的处理参数的方法
公开(公告)号：US4782288A
公开(公告)日：1988-11-01
申请号：US946239
申请日：1986-12-24
申请人： Giuseppe Vento
发明人： Giuseppe Vento
IPC分类号： G01R17/02 , G01R17/00 , G01R31/00
CPC分类号： G01R17/02
摘要： This method, allowing pointing out of the effects of one manufacture parameter independently from other parameters and phenomena and yielding very high precision in measurement, comprises a first step in which a symmetrical resistive bridge is formed, comprising a pair of test resistive arms having topological characteristics related to the process or phenomenon to be evaluated and a pair of reference resistive arms. Each pair of arms is formed by two reciprocally counterposed resistors with identical topography and value. The method furthermore comprises a second step in which a current, having a known value, is applied to the bridge, the voltages present in suitable points of the bridge are measured, and the difference in conductance between the pair of test resistive arms and the reference arms is calculated according to the known or calculated current and voltage values.
摘要翻译：该方法能够独立于其他参数和现象指出一个制造参数的影响并产生非常高的测量精度，包括形成对称电阻桥的第一步骤，包括具有拓扑特性的一对测试电阻臂与待评估的过程或现象有关，以及一对参考电阻臂。每对臂由具有相同形貌和值的两个相互对置的电阻器形成。该方法还包括第二步骤，其中具有已知值的电流施加到桥接器，测量存在于桥接器的适当点中的电压，并且测量电阻臂对与参考电压之间的电导差根据已知或计算的电流和电压值计算臂。

15. 发明授权

US4752722A Control circuit with compensation of the anode voltage variation for televisor vertical deflection stage 失效
标题翻译：控制电路补偿电视机垂直偏转阶段的阳极电压变化
公开(公告)号：US4752722A
公开(公告)日：1988-06-21
申请号：US836116
申请日：1986-03-04
申请人： Pietro Erratico , Mauro Merlo , Silvano Coccetti
发明人： Pietro Erratico , Mauro Merlo , Silvano Coccetti
IPC分类号： H04N3/16 , H01J29/70 , H01J29/76
CPC分类号： H04N3/16
摘要： An amplifier stage with variable gain dependent on the anode voltage is interposed between a ramp generator having constant amplitude ramp output voltage and the vertical deflection stage in such a manner as to vary the input voltage of said vertical deflection stage in accordance with anode voltage variations. In such a manner the vertical deflection current varies correspondingly.
摘要翻译：具有取决于阳极电压的可变增益的放大器级介于具有恒定幅度斜坡输出电压的斜坡发生器和垂直偏转级之间，以便根据阳极电压变化改变所述垂直偏转级的输入电压。以这种方式，垂直偏转电流相应地变化。

16. 发明授权

US4733196A Current gain stage with low voltage drop 失效
标题翻译：电流增益级低电压降
公开(公告)号：US4733196A
公开(公告)日：1988-03-22
申请号：US937869
申请日：1986-12-04
申请人： Pietro Menniti , Antonella Lanati
发明人： Pietro Menniti , Antonella Lanati
IPC分类号： H03F3/343 , H03F3/04 , G05F3/16
CPC分类号： H03F3/3435
摘要： A current gain stage with low voltage drop usable in place of a Darlington's current gain stage is described. This stage maintains the precision characteristics of the output current value, though presenting a lower voltage drop. The stage is formed by connecting the collector of the input transistor (driver) to a current mirror, the output current of which is added to the output current of the gain stage for maintaining the high precision.
摘要翻译：描述了可用于代替达林顿当前增益级的具有低电压降的电流增益级。该级保持输出电流值的精度特性，尽管呈现较低的电压降。通过将输入晶体管（驱动器）的集电极连接到电流镜来形成该级，其输出电流加到增益级的输出电流以保持高精度。

17. 发明授权

US4721686A Manufacturing integrated circuits containing P-channel MOS transistors and bipolar transistors utilizing boron and arsenic as dopants 失效
标题翻译：制造包含P沟道MOS晶体管的集成电路和利用硼和砷作为掺杂剂的双极晶体管
公开(公告)号：US4721686A
公开(公告)日：1988-01-26
申请号：US6037
申请日：1987-01-22
申请人： Claudio Contiero , Paola Galbiati , Antonio Andreini
发明人： Claudio Contiero , Paola Galbiati , Antonio Andreini
IPC分类号： H01L21/22 , H01L21/225 , H01L21/265 , H01L21/8222 , H01L21/8234 , H01L21/8236 , H01L21/8238 , H01L21/8248 , H01L21/8249 , H01L27/06 , H01L29/78 , H01L21/38 , H01L21/425
CPC分类号： H01L21/8249 , H01L21/22 , H01L21/2253 , H01L21/2652 , H01L21/8234 , H01L21/8236 , H01L21/8238
摘要： This method, requiring a smaller number of masking steps with respect to the known methods, comprises boron implant on the surface of an epitaxial layer, without masking, and arsenic implant in predetermined locations of the epitaxial layer surface by means of an appropriate mask. A subsequent thermal treatment then leads to diffusion of the implanted arsenic and boron atoms, but boron diffusion in the regions in which arsenic implant has also occurred is prevented by the interaction with the latter, to thereby obtain regions with an N.sup.+ type conductivity where both boron and arsenic have been implanted and regions of P type conductivity where only boron has been implanted.
摘要翻译：相对于已知方法需要较少数量的掩模步骤的该方法包括通过适当的掩模在外延层的表面上的硼注入而不进行掩模，并且在外延层表面的预定位置进行砷注入。然后随后的热处理导致注入的砷和硼原子的扩散，但是通过与后者的相互作用来防止在其中也发生砷注入的区域中的硼扩散，从而获得具有N +型导电性的区域，其中两个硼已经植入了砷，并且仅植入硼的P型导电性区域。

18. 发明授权

US4720641A Intelligent electrical power device with monolithic integrated circuit 失效
标题翻译：具有单片集成电路的智能电力装置
公开(公告)号：US4720641A
公开(公告)日：1988-01-19
申请号：US872488
申请日：1986-06-10
申请人： Giuseppe Faini
发明人： Giuseppe Faini
IPC分类号： H02J1/00 , H03K17/08 , H03K17/687 , H02J1/10 , H02M3/06
CPC分类号： H03K17/687 , Y10T307/305 , Y10T307/50
摘要： With a MOS power element is associated at least one CMOS pilot circuit supplied by a condenser charged with a voltage taken from the power circuit during the interdiction phases of the power element. The entire device is preferably enclosed in a single monolithic chip except for the condenser which remains outside.
摘要翻译：使用MOS功率元件将至少一个CMOS导频电路与由功率元件的截止阶段期间从电源电路获取的电压充电的电容器提供。除了保持在外部的冷凝器之外，整个装置优选地封装在单个单片芯片中。

19. 发明授权

US4719184A Process for the fabrication of integrated structures including nonvolatile memory cells with layers of self-aligned silicon and associated transistors 失效
标题翻译：用于制造包括具有自对准硅层和相关晶体管层的非易失性存储单元的集成结构的工艺
公开(公告)号：US4719184A
公开(公告)日：1988-01-12
申请号：US22482
申请日：1987-03-06
申请人： Daniele Cantarelli , Giuseppe Crisenza , Pierangelo Pansana
发明人： Daniele Cantarelli , Giuseppe Crisenza , Pierangelo Pansana
IPC分类号： H01L21/8247 , H01L27/105 , H01L27/115 , H01L29/788 , H01L29/792 , H01L21/26
CPC分类号： H01L27/11526 , H01L27/115 , H01L27/11543 , H01L27/105 , Y10S438/942
摘要： After growth of gate oxide, deposit and separation of a first polycrystalline silicon layer, growth of dielectric oxide and removal thereof from the transistor area, and deposit of a second polycrystalline layer, a single mask makes possible first etching of the second silicon layer and of the dielectric oxide and then of the first silicon layer of the gate oxide at the sides of the cell and transistor areas.
摘要翻译：在栅极氧化物生长之后，沉积和分离第一多晶硅层，电介质氧化物的生长和其从晶体管区域的去除，以及沉积第二多晶层，单个掩模使得可以首先蚀刻第二硅层和电介质氧化物，然后在电池和晶体管区域的侧面处的栅极氧化物的第一硅层。

20. 发明授权

US4704738A Transistor amplifier and mixer input stage for a radio receiver 失效
标题翻译：用于无线电接收器的晶体管放大器和混频器输入级
公开(公告)号：US4704738A
公开(公告)日：1987-11-03
申请号：US657572
申请日：1984-10-01
申请人： Rinaldo Graziadei , Michaelango Lorusso
发明人： Rinaldo Graziadei , Michaelango Lorusso
IPC分类号： H03D7/00 , H03D7/14 , H03F3/45 , H03G3/30 , H04B1/18 , H04B1/26
CPC分类号： H03D7/1433 , H03D7/1425 , H03D7/1441 , H03D7/1458 , H03D7/1491 , H03D2200/0025 , H03D2200/0043
摘要： The input stage of a radio receiver incudes a differential amplifier circuit, whose gain is adjusted by a voltage generated by an AGC circuit, and a mixer circuit. An attenuator stage with a predetermined attenuation coefficient is coupled between the input terminal of differential circuit and the input terminal of the mixer circuit. When the level of the input signal increases beyond a given value, the differential amplifier circuit is deactivated and the signal reaches the mixer circuit through the attenuator stage.
摘要翻译：无线电接收机的输入级包括差分放大器电路，其增益由AGC电路产生的电压和混频器电路进行调节。具有预定衰减系数的衰减器级耦合在差分电路的输入端和混频器电路的输入端之间。当输入信号的电平增加超过给定值时，差分放大器电路被去激活，并且信号通过衰减器级到达混频器电路。

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