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131. 发明授权

US5843225A Process for fabricating semiconductor and process for fabricating semiconductor device 失效
标题翻译：用于制造半导体的工艺和用于制造半导体器件的工艺
公开(公告)号：US5843225A
公开(公告)日：1998-12-01
申请号：US479720
申请日：1995-06-07
申请人： Toru Takayama , Yasuhiko Takemura , Hongyong Zhang , Shunpei Yamazaki
发明人： Toru Takayama , Yasuhiko Takemura , Hongyong Zhang , Shunpei Yamazaki
IPC分类号： H01L21/20 , H01L21/336 , H01L27/12 , H01L29/786 , C30B1/10
CPC分类号： H01L21/2022 , H01L21/2026 , H01L27/12 , H01L29/66757 , H01L29/78654 , H01L29/78675
摘要： A process for fabricating a semiconductor at a lower crystallization temperature and yet at a shorter period of time, which comprises forming an insulator coating on a substrate; exposing said insulator coating to a plasma; forming an amorphous silicon film on said insulator coating after its exposure to said plasma; and heat treating said silicon film in the temperature range of from 400.degree. to 650.degree. C. or at a temperature not higher than the glass transition temperature of the substrate. The nucleation sites are controlled by selectively exposing the amorphous silicon film to a plasma or by selectively applying a substance containing elements having a catalytic effect thereto. A process for fabricating a thin film transistor using the same is also disclosed.
摘要翻译：一种制造半导体的方法，该半导体在较低的结晶温度下并且在较短的时间内，其包括在基片上形成绝缘体涂层; 将所述绝缘体涂层暴露于等离子体; 在暴露于所述等离子体之后，在所述绝缘体涂层上形成非晶硅膜; 在400〜650℃的温度或不高于基板的玻璃化转变温度的温度下对所述硅膜进行热处理。通过选择性地将非晶硅膜暴露于等离子体或通过选择性地施加含有其催化作用的元素的物质来控制成核位点。还公开了使用其制造薄膜晶体管的工艺。

132. 发明授权

US5609774A Apparatus for microwave processing in a magnetic field 失效
标题翻译：磁场微波处理装置
公开(公告)号：US5609774A
公开(公告)日：1997-03-11
申请号：US194571
申请日：1994-02-10
申请人： Shunpei Yamazaki , Masaya Kadono , Kenji Itoh , Toru Takayama , Yasuyuki Arai , Noriya Ishida
发明人： Shunpei Yamazaki , Masaya Kadono , Kenji Itoh , Toru Takayama , Yasuyuki Arai , Noriya Ishida
IPC分类号： H01J37/32 , H01L21/302
CPC分类号： H01J37/32449 , H01J37/32192 , H01J37/3244
摘要： A microwave-assisted plasma processing apparatus has a reaction chamber in which a substrate holder is provided to support a substrate to be treated. The holder is formed congruent with the inside of reaction chamber and located to substantially separate a reaction space in the reaction chamber save for a narrow clearance therebetween through which exhausted gas passes from said reaction space into said auxiliary space. By this structure, high density plasmas can be formed in the reaction chamber without substantial loss of input microwave energy.
摘要翻译：微波辅助等离子体处理装置具有反应室，在该反应室中设置有用于支撑被处理基板的基板支架。保持器与反应室的内部形成一致并且被设置为基本上分离反应室中的反应空间，除了其间的窄间隙，排出的气体从所述反应空间通过所述反应空间进入所述辅助空间。通过这种结构，可以在反应室中形成高密度等离子体，而不会大量损失输入的微波能量。

133. 发明授权

US08634050B2 Liquid crystal display device and method for manufacturing the same 有权
标题翻译：液晶显示装置及其制造方法
公开(公告)号：US08634050B2
公开(公告)日：2014-01-21
申请号：US12108614
申请日：2008-04-24
申请人： Shunpei Yamazaki , Toru Takayama
发明人： Shunpei Yamazaki , Toru Takayama
IPC分类号： G02F1/1339
CPC分类号： G02F1/1339 , G02F1/1341 , G02F2001/13415
摘要： A liquid crystal display device using a plastic substrate becomes required to have high resolution, high opening ratio, high reliability, or the like, with the increasing of a screen size. Besides, high productivity and cost reduction is also required. According to the present invention, a protective film 123 comprising at least one silicon nitride film, which is formed by a ratio frequency sputtering using a silicon target, is provided over an opposing substrate (a flexible substrate); sealant 112 is drawn; a liquid crystal material 114 is dropped over the opposing substrate in vacuo; and the opposing substrate is pasted to a flexible substrate 110 provided with a pixel electrode 111 and a columnar spacer 115.
摘要翻译：随着屏幕尺寸的增加，使用塑料基板的液晶显示装置需要具有高分辨率，高开口率，高可靠性等。此外，还需要高生产率和成本降低。根据本发明，在相对的基板（柔性基板）上设置包括通过使用硅靶的比率频率溅射形成的至少一个氮化硅膜的保护膜123。抽出密封剂112; 将液晶材料114真空滴在相对的基板上; 并且将相对的基板粘贴到设置有像素电极111和柱状间隔物115的柔性基板110上。

134. 发明授权

US08278195B2 Plasma CVD apparatus 有权
标题翻译：等离子体CVD装置
公开(公告)号：US08278195B2
公开(公告)日：2012-10-02
申请号：US13287597
申请日：2011-11-02
申请人： Shunpei Yamazaki , Toru Takayama , Mitsunori Sakama , Hisashi Abe , Hiroshi Uehara , Mika Ishiwata
发明人： Shunpei Yamazaki , Toru Takayama , Mitsunori Sakama , Hisashi Abe , Hiroshi Uehara , Mika Ishiwata
IPC分类号： H01L21/469
CPC分类号： H01J37/32477 , C23C16/4401 , C23C16/5096 , Y10S438/905
摘要： In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.
摘要翻译：在等离子体CVD装置中，防止了不必要的放电，例如电弧放电，由于附着在反应室上的膜的剥离引起的颗粒的量减少，并且在该设备的工作时间内有助于生产的时间的百分比增加同时保持设备的扩大和易于加工的性能。等离子体CVD装置被构造成使得在具有电源113，真空排气装置118和反应气体引入管114的导电反应室104中，在由电极111围绕的空间中产生等离子体115，衬底保持器 112和绝缘体120。

135. 发明授权

US08129721B2 Semiconductor device and method for fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08129721B2
公开(公告)日：2012-03-06
申请号：US11396436
申请日：2006-04-03
申请人： Shunpei Yamazaki , Jun Koyama , Toru Takayama , Toshiji Hamatani
发明人： Shunpei Yamazaki , Jun Koyama , Toru Takayama , Toshiji Hamatani
IPC分类号： H01L29/04
CPC分类号： G02F1/13454 , G02F1/136286 , G02F1/1368 , H01L27/12 , H01L27/1214 , H01L27/124 , H01L29/42384 , H01L29/4908 , H01L29/66757 , H01L29/78621 , H01L29/78627 , H01L29/78645 , H01L29/78684
摘要： The invention primarily provides gate electrodes and gate wirings permitting large-sized screens for active matrix-type display devices, wherein, in order to achieve this object, the construction of the invention is a semiconductor device having, on the same substrate, a pixel TFT provided in a display region and a driver circuit TFT provided around the display region, wherein the gate electrodes of the pixel TFT and the driver circuit TFT are formed from a first conductive layer, the gate electrodes are in electrical contact through connectors with gate wirings formed from a second conductive layer, and the connectors are provided outside the channel-forming regions of the pixel TFT and the driver circuit TFT.
摘要翻译：本发明主要提供允许用于有源矩阵型显示装置的大尺寸屏幕的栅极电极和栅极布线，其中为了实现该目的，本发明的结构是在同一基板上具有像素TFT 设置在显示区域和设置在显示区域周围的驱动电路TFT，其中像素TFT和驱动电路TFT的栅电极由第一导电层形成，栅电极通过与形成的栅极布线的连接器电接触并且连接器设置在像素TFT和驱动电路TFT的沟道形成区域的外侧。

136. 发明授权

US08120031B2 Display device including an opening formed in a gate insulating film, a passivation film, and a barrier film 有权
标题翻译：显示装置包括形成在栅极绝缘膜中的开口，钝化膜和阻挡膜
公开(公告)号：US08120031B2
公开(公告)日：2012-02-21
申请号：US11882146
申请日：2007-07-31
申请人： Shunpei Yamazaki , Toru Takayama , Satoshi Murakami , Hajime Kimura
发明人： Shunpei Yamazaki , Toru Takayama , Satoshi Murakami , Hajime Kimura
IPC分类号： H01L29/04 , H01L27/01 , H01L23/58
CPC分类号： G02F1/1368 , G02F1/133305 , G02F1/136277 , H01L27/3244 , H01L27/3258 , H01L27/3265 , H01L51/5237 , H01L2251/5315 , H05B33/04
摘要： A structure for preventing deteriorations of a light-emitting device and retaining sufficient capacitor elements (condenser) required by each pixel is provided. A first passivation film, a second metal layer, a flattening film, a barrier film, and a third metal layer are stacked in this order over a transistor. A side face of a first opening provided with the flattening film is covered by the barrier film, a second opening is formed inside the first opening, and a third metal layer is connected to a semiconductor via the first opening and the second opening. A capacitor element that is formed of a lamination of a semiconductor of a transistor, a gate insulating film, a gate electrode, the first passivation film, and the second metal layer is provided.
摘要翻译：提供一种用于防止发光装置的劣化并保留每个像素所需的足够的电容器元件（电容器）的结构。依次层叠第一钝化膜，第二金属层，平坦化膜，阻挡膜和第三金属层。设置有平坦化膜的第一开口的侧面由阻挡膜覆盖，第一开口内部形成第二开口，第三金属层经由第一开口和第二开口连接到半导体。提供了由晶体管，栅极绝缘膜，栅电极，第一钝化膜和第二金属层的半导体层叠形成的电容器元件。

137. 发明授权

US08071981B2 Semiconductor device and method for fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08071981B2
公开(公告)日：2011-12-06
申请号：US12839113
申请日：2010-07-19
申请人： Shunpei Yamazaki , Jun Koyama , Toru Takayama , Toshiji Hamatani
发明人： Shunpei Yamazaki , Jun Koyama , Toru Takayama , Toshiji Hamatani
IPC分类号： H01L29/24
CPC分类号： G02F1/13454 , G02F1/136286 , G02F1/1368 , H01L27/12 , H01L27/1214 , H01L27/124 , H01L29/42384 , H01L29/4908 , H01L29/66757 , H01L29/78621 , H01L29/78627 , H01L29/78645 , H01L29/78684
摘要： The invention primarily provides gate electrodes and gate wirings permitting large-sized screens for active matrix-type display devices, wherein, in order to achieve this object, the construction of the invention is a semiconductor device having, on the same substrate, a pixel TFT provided in a display region and a driver circuit TFT provided around the display region, wherein the gate electrodes of the pixel TFT and the driver circuit TFT are formed from a first conductive layer, the gate electrodes are in electrical contact through connectors with gate wirings formed from a second conductive layer, and the connectors are provided outside the channel-forming regions of the pixel TFT and the driver circuit TFT.
摘要翻译：本发明主要提供允许用于有源矩阵型显示装置的大尺寸屏幕的栅极电极和栅极布线，其中为了实现该目的，本发明的结构是在同一基板上具有像素TFT 设置在显示区域和设置在显示区域周围的驱动电路TFT，其中像素TFT和驱动电路TFT的栅电极由第一导电层形成，栅电极通过与形成的栅极布线的连接器电接触并且连接器设置在像素TFT和驱动电路TFT的沟道形成区域的外侧。

138. 发明授权

US07952101B2 Light emitting device and method of manufacturing the same 有权
标题翻译：发光元件及其制造方法
公开(公告)号：US07952101B2
公开(公告)日：2011-05-31
申请号：US12175516
申请日：2008-07-18
申请人： Shunpei Yamazaki , Toru Takayama , Mai Akiba
发明人： Shunpei Yamazaki , Toru Takayama , Mai Akiba
IPC分类号： H01L29/04 , H01L29/15 , H01L31/036 , H01L29/08 , H01L35/24 , H01L51/00 , H01L29/10 , H01L29/76 , H01L31/112 , H01L27/108 , H01L29/12 , H01L31/062 , H01L31/113
CPC分类号： H01L51/0097 , H01L27/3244 , H01L27/326 , H01L51/5237 , H01L51/5253 , H01L51/5256 , H01L51/529 , H01L51/56 , H01L2221/68368 , H01L2227/326 , H01L2251/5315 , H01L2251/5338
摘要： The present invention has an object of providing a light emitting device including an OLED formed on a plastic substrate, which can prevent the degradation due to penetration of moisture or oxygen. On a plastic substrate, a plurality of films for preventing oxygen or moisture from penetrating into an organic light emitting layer in the OLED (hereinafter, referred to as barrier films) and a film having a smaller stress than that of the barrier-films (hereinafter, referred to as a stress relaxing film), the film being interposed between the barrier films, are provided. Owing to a laminate structure of a plurality of barrier films, even if a crack occurs in one of the barrier films, the other barrier film(s) can effectively prevent moisture or oxygen from penetrating into the organic light emitting layer. Moreover, the stress relaxing film, which has a smaller stress than that of the barrier films, is interposed between the barrier films, thereby making it possible to reduce a stress of the entire sealing film. As a result, a crack due to stress hardly occurs.
摘要翻译：本发明的目的是提供一种发光装置，其包括形成在塑料基板上的OLED，其能够防止由于水分或氧气的渗透而导致的劣化。在塑料基板上，用于防止氧或水分渗透到OLED中的有机发光层（以下称为阻挡膜）中的多个膜和具有比阻挡膜的应力小的应力的膜被称为应力缓和膜），设置在阻挡膜之间的膜。由于多个阻挡膜的层压结构，即使在一个阻挡膜中发生裂纹，另一个阻挡膜可以有效地防止水分或氧气渗入有机发光层。此外，在阻挡膜之间插入有比阻挡膜小的应力的应力缓和膜，从而可以减小整个密封膜的应力。结果，几乎不发生由于应力引起的裂纹。

139. 发明授权

US07906429B2 Wiring material, semiconductor device provided with a wiring using the wiring material and method of manufacturing thereof 有权
标题翻译：配线材料，使用布线材料配线的半导体装置及其制造方法
公开(公告)号：US07906429B2
公开(公告)日：2011-03-15
申请号：US11825678
申请日：2007-07-09
申请人： Toru Takayama , Keiji Sato , Shunpei Yamazaki
发明人： Toru Takayama , Keiji Sato , Shunpei Yamazaki
IPC分类号： H01L21/4763
CPC分类号： H01L33/62 , C23C14/165 , C23C14/3414 , H01L21/2855 , H01L23/552 , H01L27/124 , H01L29/4908 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device having good TFT characteristics is realized. By using a high purity target as a target, using a single gas, argon (Ar), as a sputtering gas, setting the substrate temperature equal to or less than 300° C., and setting the sputtering gas pressure from 1.0 Pa to 3.0 Pa, the film stress of a film is made from −1×1010 dyn/cm2 to 1×1010 dyn/cm2. By thus using a conducting film in which the amount of sodium contained within the film is equal to or less than 0.3 ppm, preferably equal to or less than 0.1 ppm, and having a low electrical resistivity (equal to or less than 40 μΩ·cm), as a gate wiring material and a material for other wirings of a TFT, the operating performance and the reliability of a semiconductor device provided with the TFT can be increased.
摘要翻译：实现了具有良好的TFT特性的半导体器件。通过使用高纯度靶作为靶，使用单一气体氩（Ar）作为溅射气体，将基板温度设定为300℃以下，将溅射气体压力设定为1.0Pa〜3.0 Pa时，膜的膜应力为-1×1010dyn / cm 2〜1×1010dyn / cm 2。通过这样使用导电膜，其中膜中所含的钠的量等于或小于0.3ppm，优选等于或小于0.1ppm，并且具有低电阻率（等于或小于40μ＆OHgr· cm），作为栅极布线材料和TFT的其它布线的材料，可以提高设置有TFT的半导体器件的操作性能和可靠性。

140. 发明授权

US07776712B2 Method of forming a semiconductor device 有权
标题翻译：形成半导体器件的方法
公开(公告)号：US07776712B2
公开(公告)日：2010-08-17
申请号：US11799713
申请日：2007-05-02
申请人： Shunpei Yamazaki , Hisashi Ohtani , Hideomi Suzawa , Toru Takayama
发明人： Shunpei Yamazaki , Hisashi Ohtani , Hideomi Suzawa , Toru Takayama
IPC分类号： H01L21/425
CPC分类号： H01L29/78621 , G02F1/1368 , G02F2001/136245 , G02F2202/105 , H01L21/28061 , H01L27/124 , H01L29/4908 , H01L29/66757 , H01L29/78624 , H01L29/78627 , H01L2029/7863
摘要： There is provided a crystalline TFT in which reliability comparable to or superior to a MOS transistor can be obtained and excellent characteristics can be obtained in both an on state and an off state. A gate electrode of the crystalline TFT is formed of a laminate structure of a first gate electrode made of a semiconductor material and a second gate electrode made of a metal material. An n-channel TFT includes an LDD region, and a region overlapping with the gate electrode and a region not overlapping with the gate electrode are provided, so that a high electric field in the vicinity of a drain is relieved, and at the same time, an increase of an off current is prevented.
摘要翻译：提供了一种晶体TFT，其中可以获得与MOS晶体管相当或优于其的可靠性，并且可以在导通状态和截止状态两者中获得优异的特性。晶体TFT的栅电极由由半导体材料制成的第一栅电极和由金属材料制成的第二栅电极的叠层结构形成。 n沟道TFT包括LDD区域和与栅电极重叠的区域和与栅电极不重叠的区域，从而释放漏极附近的高电场，并且同时，防止了关断电流的增加。

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