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131. 发明授权

US09661579B1 Per-tone power control in OFDM 有权
公开(公告)号：US09661579B1
公开(公告)日：2017-05-23
申请号：US14268921
申请日：2014-05-02
申请人： MARVELL INTERNATIONAL LTD.
发明人： Hongyuan Zhang
IPC分类号： H04W52/04 , H04L27/26 , H04W72/04 , H04L5/00
CPC分类号： H04W52/04 , H04L5/0007 , H04L5/006 , H04L27/2601 , H04W52/34 , H04W52/343 , H04W52/346 , H04W72/042 , H04W72/0453
摘要： A first communication device calculates channel state information (CSI), and based on the CSI, (i) determines a first signal attenuation level corresponding to signals transmitted over a first sub-carrier frequency signal, and (ii) determines a second signal attenuation level corresponding to signals transmitted over a second sub-carrier frequency signal. The first communication device transmits data encoded over the first sub-carrier frequency and the second and second sub-carrier frequency to a second communication device by (i) increasing power loaded to signals transmitted over a sub-carrier frequency from among the first sub-carrier frequency and the second sub-carrier frequency that is associated with greater signal attenuation, and (ii) decreasing power loaded to signals transmitted over a sub-carrier frequency from among the first sub-carrier frequency and the second sub-carrier frequency that is associated with lesser signal attenuation.

132. 发明授权

US09653123B2 Direct data connectors for a sealed device and methods for forming a direct data connector for a sealed device 有权
公开(公告)号：US09653123B2
公开(公告)日：2017-05-16
申请号：US13946804
申请日：2013-07-19
申请人： MARVELL INTERNATIONAL LTD.
发明人： Ji-Feng Ying , Wen Huei Tsai
IPC分类号： B32B3/24 , G11B33/12 , G11B33/14 , H05K5/06
CPC分类号： G11B33/122 , G11B33/1466 , H05K5/069 , Y10T428/24273 , Y10T428/24339 , Y10T428/24347
摘要： According to various embodiments, a method for forming a direct data connector for a sealed device may be provided. The method may include: providing a substrate with a hole; and filling the hole with a filling material using a plating process.

133. 发明授权

US09647314B1 Structure of dual directional couplers for multiple-band power amplifiers 有权
公开(公告)号：US09647314B1
公开(公告)日：2017-05-09
申请号：US14706286
申请日：2015-05-07
申请人： Marvell International Ltd.
发明人： Huy Thong Nguyen , Poh Boon Leong , Xiaowei Zhong , Sun Shuo
IPC分类号： H01P5/18 , H01P5/04 , H01P3/08
CPC分类号： H01P5/18
摘要： A directional coupler for a wireless communication device includes a first input port, a first output port, a second input port, a second output port, and a coupled port. The first input port and the first output port are respectively configured to receive and provide a first signal to be transmitted from the wireless communication device. The second input port and the second output port are respectively configured to receive and provide a second signal to be transmitted from the wireless communication device. A coupled port is configured to selectively provide a coupled signal corresponding to each of, in respective modes, the first signal and the second signal.

134. 发明授权

US09645936B1 System and method for informing hardware to limit writing in a memory hierarchy 有权
公开(公告)号：US09645936B1
公开(公告)日：2017-05-09
申请号：US14669350
申请日：2015-03-26
申请人： MARVELL INTERNATIONAL LTD.
发明人： Kim Schuttenberg , Richard Bryant
IPC分类号： G06F12/00 , G06F12/0875 , G06F12/0811 , G06F13/00 , G06F13/28
CPC分类号： G06F12/0875 , G06F12/0811 , G06F13/00 , G06F2212/283 , G06F2212/452
摘要： Systems, methods, and other embodiments associated with providing limited writing in a memory hierarchy are described. According to one embodiment, an apparatus includes a plurality of memory devices sequentially configured in a memory hierarchy. The apparatus also includes a first logic configured to execute a first command to initiate a sequence of write operations to write data to the plurality of memory devices in the memory hierarchy via propagation of the data sequentially through the memory hierarchy. The apparatus further includes a second logic configured to execute a second command to initiate an interruption of the sequence of write operations by indicating to at least one memory device of the plurality of memory devices to terminate the propagation of the data through the memory hierarchy prior to completing the propagation.

135. 发明授权

US09641127B1 Operational transconductance amplifier of improved linearity 有权
公开(公告)号：US09641127B1
公开(公告)日：2017-05-02
申请号：US14731194
申请日：2015-06-04
申请人： Marvell International Ltd.
发明人： Zhigang Xu , Junxiong Deng , Taotao Yan
IPC分类号： H03F3/26 , H03F1/02 , H03F3/45 , H04B10/50 , H04B10/564
CPC分类号： H04B10/564 , H03F1/3211 , H03F3/45188 , H03F3/45475 , H03F2203/45116 , H04B10/501
摘要： Aspects of the disclosure provide an operational transconductance amplifier (OTA) having an output stage. The output stage includes a first amplifier path configured to drive a first output current from a first power supply and a first resistor coupled between the first power supply and a source terminal of a first transistor in the first amplifier path. The first resistor is configured to improve a linearity of the OTA.

136. 发明授权

US09635515B1 Apparatus and methods for generating an accurate estimate of a time of receipt of a packet 有权
公开(公告)号：US09635515B1
公开(公告)日：2017-04-25
申请号：US15187652
申请日：2016-06-20
申请人： Marvell International Ltd.
发明人： Vijay Ahirwar
IPC分类号： G01S3/02 , H04W4/04 , H04L7/00 , H04W4/00 , H04W4/02 , H04W8/00
CPC分类号： H04W4/04 , G01S5/02 , G01S11/08 , G01S13/76 , H04L7/0054 , H04L7/042 , H04W4/023 , H04W4/80
摘要： A first communication device generates a plurality of samples from a sampled signal, the sampled signal corresponding to a first sampling frequency, the plurality of samples correspond to a second sampling frequency that is greater than the first sampling frequency, and the sampled signal corresponds to a data unit wirelessly transmitted from a second communication device to the first communication device. The first communication device generates a correlation signal using the plurality of samples, and uses the correlation signal to generate a time estimate of a time at which the data unit was received at the first communication device. The first communication device uses the time estimate to estimate a distance between the first communication device and the second communication device.

137. 发明授权

US09608678B1 Method and apparatus for mitigating interference between wireless local area network (WLAN) communications and cellular communications 有权
公开(公告)号：US09608678B1
公开(公告)日：2017-03-28
申请号：US14571715
申请日：2014-12-16
申请人： Marvell International LTD.
发明人： Yakun Sun , Mingguang Xu , Hui-Ling Lou , Hongyuan Zhang , Yan Zhang , Liwen Chu , Jinjing Jiang
IPC分类号： H04B15/00 , H04B1/10 , H04W24/02
CPC分类号： H04B1/10 , H04B1/406 , H04B17/24 , H04B17/318 , H04W24/02 , H04W72/1215
摘要： A wireless device including a first receiver and a second receiver. The first receiver is configured to receive a first signal transmitted on a first network using a first communication standard, and generate, in response to a signal strength of the first signal being greater than or equal to a predetermined threshold, first information about the first signal based on a first portion of the first signal. The second receiver is configured to receive a second signal transmitted on a second network using a second communication standard, and suppress interference from the first signal based on the first information about the first signal. The first communication standard is different from the second communication standard. The first receiver and the second receiver are co-located in the wireless device.

138. 发明授权

US09606888B1 Hierarchical multi-core debugger interface 有权
公开(公告)号：US09606888B1
公开(公告)日：2017-03-28
申请号：US14147056
申请日：2014-01-03
申请人： Marvell International Ltd.
发明人： Robert Wiesner , Guido Kehrle
IPC分类号： G06F11/27 , G06F11/32
CPC分类号： G06F11/321 , G06F11/3664
摘要： A hierarchical multi-core debugger interface is described that is configured to enable debugging of a multi-core device. In some implementations, a multi-core debugger renders core-specific user interface components with a core-specific visual characteristic in the hierarchical multi-core debugger interface. In other implementations, the multi-core debugger renders core-specific user interface components in core-specific windows in the hierarchical multi-core debugger interface. In still other implementations, the multi-core debugger renders core-specific user interface components in core-specific windows in the hierarchical multi-core debugger interface, where each core-specific window is displayed with a core-specific visual characteristic.

139. 发明授权

US09606150B1 Sensing arrangement for sensing a voltage from multiple voltage sources 有权
公开(公告)号：US09606150B1
公开(公告)日：2017-03-28
申请号：US14205966
申请日：2014-03-12
申请人： Marvell International Ltd.
发明人： Ido Bourstein , Leonid Tsukerman
IPC分类号： H02J1/00 , G01R19/00
CPC分类号： G01R19/0084 , G01R19/0038
摘要： Some of the embodiments of the present disclosure provide an apparatus for sensing a voltage level of an output voltage that is selected from at least two voltage supplies, including: a maximum voltage generator circuit configured (i) to determine a voltage supply among the at least two voltage supplies that has a higher voltage level and (ii) to output a maximum voltage signal having a voltage level corresponding to the higher voltage level; and a sensing module configured to selectively sense the output voltages, the sensing module comprising a switch circuit configured to apply the maximum voltage signal to completely turn off supply of the output voltage when the output voltage is not to be sensed at the sensing module.

140. 发明申请

US20170077917A1 SELF RESETTING LATCH 审中-公开
标题翻译：自复位锁
公开(公告)号：US20170077917A1
公开(公告)日：2017-03-16
申请号：US15358617
申请日：2016-11-22
申请人： Marvell International Ltd.
发明人： Sasan CYRUSIAN
IPC分类号： H03K5/24 , H03K3/356
CPC分类号： H03K5/249 , H03K3/356113 , H03K5/24 , H03M1/12 , H03M1/124 , H03M9/00
摘要： An apparatus includes first and second input transistors receiving respective first and second input signals, and a feedback circuit coupled to the first and second input transistors. The first and second input transistors provide first and second nodes with first and second currents according to values of the first and second input signals, respectively, when the feedback circuit is turned on. The first and second input transistors produce a reset value on the nodes when the feedback circuit is turned off. A method includes resetting, using first and second input transistors, respectively, values of first and second nodes to a reset value, providing first and second currents to the nodes using the first and second input transistors according to values of first and second input signals, and determining the values of the nodes according to the values of the first and second input signals.
摘要翻译：一种装置包括接收相应的第一和第二输入信号的第一和第二输入晶体管，以及耦合到第一和第二输入晶体管的反馈电路。当反馈电路被接通时，第一和第二输入晶体管分别根据第一和第二输入信号的值分别为第一和第二节点提供第一和第二电流。当反馈电路关闭时，第一和第二输入晶体管在节点上产生复位值。一种方法包括使用第一和第二输入晶体管分别将第一和第二节点的值复位为复位值，根据第一和第二输入信号的值，使用第一和第二输入晶体管向节点提供第一和第二电流，以及根据第一和第二输入信号的值来确定节点的值。

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