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121. 发明专利

JPH02103951A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH02103951A
公开(公告)日：1990-04-17
申请号：JP25770588
申请日：1988-10-13
申请人： MITSUBISHI ELECTRIC CORP
发明人： IPPOSHI TAKASHI , NISHIMURA TADASHI , INOUE YASUAKI
IPC分类号： H01L21/762 , H01L21/316 , H01L21/76
摘要： PURPOSE:To suppress the occurrence of a bird's beak and to expand element forming regions by providing a compound forming rate larger than that in other parts by oxidizing isolating regions of Si single crystal layers after the formation of a polycrystal part or an amorphous part. CONSTITUTION:A single crystal Si 2 and SiO33 are provided on an insulating substrate 1. A window is provided at a region 4a corresponding to an element isolating region. Double-layer masks of Si3N44 having said region 4a and resist 5 are provided on the insulating substrate 1. Si ion beams B are implanted, and a specified region 2a is made amorphous. The entire resist 5 is removed, and annealing is performed at about 600 deg.C. Then the region 2a is made to be the polycrystalline region. Then, the entire resist is removed, and heat treatment is performed in O2. At this time, the compound forming rate of the polycrystalline or amorphous region 2a is larger than that of other single crystal regions. Therefore oxidization is made to progress quickly along the thickness. The occurrence of a bird's beak is effectively suppressed. Element isolating regions having the required thickness are formed. The element forming regions 2a and 2b are separated each other.

122. 发明专利

JP2003188250A SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF 审中-公开
公开(公告)号：JP2003188250A
公开(公告)日：2003-07-04
申请号：JP2001387522
申请日：2001-12-20
申请人： MITSUBISHI ELECTRIC CORP
发明人： IWAMATSU TOSHIAKI , IPPOSHI TAKASHI , MATSUMOTO TAKUJI , MAEDA SHIGENOBU
IPC分类号： H01L21/76 , H01L21/336 , H01L21/762 , H01L21/84 , H01L27/08 , H01L27/12 , H01L29/786
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device, wherein degradation of transistor characteristics is prevented by preventing an injected channel stop layer to be formed in an active region. SOLUTION: A resists mask RM12 is formed so that the part above the region, wherein a PMOS transistor is to be formed, becomes an opening. Then a channel stop is injected with energy such that it passes through a partial isolation oxide film PT11 to form a peak of an impurity profile within an SOI layer 3, and a channel stop layer N1 is formed within the SOI layer 3 under the partial isolation oxide film PT11, i.e., in a separated region. Here, the injected impurity is an N-type impurity, and when phosphorus is used, the injection energy thereof is, e.g. 60-120 keV, and the concentration for the channel stop layer N1 is set at 1×10 17 -1×10 19 /cm 3 . At that time, the impurity for channel stop injection is not stopped inside the SOI layer 3, which corresponds to the active region AR. COPYRIGHT: (C)2003,JPO

123. 发明专利

JP2002158359A SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD 失效
公开(公告)号：JP2002158359A
公开(公告)日：2002-05-31
申请号：JP2000354043
申请日：2000-11-21
申请人： MITSUBISHI ELECTRIC CORP
发明人： IWAMATSU TOSHIAKI , IPPOSHI TAKASHI , NARUOKA HIDEKI , HATTORI NOBUMI , MAEKAWA SHIGETO , YAMAGUCHI YASUO , MATSUMOTO TAKUJI
IPC分类号： H01L21/76 , H01L21/762 , H01L21/84 , H01L27/01 , H01L27/08 , H01L27/12 , H01L29/45 , H01L29/786
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device for preventing a fault due to a metal contamination and a method for manufacturing the same. SOLUTION: A region NR and a region PR are specified by a trench isolation oxide film ST21. A polysilicon film PS21 is selectively arranged on an upper part of the isolation oxide film ST21. A silicide layer SS2 is arranged on an upper part of the film PS21. A sidewall spacer SW2 is arranged on a side face of the film PS21. The film PS21 is arranged over two well regions at a position corresponding to the upper part of a P-N junction JP of a P-type well region WR11 and an N-type well region WR12 in an SOI layer 3.

124. 发明专利

JP2000340794A SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF 失效
公开(公告)号：JP2000340794A
公开(公告)日：2000-12-08
申请号：JP15390499
申请日：1999-06-01
申请人： MITSUBISHI ELECTRIC CORP
发明人： MATSUMOTO TAKUJI , IPPOSHI TAKASHI , YAMAGUCHI YASUO
IPC分类号： H01L21/336 , H01L21/762 , H01L29/786
摘要： PROBLEM TO BE SOLVED: To provide a MOS transistor which is less sensitive to DIBL(drain- induced barrier lowering) effect and can avoid occurrence of leakage current at ends of channel region resulting from the effect of electric field of an adjacent semiconductor element. SOLUTION: An SOI(semiconductor-on-insulator) substrate 10 has an embedded oxide film 31 formed on a silicon substrate 2 and an SOI layer 4 formed on the embedded oxide film 31. Because the embedded oxide film 31 contains fluorine almost uniformly over the entire region, its relative dielectric constant is lower than a silicon oxide film (relative dielectric constant of approximately 3.9), containing no fluorine. The embedded oxide film 31 is designed so as to have a fluorine concentration of 1×1019-1×1022 cm-3 over almost the entire region.

125. 发明专利

JP2000243973A SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF AND METHOD OF DESIGNING SEMICONDUCTOR DEVICE 失效
公开(公告)号：JP2000243973A
公开(公告)日：2000-09-08
申请号：JP17709199
申请日：1999-06-23
申请人： MITSUBISHI ELECTRIC CORP
发明人： YAMAGUCHI YASUO , MAEKAWA SHIGETO , IPPOSHI TAKASHI , IWAMATSU TOSHIAKI , MAEDA SHIGENOBU , HIRANO YUICHI , MATSUMOTO TAKUJI , MIYAMOTO SHOICHI
IPC分类号： H01L21/762 , H01L21/331 , H01L21/8238 , H01L21/84 , H01L27/01 , H01L27/08 , H01L27/092 , H01L27/12 , H01L29/786 , H01L31/00
摘要： PROBLEM TO BE SOLVED: To provide an SOI-structure semiconductor device in which a substrate floating effect is reduced. SOLUTION: Each transistor forming region in an SOI layer 3 is isolated by a partial oxide film 31 having a lower layer part where a well region is formed. A p-type well region 11 is formed in the lower layer of the partial oxide film 31 for separating NMOS transistors. An n-type well region 12 is formed in the lower layer of the partial oxide film 31 for separating PMOS transistors. A p-type well region 11 and an n-type well region 12 are formed adjacent to each other in the lower layer of the partial oxide film 31 separating an NMOS transistor and a PMOS transistor. A body region is in contact with an adjacent well region 11. A wiring layer formed on an interlayer insulating film 4 is electrically connected to the body region via a body contact provided in the interlayer insulating film 4.

126. 发明专利

JPH11121750A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH11121750A
公开(公告)日：1999-04-30
申请号：JP27713397
申请日：1997-10-09
申请人： MITSUBISHI ELECTRIC CORP
发明人： YAMAGUCHI YASUO , IPPOSHI TAKASHI
IPC分类号： H01L27/04 , H01L21/822 , H01L27/02 , H01L27/12 , H01L29/786
摘要： PROBLEM TO BE SOLVED: To obtain a semiconductor device having an SOI structure, whose ESD (electrostatic discharge) resistance is imroved. SOLUTION: PMOS transistors Q21 and Q22, which is brought into a foward biased state when a positive high voltage as surge is applied to a signal terminal 30, and NMOS transistors Q11 and Q12, which is brought into a forward biased state when a negative high voltage as the surge voltage is applied to the signal terminal 30, are provided. Furthermore, when the operating signal is applied from the signal terminal 30, the NMOS transistors Q11 and Q12 and the PMOS transistors Q21 and Q22 all are brought into off states.

127. 发明专利

JPH1174342A SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH1174342A
公开(公告)日：1999-03-16
申请号：JP32138197
申请日：1997-11-21
申请人： MITSUBISHI ELECTRIC CORP
发明人： IWAMATSU TOSHIAKI , IPPOSHI TAKASHI
IPC分类号： H01L21/76 , H01L21/28 , H01L21/336 , H01L29/06 , H01L29/40 , H01L29/51 , H01L29/786
摘要： PROBLEM TO BE SOLVED: To prevent electrostatic breakdown of a gate oxide film, by a method wherein thickness of an end rim of a field shield oxide film is larger than that of its center part, and a surface of a semiconductor substrate with a MOS transistor formed is positioned lower than a surface of a semiconductor substrate with the field shield oxide film formed. SOLUTION: Thickness of an FS gate oxide film is increased at a lower part of a side wall oxide film 106 which is an end rim of an FS gate electrode 10. This is because in formation of a sacrificial oxide film, oxygen being oxidizing agent enters the lower part of the side wall oxide film 106 to have a silicon substrate SB oxidized. Thus, breakdown at the end rim where an electric field is likely to be concentrated can be prevented, thereby improving reliability of a field separation structure. In addition, a distance from a wiring layer formed on an upper part of a MOS transistor can be increased, parasitic capacitance can be reduced, and a semiconductor device wherein operation can be accelerated and power consumption can be reduced is obtained.

128. 发明专利

JPH1117000A SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH1117000A
公开(公告)日：1999-01-22
申请号：JP17177397
申请日：1997-06-27
申请人： MITSUBISHI ELECTRIC CORP
发明人： MAEDA SHIGENOBU , IWAMATSU TOSHIAKI , MAEKAWA SHIGETO , IPPOSHI TAKASHI , YAMAGUCHI YASUO , HIRANO YUICHI
IPC分类号： H01L21/76 , H01L21/765 , H01L29/786
摘要： PROBLEM TO BE SOLVED: To restrain a semiconductor device from deteriorating in operating characteristics and reliability due to an insulating layer by a method wherein the upside of an oxidation-resistant film which covers the upside of a field shield electrode is coated with an oxide film, and the side faces of the oxide film, the oxidation-resistant film, and the electrode are covered with a second oxide film. SOLUTION: An oxide film OF2 is selectively removed through anisotropic etching using a resist mask R1 as a mask, a field shield(FS) upper oxide film 41 is formed, the resist mask R1 is removed, a nitride film NF2 and a polysilicon layer PS1 are selectively removed through anisotropic etching using the FS upper oxide film 41 as a mask, and an FS upper nitride film 15 and an FS electrode 5 are formed. An oxide film OF3 is formed so as to cover the FS upper nitride film 15 and the FS electrode 5, the oxide films OF3 and OF1 are removed, a side wall oxide film 42 is formed on the side, and an FS gate oxide film 43 is formed for the formation of an FS insulating layer 4. A silicide film becoming conductive dust is prevented from being formed on the surface of an FS upper nitride film.

129. 发明专利

JPH10150198A THIN FILM TRANSISTOR AND ITS MANUFACTURE 失效
公开(公告)号：JPH10150198A
公开(公告)日：1998-06-02
申请号：JP30662696
申请日：1996-11-18
申请人： MITSUBISHI ELECTRIC CORP
发明人： MAEKAWA SHIGETO , IPPOSHI TAKASHI , IWAMATSU TOSHIAKI , MAEDA SHIGENOBU , KIN ITSUCHIYUU , TO KAZUHITO , KURIYAMA SACHITADA , ISHIGAKI YOSHIYUKI , UKITA MOTOMU , TSUTSUMI TOSHIAKI
IPC分类号： H01L21/265 , H01L21/336 , H01L27/11 , H01L27/12 , H01L29/417 , H01L29/45 , H01L29/786
摘要： PROBLEM TO BE SOLVED: To provide a thin film transistor having a constitution, wherein polysilicon layers having different conductivity types are connected with the transistor and the generation of the unsatisfactory state due to the diffusion of impurities is prevented, and a method of manufacturing the transistor. SOLUTION: A drain 6, a channel 7 and a source 8 are integrally formed on the surface of a second oxide film 4 using polysilicon layers. The drain 6 is formed in such a way as to connect with a pad layer 3 (second polycrystalline semiconductor layer) via a contact hole 5 formed in such a way as to reach the upper surface of the pad layer 3. A boron implanted region BR is formed in the pad layer 3, which is positioned on the bottom of the hole 5 (open part).

130. 发明专利

JPH0799207A THIN FILM TRANSISTOR AND ITS MANUFACTURE 失效
公开(公告)号：JPH0799207A
公开(公告)日：1995-04-11
申请号：JP12022494
申请日：1994-06-01
申请人： MITSUBISHI ELECTRIC CORP
发明人： SHIMIZU SATORU , UENO SHUICHI , MAEDA SHIGENOBU , IPPOSHI TAKASHI
IPC分类号： H01L21/20 , H01L21/265 , H01L21/336 , H01L27/11 , H01L29/78 , H01L29/786 , H01L29/784
摘要： PURPOSE:To evenly improve electric characteristics of TFTs by implanting silicon ion into a specified area of polysilicon film so that, with a part of the film left, the remaining polysilicon film is formed into an amorphous silicon. CONSTITUTION:After a polysilicon film layer is formed on an insulation film 1, a gate electrode 2, consisting of polysilicon, is formed by patterning. A gate insulation film 3 is formed so as to cover the gate electrode 2 by CVD method. Then, silicon is ion-implanted on its entire surface, so that any part of a polysilicon 5 other than those at the side wall of gate electrode 2 is made into amorphous, thus an amorphous silicon 5a is formed. Since, with this, solid phase recrystallization of the amorphous silicon 5 is evenly performed, the characteristics of individual film transistor is improved.

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