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111. 发明授权

US09129222B2 Method and apparatus for a local competitive learning rule that leads to sparse connectivity 有权
标题翻译：本地竞争性学习规则的方法和设备，导致连接稀疏
公开(公告)号：US09129222B2
公开(公告)日：2015-09-08
申请号：US13166269
申请日：2011-06-22
申请人： Vladimir Aparin
发明人： Vladimir Aparin
IPC分类号： G06N3/10 , G06N3/08 , G06N3/06 , G05B13/02
CPC分类号： G06N3/08 , G05B13/024 , G05B13/027 , G06N3/06 , G06N3/088
摘要： Certain aspects of the present disclosure support a local competitive learning rule applied in a computational network that leads to sparse connectivity among processing units of the network. The present disclosure provides a modification to the Oja learning rule, modifying the constraint on the sum of squared weights in the Oja rule. This constraining can be intrinsic and local as opposed to the commonly used multiplicative and subtractive normalizations, which are explicit and require the knowledge of all input weights of a processing unit to update each one of them individually. The presented rule provides convergence to a weight vector that is sparser (i.e., has more zero elements) than the weight vector learned by the original Oja rule. Such sparse connectivity can lead to a higher selectivity of processing units to specific features, and it may require less memory to store the network configuration and less energy to operate it.
摘要翻译：本公开的某些方面支持在计算网络中应用的本地竞争性学习规则，其导致网络的处理单元之间的稀疏连接。本公开提供了对Oja学习规则的修改，修改了Oja规则中的平方权重之和的约束。这种约束可以是内在的和局部的，而不是通常使用的乘法和减法规范化，它们是显式的，并且需要知道处理单元的所有输入权重以分别更新它们中的每一个。所呈现的规则提供了与由原始Oja规则学习的权重向量相比更加稀疏（即，具有更多零个元素）的权重向量的收敛。这种稀疏连接可以导致处理单元对特定特征的更高选择性，并且可能需要更少的存储器来存储网络配置和较少的能量来操作它。

112. 发明授权

US08959040B1 Spike timing dependent plasticity apparatus, system and method 有权
标题翻译：尖峰定时可塑性仪器，系统和方法
公开(公告)号：US08959040B1
公开(公告)日：2015-02-17
申请号：US13415812
申请日：2012-03-08
申请人： Jose Cruz-Albrecht , Peter Petre , Narayan Srinivasa
发明人： Jose Cruz-Albrecht , Peter Petre , Narayan Srinivasa
IPC分类号： G06N3/00 , G06G7/00 , G06N3/063 , G06N3/06
CPC分类号： G06N3/0635 , G06N3/049 , G06N3/06
摘要： A spike timing dependent plasticity (STDP) apparatus, neuromorphic synapse system and a method provide STDP processing of spike signals. The STDP apparatus includes a first leaky integrator to receive a first spike signal and a second leaky integrator to receive a second spike signal. An output of the first leaky integrator is gated according to the second spike signal to produce a first gated integrated signal and an output of the second leaky integrator is gated according to the first spike signal to produce a second gated integrated signal. The STDP apparatus further includes an output integrator to integrate a difference of the first and second gated integrated signals to produce a weighted signal. The system includes a synapse core and the STDP apparatus. The method includes integrating the spike signals, gating the integrated signals and integrating a difference of the gated integrated signals.
摘要翻译：尖峰定时依赖可塑性（STDP）装置，神经突触突触系统和一种方法提供尖峰信号的STDP处理。 STDP装置包括用于接收第一尖峰信号的第一泄漏积分器和用于接收第二尖峰信号的第二泄漏积分器。第一泄漏积分器的输出根据第二尖峰信号选通，以产生第一门控积分信号，并且第二泄漏积分器的输出根据第一尖峰信号选通，以产生第二门控积分信号。 STDP装置还包括输出积分器，用于积分第一和第二门控积分信号的差以产生加权信号。该系统包括突触核心和STDP设备。该方法包括对尖峰信号进行积分，门控积分信号并积分门控积分信号的差值。

113. 发明申请

US20130339281A1 MULTI-PROCESSOR CORTICAL SIMULATIONS WITH RECIPROCAL CONNECTIONS WITH SHARED WEIGHTS 有权
标题翻译：具有共享重量的双向连接的多处理器反射模拟
公开(公告)号：US20130339281A1
公开(公告)日：2013-12-19
申请号：US13524798
申请日：2012-06-15
申请人： Pallab Datta , Steven K. Esser , Dharmendra S. Modha
发明人： Pallab Datta , Steven K. Esser , Dharmendra S. Modha
IPC分类号： G06N3/04
CPC分类号： G06N3/02 , G06N3/049 , G06N3/06 , G06N3/10
摘要： Embodiments of the invention relate to distributed simulation frameworks that provide reciprocal communication. One embodiment comprises interconnecting neuron groups on different processors via a plurality of reciprocal communication pathways, and facilitating the exchange of reciprocal spiking communication between two different processors using at least one Ineuron module. Each processor includes at least one neuron group. Each neuron group includes at least one electronic neuron.
摘要翻译：本发明的实施例涉及提供相互通信的分布式仿真框架。一个实施例包括经由多个相互通信路径在不同处理器上互连神经元组，并且促进使用至少一个Ineuron模块交换两个不同处理器之间的相互加速通信。每个处理器包括至少一个神经元组。每个神经元组包括至少一个电子神经元。

114. 发明申请

US20120084241A1 PRODUCING SPIKE-TIMING DEPENDENT PLASTICITY IN A NEUROMORPHIC NETWORK UTILIZING PHASE CHANGE SYNAPTIC DEVICES 有权
标题翻译：在使用相位变化的同步设备的神经网络中生产依赖于时间的相对塑性
公开(公告)号：US20120084241A1
公开(公告)日：2012-04-05
申请号：US12895791
申请日：2010-09-30
申请人： Daniel J. Friedman , Seongwon Kim , Chung H. Lam , Dharmendra S. Modha , Bipin Rajendran , Jose A. Tierno
发明人： Daniel J. Friedman , Seongwon Kim , Chung H. Lam , Dharmendra S. Modha , Bipin Rajendran , Jose A. Tierno
IPC分类号： G06N3/063
CPC分类号： G06N3/06 , G06N3/049 , G06N3/063 , G06N3/0635 , G06N3/08 , G11C11/54 , G11C13/0004
摘要： Embodiments of the invention relate to a neuromorphic network for producing spike-timing dependent plasticity. The neuromorphic network includes a plurality of electronic neurons and an interconnect circuit coupled for interconnecting the plurality of electronic neurons. The interconnect circuit includes plural synaptic devices for interconnecting the electronic neurons via axon paths, dendrite paths and membrane paths. Each synaptic device includes a variable state resistor and a transistor device with a gate terminal, a source terminal and a drain terminal, wherein the drain terminal is connected in series with a first terminal of the variable state resistor. The source terminal of the transistor device is connected to an axon path, the gate terminal of the transistor device is connected to a membrane path and a second terminal of the variable state resistor is connected to a dendrite path, such that each synaptic device is coupled between a first axon path and a first dendrite path, and between a first membrane path and said first dendrite path.
摘要翻译：本发明的实施例涉及一种用于产生尖峰时序相关可塑性的神经形态网络。神经元网络包括多个电子神经元和耦合用于互连多个电子神经元的互连电路。互连电路包括用于经由轴突路径，枝晶路径和膜路径互连电子神经元的多个突触装置。每个突触装置包括可变状态电阻器和具有栅极端子，源极端子和漏极端子的晶体管器件，其中漏极端子与可变状态电阻器的第一端子串联连接。晶体管器件的源极端子连接到轴突路径，晶体管器件的栅极端子连接到膜路径，并且可变状态电阻器的第二端子连接到树突路径，使得每个突触器件被耦合在第一轴突路径和第一枝晶路径之间以及在第一膜路径和所述第一枝晶路径之间。

115. 发明授权

US07747070B2 Training convolutional neural networks on graphics processing units 有权
标题翻译：在图形处理单元上训练卷积神经网络
公开(公告)号：US07747070B2
公开(公告)日：2010-06-29
申请号：US11217711
申请日：2005-08-31
申请人： Siddhartha Puri
发明人： Siddhartha Puri
IPC分类号： G06K9/62 , G06F15/18 , G06E1/00 , G06E3/00 , G06G7/00 , G06N3/02
CPC分类号： G06K9/4628 , G06K2209/01 , G06N3/06 , G06N3/084
摘要： A convolutional neural network is implemented on a graphics processing unit. The network is then trained through a series of forward and backward passes, with convolutional kernels and bias matrices modified on each backward pass according to a gradient of an error function. The implementation takes advantage of parallel processing capabilities of pixel shader units on a GPU, and utilizes a set of start-to-finish formulas to program the computations on the pixel shaders. Input and output to the program is done through textures, and a multi-pass summation process is used when sums are needed across pixel shader unit registers.
摘要翻译：在图形处理单元上实现卷积神经网络。然后通过一系列前向和后向遍历来训练网络，根据误差函数的梯度，在每个后向遍历中修改卷积内核和偏置矩阵。该实现利用GPU上的像素着色器单元的并行处理能力，并利用一组从头到尾的公式来编程像素着色器上的计算。程序的输入和输出是通过纹理完成的，并且当跨像素着色器单元寄存器需要总和时，使用多遍求和处理。

116. 发明授权

US07181768B1 Computer intrusion detection system and method based on application monitoring 有权
标题翻译：基于应用监控的计算机入侵检测系统及方法
公开(公告)号：US07181768B1
公开(公告)日：2007-02-20
申请号：US09698159
申请日：2000-10-30
申请人： Anup K. Ghosh , Michael Schatz , Christoph C. Michael , Aaron Schwartzbard
发明人： Anup K. Ghosh , Michael Schatz , Christoph C. Michael , Aaron Schwartzbard
IPC分类号： G06F19/00
CPC分类号： H04L63/1408 , G06F21/552 , G06N3/06
摘要： An intrusion detection system (IDS) that uses application monitors for detecting application-based attacks against computer systems. The IDS implements application monitors in the form of a software program to learn and monitor the behavior of system programs in order to detect attacks against computer hosts. The application monitors implement machine learning algorithms to provide a mechanism for learning from previously observed behavior in order to recognize future attacks that it has not seen before. The application monitors include temporal locality algorithms to increased the accuracy of the IDS. The IDS of the present invention may comprise a string-matching program, a neural network, or a time series prediction algorithm for learning normal application behavior and for detecting anomalies.
摘要翻译：入侵检测系统（IDS），使用应用程序监视器来检测针对计算机系统的基于应用程序的攻击。 IDS以软件程序的形式实现应用程序监视器，以学习和监视系统程序的行为，以便检测对计算机主机的攻击。应用程序监视器实现机器学习算法，以提供从先前观察到的行为学习的机制，以便识别以前未曾看到的未来攻击。应用程序监视器包括时间局部性算法，以提高IDS的准确性。本发明的IDS可以包括用于学习正常应用行为和用于检测异常的串匹配程序，神经网络或时间序列预测算法。

117. 发明公开

EP3392809A1 QUANTUM COMPUTING MACHINE LEARNING MODULE 审中-公开
公开(公告)号：EP3392809A1
公开(公告)日：2018-10-24
申请号：EP18161882.8
申请日：2018-03-15
申请人： Accenture Global Solutions Limited
发明人： DUKATZ, Carl Matthew , GARRISON, Daniel , FORRESTER, Lascelles , HOLLENBECK, Corey
IPC分类号： G06N99/00 , G06F9/50
CPC分类号： G06N99/005 , G06F9/50 , G06N3/06 , G06N99/002
摘要： Methods, systems, and apparatus for training a machine learning model to route received computational tasks in a system including one or more quantum computing resources. In one aspect, a method includes obtaining a first set of data, the first set of data comprising data representing multiple computational tasks previously performed by the system; obtaining input data for the multiple computational tasks previously performed by the system, comprising data representing a type of computing resource the task was routed to; obtaining a second set of data, the second set of data comprising data representing properties associated with using the one or more quantum computing resources to solve the multiple computational tasks; and training the machine learning model to route received data representing a computational task to be performed using the (i) first set of data, (ii) input data, and (iii) second set of data.

118. 发明公开

EP3295385A1 FIXED POINT NEURAL NETWORK BASED ON FLOATING POINT NEURAL NETWORK QUANTIZATION 审中-公开
公开(公告)号：EP3295385A1
公开(公告)日：2018-03-21
申请号：EP16718825
申请日：2016-04-14
申请人： QUALCOMM INC
发明人： LIN DEXU , ANNAPUREDDY VENKATA SREEKANTA REDDY , HOWARD DAVID EDWARD , JULIAN DAVID JONATHAN , MAJUMDAR SOMDEB , BELL II WILLIAM RICHARD
IPC分类号： G06N3/10 , G06N3/06
CPC分类号： G06N3/08 , G06N3/04 , G06N3/06 , G06N3/10
摘要： A method of quantizing a floating point machine learning network to obtain a fixed point machine learning network using a quantizer may include selecting at least one moment of an input distribution of the floating point machine learning network. The method may also include determining quantizer parameters for quantizing values of the floating point machine learning network based at least in part on the at least one selected moment of the input distribution of the floating point machine learning network to obtain corresponding values of the fixed point machine learning network.

119. 发明公开

EP3138052A1 QUANTUM-ASSISTED TRAINING OF NEURAL NETWORKS 审中-公开
标题翻译： ON。。。。。。。。。。。。。。
公开(公告)号：EP3138052A1
公开(公告)日：2017-03-08
申请号：EP15723604.3
申请日：2015-05-01
申请人： Lockheed Martin Corporation
发明人： ADACHI, Steven H. , DAVENPORT, Daniel M. , HENDERSON, Maxwell P.
IPC分类号： G06N99/00 , G06N3/06 , G06N3/04 , B82Y10/00
CPC分类号： G06N3/04 , G06N3/06 , G06N99/002
摘要： Aspects of the disclosure provide a method for configuring a Quantum Annealing (QA) device. Then QA device has a plurality of qubits and a plurality of couplers at overlapping intersections of the qubits. The method includes mapping a node of a neural network that have a plurality of nodes and connections between the nodes to a qubit in the QA device, and mapping a connection of the neural network to a coupler at an intersection in the QA device where two qubits corresponding to two nodes connected by the connection intersect. The method further includes mapping a node of the neural network to a chain of qubits. In an embodiment, a coupling between qubits in the chain is configured to be a ferromagnetic coupling in order to map the node of the neural network to the chain of qubits.
摘要翻译：本公开的方面提供了用于配置量子退火（QA）装置的方法。然后，QA装置在量子位的重叠交叉处具有多个量子位和多个耦合器。该方法包括将具有多个节点和节点之间的连接的神经网络的节点映射到QA设备中的量子位，并将神经网络的连接映射到QA设备中的交叉点处，其中两个量子位对应于通过连接相连的两个节点。该方法还包括将神经网络的节点映射到量子比特链。在一个实施例中，链中的量子位之间的耦合被配置为铁磁耦合，以将神经网络的节点映射到量子位链。

120. 发明公开

EP3053108A1 CIRCUIT ELECTRONIQUE, NOTAMMENT APTE A L'IMPLEMENTATION D'UN RESEAU DE NEURONES, ET SYSTEME NEURONAL 审中-公开
标题翻译：电子电路，特别适合于实现神经网络和神经系统
公开(公告)号：EP3053108A1
公开(公告)日：2016-08-10
申请号：EP14780808.3
申请日：2014-09-29
申请人： Commissariat à l'Énergie Atomique et aux Énergies Alternatives
发明人： DURANTON, Marc , PHILIPPE, Jean-Marc , PAINDAVOINE, Michel
IPC分类号： G06N3/06
CPC分类号： G06N3/063 , G06N3/06
摘要： The invention applies in particular in respect of implementation of neural networks on silicon for the processing of diverse signals, including multidimensional signals such as images for example. More generally, the invention allows the efficient realization on silicon of a complete signal processing chain by the neural network approach. The circuit comprises at least: - a series of neuro-blocks grouped together by branches, a branch being formed of a group of neuro-blocks (1) and of a broadcasting bus, the neuro-blocks being connected to said broadcasting bus (2); - a routing unit (3) linked to the branches broadcasting bus, performing at least the routing and the broadcasting of data to and from said branches; - a transformation module (6) linked to the routing unit (3) by an internal bus (21) and enabled to be linked at the input of said circuit (10) to an external data bus (7), the module (6) performing the transformation of the input data into serial coded data. All the internal processing to the said circuit is performed according to a serial communication protocol.

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