会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 111. 发明申请
    • Synchronization method and apparatus of moving picture experts group transport stream for reducing initial delay
    • 运动图像专家组同步方法和装置,用于减少初始延迟
    • US20070064814A1
    • 2007-03-22
    • US11521599
    • 2006-09-15
    • Sung-Jin ParkJi-Won HaJin-Wook Han
    • Sung-Jin ParkJi-Won HaJin-Wook Han
    • H04B1/66
    • H04N21/4382H04L7/042H04N21/2389H04N21/4385
    • A method and apparatus for synchronization of a moving picture experts group (MPEG) transport stream, which minimizes an initial delay are provided. A packet synchronization unit and a mode of the packet synchronization unit to are initialized to “0”. Values of sync words are stored by shifting values of a sync word register when the sync words have been received and the received sync word is compared with predetermined code words As a result of the comparison, a determination is made as to whether a bit difference between the sync words and the predetermined code words exceeds a predetermined threshold value. A verification is then made as to whether all bits of the sync words correspond to all bits of the predetermined code words, when it is determined as a result of the determination that the bit difference is less than or equal to the predetermined threshold value and the MPEG transport stream is descrambled before returning to step of storing values of sync words by shifting values of a sync word register.
    • 提供了使初始延迟最小化的运动图像专家组(MPEG)传输流的同步的方法和装置。 分组同步单元和分组同步单元的模式被初始化为“0”。 同步字的值通过移位同步字寄存器的值而被存储,同步字已经被接收并且接收到的同步字与预定的码字进行比较作为比较的结果,确定是否有位差 同步字和预定码字超过预定阈值。 然后,当作为确定比特差小于或等于预定阈值的结果确定同步字的所有比特是否对应于预定码字的所有比特时进行验证,并且 在转移同步字寄存器的值的同步字存储值的步骤之前,将MPEG传输流解扰。
    • 119. 发明申请
    • Apparatus and method for decoding low density parity check codes
    • 解码低密度奇偶校验码的装置和方法
    • US20050262420A1
    • 2005-11-24
    • US11133287
    • 2005-05-20
    • Sung-Jin ParkMin-Goo KimNam YuHan-Ju Kim
    • Sung-Jin ParkMin-Goo KimNam YuHan-Ju Kim
    • H04L27/18H03M13/00H03M13/11
    • H03M13/6566H03M13/1137
    • An apparatus and method for decoding low density parity check (LDPC) codes are provided. A memory module configured by a plurality of unit memories stores a reliability value. Variable node processors perform a computation associated with a variable node, and update data of the memory module in a column direction, respectively. Check node processors perform a computation associated with a check node, and update data of the memory module in a row direction, respectively. A parity checker determines if all errors have been corrected such that an iterative decoding process is performed. A memory access control module selects a unit memory to be updated by a variable node processor or a check node processor.
    • 提供了一种用于解码低密度奇偶校验(LDPC)码的装置和方法。 由多个单元存储器构成的存储器模块存储可靠性值。 可变节点处理器执行与变量节点相关联的计算,并且分别在列方向上更新存储器模块的数据。 检查节点处理器执行与校验节点相关联的计算,并分别更新存储器模块在行方向上的数据。 奇偶校验器确定所有错误是否已经被校正,使得执行迭代解码过程。 存储器访问控制模块选择要由可变节点处理器或校验节点处理器更新的单元存储器。