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111. 发明申请

US20070007546A1 Semiconductor gas sensor and method for manufacturing the same 审中-公开
标题翻译：半导体气体传感器及其制造方法
公开(公告)号：US20070007546A1
公开(公告)日：2007-01-11
申请号：US11476682
申请日：2006-06-29
申请人： Yasushi Goto , Toshiyuki Mine , Koichi Yokosawa
发明人： Yasushi Goto , Toshiyuki Mine , Koichi Yokosawa
IPC分类号： H01L29/74
CPC分类号： G01N27/4141 , G01N33/0047 , G01N33/005
摘要： The present invention provides a manufacturing method enabling suppression of threshold voltage fluctuation without giving any damage to a gate insulating film when a transistor structure is formed at first in a field effect transistor type of gas sensor and then an electrode with a material responsive to a gas to be detected is formed. The gate insulating film is a film stack including at least an SiO2 film and an SRN (Si-rich nitride) film. The SRN film functions as a etching stopper film when the gate insulating film is exposed by etching of an inter-layer insulating film. Pressure resistance of the gate insulating film is preserved with SiO2. An electric charge in the SRN film can be removed with a lower voltage as compare to that required for removing an electric charge in the Si3N4 film, which enables suppression of threshold voltage fluctuation in gas sensor transistors.
摘要翻译：本发明提供一种制造方法，能够在场效应晶体管型气体传感器中首先形成晶体管结构之后抑制阈值电压波动，而不会对栅极绝缘膜造成任何损害，然后是具有响应于气体的材料的电极被形成。栅绝缘膜是至少包括SiO 2膜和SRN（富Si的氮化物）膜的膜堆叠。当栅极绝缘膜通过蚀刻层间绝缘膜而暴露时，SRN膜用作蚀刻停止膜。栅极绝缘膜的耐压性由SiO 2保持。与去除Si 3 N 4 N 3膜中的电荷相比，SRN膜中的电荷可以以较低的电压去除，这使得能够抑制气体传感器晶体管的阈值电压波动。

112. 发明授权

US07141475B2 Non-volatile semiconductor memory and method of making same, and semiconductor device and method of making device 有权
公开(公告)号：US07141475B2
公开(公告)日：2006-11-28
申请号：US10954102
申请日：2004-09-30
申请人： Tetsuo Adachi , Masataka Kato , Toshiaki Nishimoto , Nozomu Matsuzaki , Takashi Kobayashi , Yoshimi Sudou , Toshiyuki Mine
发明人： Tetsuo Adachi , Masataka Kato , Toshiaki Nishimoto , Nozomu Matsuzaki , Takashi Kobayashi , Yoshimi Sudou , Toshiyuki Mine
IPC分类号： H01L21/8247
CPC分类号： H01L21/28273 , G11C11/5628 , G11C16/0466 , G11C16/10 , G11C16/3454 , H01L21/28061 , H01L27/105 , H01L27/115 , H01L27/11519 , H01L27/11526 , H01L27/11529 , H01L27/11536 , H01L27/11546 , H01L29/6659 , H01L29/66825 , H01L29/7833
摘要： A semiconductor device, which ensures device reliability especially in fine regions and enables great capacitance and high-speed operations, has memory cells including, in a first region of a main surface of a semiconductor substrate, a gate insulating film, a floating gate electrode, an interlayer insulating film, a control gate electrode, and source and drain regions of the second conduction type arranged in a matrix, with a shallow isolation structure for isolating the memory cells. When using a shallow structure buried with an insulating film for element isolation, the isolation withstand voltage in fine regions can be prevented from lowering and the variation in threshold level of selective transistors can be reduced. When the memory cells in a memory mat are divided by means of selective transistors, the disturb resistance of the memory cells can be improved.

113. 发明授权

US07109072B2 Semiconductor material, field effect transistor and manufacturing method thereof 失效
标题翻译：半导体材料，场效应晶体管及其制造方法
公开(公告)号：US07109072B2
公开(公告)日：2006-09-19
申请号：US11072414
申请日：2005-03-07
申请人： Shinichi Saito , Tadashi Arai , Seong-Kee Park , Toshiyuki Mine
发明人： Shinichi Saito , Tadashi Arai , Seong-Kee Park , Toshiyuki Mine
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： H01L29/42392 , B82Y10/00 , H01L27/12 , H01L27/1292 , H01L29/0673 , H01L29/66772 , H01L29/78603 , H01L29/78696 , Y10S977/723 , Y10S977/762 , Y10S977/932 , Y10S977/937
摘要： The silicon wires formed around metal particles by crystal growth have the problem of metal pollution. For its solution, in the present invention, a silicon bridge is formed through standard silicon processes such as the lithography and the wet etching using hydrofluoric acid performed to an SOI substrate. Thereafter, a thermal oxide film is desirably formed at a high temperature to form a high-quality gate insulating film. It is also desirable to form a coaxial gate electrode. Then, after burying the bridge sections of the silicon bridge in a resist film, the silicon on the bridge girders is removed, and thereafter, the silicon wires buried in the resist film are collected. In this manner, the silicon wires can be collected without dispersing into the hydrofluoric acid solution. Then, a transistor using the silicon wires as a channel is formed.
摘要翻译：通过晶体生长在金属颗粒周围形成的硅线具有金属污染的问题。对于其解决方案，在本发明中，通过使用对SOI衬底执行的氢氟酸的光刻和湿蚀刻的标准硅工艺形成硅桥。此后，期望在高温下形成热氧化膜以形成高质量的栅极绝缘膜。还希望形成同轴栅电极。然后，在将硅桥的桥接部分埋入抗蚀剂膜中之后，除去桥梁上的硅，然后收集埋在抗蚀剂膜中的硅线。以这种方式，可以收集硅线而不会分散到氢氟酸溶液中。然后，形成使用硅线作为沟道的晶体管。

114. 发明申请

US20060088960A1 Semiconductor material, field effect transistor and manufacturing method thereof 失效
公开(公告)号：US20060088960A1
公开(公告)日：2006-04-27
申请号：US11072414
申请日：2005-03-07
申请人： Shinichi Saito , Tadashi Arai , Seong-Kee Park , Toshiyuki Mine
发明人： Shinichi Saito , Tadashi Arai , Seong-Kee Park , Toshiyuki Mine
IPC分类号： H01L21/84 , H01L21/302
CPC分类号： H01L29/42392 , B82Y10/00 , H01L27/12 , H01L27/1292 , H01L29/0673 , H01L29/66772 , H01L29/78603 , H01L29/78696 , Y10S977/723 , Y10S977/762 , Y10S977/932 , Y10S977/937
摘要： The silicon wires formed around metal particles by crystal growth have the problem of metal pollution. For its solution, in the present invention, a silicon bridge is formed through standard silicon processes such as the lithography and the wet etching using hydrofluoric acid performed to an SOI substrate. Thereafter, a thermal oxide film is desirably formed at a high temperature to form a high-quality gate insulating film. It is also desirable to form a coaxial gate electrode. Then, after burying the bridge sections of the silicon bridge in a resist film, the silicon on the bridge girders is removed, and thereafter, the silicon wires buried in the resist film are collected. In this manner, the silicon wires can be collected without dispersing into the hydrofluoric acid solution. Then, a transistor using the silicon wires as a channel is formed.

115. 发明申请

US20060081949A1 Semiconductor device and process for producing the same 有权
公开(公告)号：US20060081949A1
公开(公告)日：2006-04-20
申请号：US11296289
申请日：2005-12-08
申请人： Jiro Yugami , Natsuki Yokoyama , Toshiyuki Mine , Yasushi Goto
发明人： Jiro Yugami , Natsuki Yokoyama , Toshiyuki Mine , Yasushi Goto
IPC分类号： H01L29/94
CPC分类号： H01L21/28194 , H01L21/28079 , H01L21/28114 , H01L21/28176 , H01L21/28185 , H01L21/823418 , H01L21/823425 , H01L21/823456 , H01L21/823462 , H01L29/42368 , H01L29/495 , H01L29/51 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/78
摘要： There is provided a semiconductor device configured as follows. On a semiconductor substrate, a titanium oxide film which is an insulating film having a higher dielectric constant than that of a silicon dioxide film is formed as a gate insulating film, and a gate electrode is disposed thereon, resulting in a field effect transistor. The end portions in the gate length direction of the titanium oxide film are positioned inwardly from the respective end portions on the source side and on the drain side of the gate electrode, and the end portions of the titanium oxide film are positioned in a region in which the gate electrode overlaps with the source region and the drain region in plan configuration. This semiconductor device operates at a high speed, and is excellent in short channel characteristics and driving current. Further, in the semiconductor device, the amount of metallic elements introduced into a silicon substrate is small.

116. 发明申请

US20060068561A1 Semiconductor device and method for manufacturing thereof 有权
公开(公告)号：US20060068561A1
公开(公告)日：2006-03-30
申请号：US11271962
申请日：2005-11-14
申请人： Shimpei Tsujikawa , Toshiyuki Mine , Jiro Yugami , Natsuki Yokoyama , Tsuyoshi Yamauchi
发明人： Shimpei Tsujikawa , Toshiyuki Mine , Jiro Yugami , Natsuki Yokoyama , Tsuyoshi Yamauchi
IPC分类号： H01L21/76
CPC分类号： H01L21/823857 , H01L21/823462
摘要： A semiconductor device and a method for manufacturing the same of forming a silicon nitride film selectively without giving damages or contaminations to a surface of the silicon substrate thereby forming different types of gate dielectrics in one identical silicon substrate, are obtained by forming a silicon dioxide on the surface of a silicon substrate, then removing a portion thereof, forming a silicon nitride film to the surface of the substrate from which the silicon dioxide has been removed and, simultaneously, introducing nitrogen to the surface of the silicon dioxide which is left not being removed or, alternatively, depositing a silicon dioxide on the surface of the silicon substrate by chemical vapor deposition, then removing a portion thereof, forming a silicon nitride film on the surface of a substrate from which the silicon dioxide has been removed, and, simultaneously, introducing nitrogen to the surface of the silicon dioxide left not being removed, successively, dissolving and removing nitrogen-introduced silicon oxide film to expose the surface of the substrate and oxidizing the exposed surface of the silicon substrate and the silicon nitride film.

117. 发明申请

US20050280000A1 Semiconductor memory device 失效
标题翻译：半导体存储器件
公开(公告)号：US20050280000A1
公开(公告)日：2005-12-22
申请号：US11156558
申请日：2005-06-21
申请人： Tomoyuki Ishii , Toshiyuki Mine , Toshiaki Sano , Norifumi Kameshiro
发明人： Tomoyuki Ishii , Toshiyuki Mine , Toshiaki Sano , Norifumi Kameshiro
IPC分类号： G11C11/405 , H01L21/8234 , H01L21/8239 , H01L27/105 , H01L27/11 , H01L29/10
CPC分类号： H01L27/105 , G11C11/405 , G11C2207/104 , H01L21/823456 , H01L21/823462 , H01L27/1052 , H01L27/11 , H01L27/1116
摘要： The present invention is a semiconductor memory device having a logic block and a memory block on the same chip. In the memory device, unit memory cells each include at least two transistors, one of which is a write transistor for storing an electric charge into and releasing it from an electric charge storage node, and the other is a read transistor whose conductance in a channel region provided between a source and drain of the read transistor is modulated dependently on the amount of electric charge stored into or released from the electric charge storage node by the write transistor. The read transistor has a gate-insulating film thicker than that of a transistor provided in the logic block, and uses the same diffusion layer structure as that of the logic block.
摘要翻译：本发明是具有在同一芯片上的逻辑块和存储器块的半导体存储器件。在存储器件中，单元存储单元每个都包括至少两个晶体管，其中之一是用于存储电荷并将其从电荷存储节点释放的写入晶体管，另一个是在沟道中的电导读取晶体管的源极和漏极之间的区域被调制，取决于由写入晶体管存储或从电荷存储节点释放的电荷的量。读取晶体管具有比设置在逻辑块中的晶体管更厚的栅极绝缘膜，并且使用与逻辑块相同的扩散层结构。

118. 发明申请

US20050199940A1 Nonvolatile semiconductor memory device and manufacturing method thereof 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20050199940A1
公开(公告)日：2005-09-15
申请号：US11013406
申请日：2004-12-17
申请人： Toshiyuki Mine , Natsuki Yokoyama , Kan Yasui
发明人： Toshiyuki Mine , Natsuki Yokoyama , Kan Yasui
IPC分类号： H01L21/8247 , H01L27/115 , H01L29/04 , H01L29/788 , H01L29/792
CPC分类号： H01L21/28282 , H01L27/11568 , H01L29/792
摘要： A MONOS nonvolatile memory of a split gate structure, wherein writing and erasing are performed by hot electrons and hot holes respectively, is prone to cause electrons not to be erased and to remain in an Si nitride film on a select gate electrode sidewall and that results in the deterioration of rewriting durability. When long time erasing is applied as a measure to solve the problem, drawbacks appear, such as the increase of a circuit area caused by the increase of the erasing current and the deterioration of retention characteristics. In the present invention, an Si nitride film is formed by the reactive plasma sputter deposition method that enables oriented deposition and the Si nitride film on a select gate electrode sidewall is removed at the time when a top Si oxide film is formed.
摘要翻译：分离栅结构的MONOS非易失性存储器分别由热电子和热孔执行写入和擦除，容易导致电子不被擦除并且保留在选择栅电极侧壁上的氮化硅膜中，并且结果在改写耐久性的恶化。当长时间擦除作为解决该问题的措施时，会出现缺点，例如由擦除电流的增加引起的电路面积的增加和保留特性的劣化。在本发明中，通过能够进行取向沉积的反应等离子体溅射沉积方法形成氮化硅膜，并且在形成顶部Si氧化物膜时，在选择栅电极侧壁上除去Si氮化物膜。

119. 发明申请

US20050032276A1 Semiconductor element and process for manufacturing the same 审中-公开
标题翻译：半导体元件及其制造方法
公开(公告)号：US20050032276A1
公开(公告)日：2005-02-10
申请号：US10936481
申请日：2004-09-09
申请人： Tomoyuki Ishii , Kazuo Yano , Koichi Seki , Toshiyuki Mine , Takashi Kobayashi
发明人： Tomoyuki Ishii , Kazuo Yano , Koichi Seki , Toshiyuki Mine , Takashi Kobayashi
IPC分类号： H01L27/115 , H01L27/12 , H01L29/68 , H01L29/788 , H01L21/00 , H01L21/82 , H01L21/8236
CPC分类号： H01L29/7887 , H01L27/115 , H01L27/1203 , H01L29/685 , H01L29/7883 , Y10S438/962
摘要： A semiconductor quantum memory element is disclosed which can share the terminals easily among a plurality of memory elements and can pass a high current and which is strong against noises. In order to accomplish this a control electrode is formed so as to cover the entirety of thin film regions connecting low-resistance regions. As a result, the element can have a small size and can store information with high density. Thus, a highly integrated, low power consumption non-volatile memory device can be realized with reduced size. A method of forming a memory element is also disclosed including performing the following steps of forming a first insulating layer, a second insulating layer, a first conductive layer and a layer of amorphous silicon. The amorphous silicon layer is crystallized to a polycrystalline silicon film. Semiconductor drains are deposited to form charge trapping and storage regions. A fourth insulating layer is deposited over the drains and a second conductive layer is deposited over a layer of silicon dioxide to form a control electrode of the memory element.
摘要翻译：公开了一种半导体量子存储器元件，其可以容易地在多个存储元件之间共享端子，并且可以通过高电流并且抵抗噪声。为了实现这一点，形成控制电极以覆盖连接低电阻区域的整个薄膜区域。因此，该元件可以具有小尺寸并且可以高密度地存储信息。因此，可以以减小的尺寸实现高度集成的低功耗非易失性存储器件。还公开了一种形成存储元件的方法，包括执行以下步骤：形成第一绝缘层，第二绝缘层，第一导电层和非晶硅层。非晶硅层结晶成多晶硅膜。沉积半导体漏极以形成电荷捕获和存储区域。在漏极上沉积第四绝缘层，并且在二氧化硅层上沉积第二导电层以形成存储元件的控制电极。

120. 发明授权

US06417052B1 Fabrication process for semiconductor device 失效
标题翻译：半导体器件制造工艺
公开(公告)号：US06417052B1
公开(公告)日：2002-07-09
申请号：US09712243
申请日：2000-11-15
申请人： Shimpei Tsujikawa , Masahiro Ushiyama , Toshiyuki Mine
发明人： Shimpei Tsujikawa , Masahiro Ushiyama , Toshiyuki Mine
IPC分类号： H01L21336
CPC分类号： H01L21/28202 , H01L21/28194 , H01L21/28211 , H01L29/513 , H01L29/518 , H01L29/94
摘要： Provided is an improved fabrication process for a semiconductor device by means of which in fabrication of insulated gate semiconductor devices having gate insulating films including silicon oxide films of different thickness, no contamination from a photoresist is ensured in a silicon oxide film, generation of defects in the silicon oxide film to be otherwise caused by aqueous solution treatments is suppressed, and thereby variability of characteristics among the semiconductor devices is suppressed. A silicon oxide film of a gate insulating film is formed on a semiconductor surface, a silicon nitride film is formed thereon by means of a chemical vapor deposition method using monosilane and ammonia as a source gas prior to formation of a resist film, the resist film is selectively formed on the surface, part of the silicon nitride film not covered by the resist film and the silicon oxide film therebeneath are removed to expose a semiconductor surface, the exposed semiconductor surface is oxidized to form a second silicon oxide film having a thickness different from that of the previously described silicon oxide film, and gate electrodes are formed on the respective insulating films.
摘要翻译：提供一种用于半导体器件的改进的制造工艺，其中在制造具有包括不同厚度的氧化硅膜的栅极绝缘膜的绝缘栅极半导体器件的制造中，在氧化硅膜中不会确保来自光致抗蚀剂的污染，产生缺陷抑制由水溶液处理而引起的氧化硅膜，从而抑制半导体器件之间的特性变化。在半导体表面上形成栅绝缘膜的氧化硅膜，通过在形成抗蚀剂膜之前使用甲硅烷和氨作为源气体的化学气相沉积法形成氮化硅膜，抗蚀剂膜被选择性地形成在表面上，除去未被抗蚀剂膜和其下的氧化硅膜覆盖的一部分氮化硅膜以露出半导体表面，暴露的半导体表面被氧化以形成具有不同厚度的第二氧化硅膜与上述氧化硅膜的栅极电极形成在各绝缘膜上。

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