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111. 发明申请

US20050099372A1 Active-matrix organic electroluminescent display device 有权
标题翻译：有源矩阵有机电致发光显示装置
公开(公告)号：US20050099372A1
公开(公告)日：2005-05-12
申请号：US10982907
申请日：2004-11-08
申请人： Kazuo Nakamura , Katsuhide Uchino , Nobutoshi Asai
发明人： Kazuo Nakamura , Katsuhide Uchino , Nobutoshi Asai
IPC分类号： H01L51/50 , G06F3/033 , G06F3/041 , G06F3/042 , G09F9/30 , G09G3/20 , G09G3/30 , G09G3/32 , H01L27/32 , H05B33/14
CPC分类号： G06F3/042 , G06F3/0412 , G09G3/3233 , G09G2300/0408 , G09G2300/0809 , G09G2300/0842 , G09G2300/0861 , H04M2250/22
摘要： An organic electroluminescent display device includes scanning lines, signal lines, and pixels formed in a matrix, each pixel being at an intersection of each of the scanning lines and each of the signal lines. Each pixel includes a light-emitting element, a light-emitting circuit composed of a thin-film transistor, and a light-receiving circuit composed of a thin-film transistor. When the light-emitting circuit is selected by the scanning line, the light-emitting circuit drives the light-emitting element according to a video signal that is input from the signal line, thereby displaying an image on the pixels formed in the matrix. The light-receiving circuit is selected in a period of time during which the light-emitting circuit does not operate, and outputs a light-receiving signal in accordance with the amount of light incident on the pixel to a different signal line.
摘要翻译：有机电致发光显示装置包括扫描线，信号线和以矩阵形成的像素，每个像素位于每条扫描线和每条信号线的交点处。每个像素包括发光元件，由薄膜晶体管组成的发光电路和由薄膜晶体管组成的光接收电路。当通过扫描线选择发光电路时，发光电路根据从信号线输入的视频信号来驱动发光元件，从而在矩阵中形成的像素上显示图像。光接收电路在发光电路不工作的时间段内被选择，并且将入射到像素上的光量的光接收信号输出到不同的信号线。

112. 发明授权

US06453409B1 Digital signal processing system 失效
标题翻译：数字信号处理系统
公开(公告)号：US06453409B1
公开(公告)日：2002-09-17
申请号：US08965564
申请日：1997-11-06
申请人： Kazuo Nakamura
发明人： Kazuo Nakamura
IPC分类号： G06F1500
CPC分类号： G06F9/3824 , G06F9/3877
摘要： A digital signal processing system has a control processor, a signal processor, and a plurality of memories. A signal processor carries out signal processing under control of the control processor. A connecting device connects each of the memories selectively to one of the control processor and the signal processor in response to an instruction from the control processor.
摘要翻译：数字信号处理系统具有控制处理器，信号处理器和多个存储器。信号处理器在控制处理器的控制下执行信号处理。响应于来自控制处理器的指令，连接装置将每个存储器选择性地连接到控制处理器和信号处理器之一。

113. 发明授权

US06259872B1 Support structure for an image processing device 有权
标题翻译：支持图像处理设备的结构
公开(公告)号：US06259872B1
公开(公告)日：2001-07-10
申请号：US09288575
申请日：1999-04-09
申请人： Takahiro Fukunaga , Hiroshi Kida , Kazuo Nakamura , Toyoaki Nanba , Syoichiro Yoshiura
发明人： Takahiro Fukunaga , Hiroshi Kida , Kazuo Nakamura , Toyoaki Nanba , Syoichiro Yoshiura
IPC分类号： G03G1500
CPC分类号： H04N1/00541 , G03G15/00 , H04N1/00538
摘要： Support structures for containing and supporting components forming a digital copier are configured with square pipes and are provided separately in association with a plurality of units of the digital copier. The effect of distortion is eliminated when the support structures are joined to maintain positional accuracy. Square pipes are combined to form each of a first support structure for containing and supporting various components forming the digital copier, for example, an image forming process portion and a fixing portion and a second support structure for containing and supporting various components to be incorporated therein as needed, for example, a sheet supplying portion. To combine the first and second support structures, square pipes and square pipes orthogonal to each other are joined in the regions of joining surfaces. This makes it possible to prevent, for example, distortion and twisting between the supporting structures.
摘要翻译：用于容纳和支撑形成数字复印机的部件的支撑结构被配置为方管，并且与数字复印机的多个单元相关联地提供。当连接支撑结构以保持位置精度时，消除了变形的影响。方形管组合形成用于容纳和支撑形成数字复印机的各种部件的第一支撑结构中的每一个，例如图像形成处理部分和固定部分，以及用于容纳和支撑待并入其中的各种部件的第二支撑结构根据需要，例如，片材供给部。为了组合第一和第二支撑结构，在连接表面的区域中连接彼此正交的方管和方管。这使得可以防止例如支撑结构之间的扭曲和扭曲。

114. 发明授权

US6066867A Current control functional device 失效
标题翻译：电流控制功能装置
公开(公告)号：US6066867A
公开(公告)日：2000-05-23
申请号：US272739
申请日：1999-03-08
申请人： Kazuo Nakamura
发明人： Kazuo Nakamura
IPC分类号： G11C11/16 , H01F10/32 , H01L21/8246 , H01L27/10 , H01L27/105 , H01L29/66 , H01L43/00 , H01L43/08 , G11B5/39
CPC分类号： B82Y25/00 , G11C11/16 , H01F10/3213 , H01F10/3254 , H01F10/3268
摘要： In a functional device having a substrate, source and drain regions are formed on the substrate. Each of them includes first electric charge carriers. Each of the first electric charge carriers has the substantially same first spin direction which is fixed to a predetermined direction. An intermediate region is formed between the source and drain regions and includes second electric charge carriers. Each of the second electric charge carries has a second spin direction which is variable. A current line is formed over the intermediate region and applies an external magnetic field to the intermediate region. The second direction is determined in dependency upon the application of the external magnetic filed.
摘要翻译：在具有衬底的功能器件中，在衬底上形成源区和漏区。它们中的每一个包括第一电荷载体。每个第一电荷载体具有固定到预定方向的基本相同的第一自旋方向。在源区和漏区之间形成中间区，并包括第二电荷载流子。第二电荷载体中的每一个具有可变的第二自旋方向。在中间区域上形成电流线，并向中间区域施加外部磁场。第二个方向取决于外部磁场的应用。

115. 发明授权

US5768487A System and method using a split printer driver to control a computer printer device 失效
标题翻译：使用分割式打印机驱动程序来控制计算机打印机设备的系统和方法
公开(公告)号：US5768487A
公开(公告)日：1998-06-16
申请号：US550749
申请日：1995-10-31
申请人： Gregory A. LeClair , Kazuo Nakamura
发明人： Gregory A. LeClair , Kazuo Nakamura
IPC分类号： B41J29/38 , B41J5/30 , G06F3/12 , G06K15/00
CPC分类号： G06F3/1296
摘要： A split printer driver comprising a separate page driver for optimizing and storing print data into a journal file, a journal file processor for retrieving the optimized print data from the journal file, and a separate render driver for receiving the optimized print data from the journal file processor, processing the optimized print data using an image processor, rendering the optimized print data into picture elements, and providing the picture elements to a printer to produce high-quality printed images.
摘要翻译：一种分割式打印机驱动程序，包括用于优化并将打印数据存储到日志文件中的单独的页面驱动程序，用于从日志文件中检索优化的打印数据的日志文件处理器，以及用于从日志文件接收优化的打印数据的单独的呈现驱动程序处理器，使用图像处理器处理优化的打印数据，将优化的打印数据呈现为图像元素，以及将图像元素提供给打印机以产生高质量的打印图像。

116. 发明授权

US5555225A Clock generating circuit and microcomputer incorporating same 失效
标题翻译：时钟发生电路和微机结合
公开(公告)号：US5555225A
公开(公告)日：1996-09-10
申请号：US520188
申请日：1995-08-28
申请人： Naoto Hayashi , Kazuo Nakamura
发明人： Naoto Hayashi , Kazuo Nakamura
IPC分类号： G06F1/04 , G06F11/00 , G06F11/16 , G04B47/00 , G04F5/00
CPC分类号： G06F11/0763 , G06F11/1608
摘要： A microcomputer and a clock generator included therein which comprises a first memory and a second memory for storing a signal from CPU, the second memory make it ready for writing when the content of the memory in the first memory is in accord with a predetermined signal, and provides a clock oscillation stop signal for suspending clock oscillation to a clock oscillator when the content of memory in the second memory is in accord with a predetermined signal.
摘要翻译：其中包括微型计算机和时钟发生器，其包括第一存储器和用于存储来自CPU的信号的第二存储器，当第一存储器中的存储器的内容符合预定信号时，第二存储器准备写入，并且当第二存储器中的存储器的内容符合预定信号时，提供时钟振荡停止信号，用于将时钟振荡暂停到时钟振荡器。

117. 发明授权

US5404060A Miniature motor with worm reduction gear 失效
标题翻译：带蜗轮减速装置的微型电机
公开(公告)号：US5404060A
公开(公告)日：1995-04-04
申请号：US124274
申请日：1993-09-20
申请人： Hiroaki Nakahashi , Kazuo Nakamura
发明人： Hiroaki Nakahashi , Kazuo Nakamura
IPC分类号： H02K7/116 , F16H1/16 , F16H55/06 , F16H55/22 , H02K7/06
CPC分类号： F16H55/06 , F16H55/22 , Y10T29/4948 , Y10T74/19828
摘要： A miniature motor with worm reduction gear outputting the revolution of a miniature motor via a worm reduction gear consisting of a worm and a worm wheel, in which the tooth surface of the worm is roughened into a stain finish, and then subjected to a surface treatment to improve wear resistance.
摘要翻译：一种具有蜗轮减速装置的微型电动机，其通过蜗杆和蜗轮蜗杆减速齿轮输出微型电动机的转动，其中蜗杆的齿面粗糙化成污斑，然后进行表面处理以提高耐磨性。

118. 外观设计

USD323158S Facsimile transceiver 失效
公开(公告)号：USD323158S
公开(公告)日：1992-01-14
申请号：US466823
申请日：1990-01-16
申请人： Masayuki Mizuno , Kazuo Nakamura , Yoshinari Itoi
设计人： Masayuki Mizuno , Kazuo Nakamura , Yoshinari Itoi

119. 发明授权

US5032563A Production of alpha-olefin polymers 失效
标题翻译：生产α-烯烃聚合物
公开(公告)号：US5032563A
公开(公告)日：1991-07-16
申请号：US437661
申请日：1989-11-17
申请人： Mitsuyuki Matsuura , Toshihiko Sugano , Kazuo Nakamura
发明人： Mitsuyuki Matsuura , Toshihiko Sugano , Kazuo Nakamura
IPC分类号： C08F4/658 , C08F4/60 , C08F4/646 , C08F4/69 , C08F10/00
CPC分类号： C08F10/00 , C08F2410/04
摘要： Ziegler polymerization of .alpha.-olefins is disclosed which is characterized by a solid catalyst component used in the Ziegler-type catalyst. The solid catalyst component, Component (A), comprises Component (i) which is a solid catalyst component for a Ziegler-type catalyst comprising Ti, Mg and a halogen; Component (ii) a silicon compound of a formula:R.sup.1 R.sup.2.sub.3-n Si(OR.sup.3).sub.nwherein R.sup.1 -R.sup.3 are each hydrocarbyl group characterized by R.sup.1 which has a branched hydrocarbyl group;Component (iii) a halogen compound of W or Mo; and Component (iv) an organometal compound of a metal of Groups I to IV of the Periodic Table.

120. 发明授权

US5027323A Write pulse signal generating circuit for a semiconductor memory device 失效
标题翻译：用于半导体存储器件的写脉冲信号发生电路
公开(公告)号：US5027323A
公开(公告)日：1991-06-25
申请号：US294675
申请日：1989-01-09
申请人： Kazuhisa Miyamoto , Shuuichi Miyaoka , Kazuo Nakamura , Kenji Imai
发明人： Kazuhisa Miyamoto , Shuuichi Miyaoka , Kazuo Nakamura , Kenji Imai
IPC分类号： G11C7/22
CPC分类号： G11C7/22
摘要： A semiconductor integrated circuit device includes a pulse width expander circuit for expanding the pulse width of a pulse signal of the ECL (emitter coupled logic) level that has a very narrow pulse width, a level conversion circuit for converting the output signal of the ECL level of the pulse width expander circuit into a CMOS (complementary metal oxide semiconductor) level, and an internal circuit that is so connected as to receive the output signal of the level conversion circuit. In other words, the pulse signal having a narrow pulse width is expanded to have a pulse width which is sufficient for the level conversion circuit prior to performing the level conversion operation. Therefore, the level of the pulse signals having narrow pulse widths is stably converted.
摘要翻译：半导体集成电路器件包括用于扩展具有非常窄的脉冲宽度的ECL（发射极耦合逻辑）电平的脉冲信号的脉冲宽度的脉宽扩展器电路，用于转换ECL电平的输出信号的电平转换电路的脉冲宽度扩展器电路转换成CMOS（互补金属氧化物半导体）电平，以及连接到接收电平转换电路的输出信号的内部电路。换句话说，具有窄脉冲宽度的脉冲信号被扩展为在执行电平转换操作之前具有足够的电平转换电路的脉冲宽度。因此，稳定地转换具有窄脉冲宽度的脉冲信号的电平。

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