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    • 112. 发明专利
    • CRT DEVICE
    • JPH02244994A
    • 1990-09-28
    • JP6384789
    • 1989-03-17
    • HITACHI LTDHITACHI PROCESS COMPUTER ENG
    • KARIZUME IKUOSASE TAKASHISATO HIDEOKAMATA YASUHARUYAMASHITA KENKICHI
    • H04N9/16H05K1/02
    • PURPOSE:To reduce cross talk by connecting a video amplifier to a CRT through a substrate arranged so that a transmission line plane and a ground plane are adjacently arranged. CONSTITUTION:The video amplifier 1 is constituted of a printed board, an R transmission line plane 20, a G transmission line plane 21 and a B transmission line plane 22 are formed on the surface of the substrate 2, the 1st ground plane 23 is formed on the outside of the plane 20, the 2nd ground plane 24 is arranged between the planes 20 and 21, the 3rd ground plane is arranged between planes 21, 22, and the 4th ground plane 19 is formed on the outside of the plane 22. Projecting parts 26 to 34 and 35 to 43 are formed on both the end parts of respective planes, the projecting parts 26 to 34 are fixing parts to a socket board 3 and form so called male pars and the projecting parts 35 to 43 are fixing parts to a substrate 1 and form so-called male parts. The connection between the video amplifier 1 and the CRT is executed on the substrate 2. Consequently, the mutual cross talk of respective transmission line planes can be removed.
    • 114. 发明专利
    • INTEGRATED PHASE SYNCHRONIZER
    • JPH01211957A
    • 1989-08-25
    • JP27094487
    • 1987-10-27
    • HITACHI LTD
    • KATO KAZUOSASE TAKASHISATO HIDEOIKUSHIMA ICHIRO
    • H01L23/538H01L21/822H01L23/52H01L27/04
    • PURPOSE:To reduce a jitter by minimizing the length of connecting paths between high-speed input/output signal terminals and pins, connecting the pins to adjacent paired pins and balancing the pins and adjacently arranging connecting pins for terminals having high sensibility to external noises to pins connected to fixed potential terminals. CONSTITUTION:Pins connected to terminals for input circuits 21-24 and output circuits 81, 82 are disposed on both sides of a package 38, and the length of connecting paths among high speed input/output signal terminals for the input/ output circuits and the pins is minimized, and connected to adjacent paired pins and balanced, thus minimizing the delay of signals based on inductance proportional to the length of the connecting paths among the pins and the terminals. Connecting pins for terminals having high sensibility to external noises such as connecting pins with bias setting terminals for a voltage-control oscillation circuit, connecting pins for filter terminals, etc., are adjoined to pins connected to ground terminals and other fixed potential terminals or interposed among them, thus forming pin arrangement nonsensitive to external noises. Accordingly, fluctuation with time of signal phase called a jitter, can be reduced.
    • 115. 发明专利
    • CURRENT MIRROR CIRCUIT
    • JPS64807A
    • 1989-01-05
    • JP15448887
    • 1987-06-23
    • HITACHI LTD
    • KATO KAZUOSATO HIDEO
    • H03F3/343H03F3/34H03F3/347
    • PURPOSE:To operate an input signal with a high precision by detecting the difference between the voltage of an input terminal and a preliminarily set reference voltage and performing the control in accordance with the difference output so that the voltage of the input terminal is constant. CONSTITUTION:A negative feedback circuit 200 adjusts the current of a transistor TR 220 so that the voltage of a current mirror operation circuit input terminal 115 is equal to that of a reference input 211 of an amplifier 210. As the result, not only the voltage of the terminal 115 but also voltages of input terminals 111-114 where forward voltages are approximately equal are controlled to the same reference value. Consequently, if a voltage V5 which is an approximate average value of operation input voltage V1-V4 of operation inputs 111-114 is impressed to the terminal 115, an arithmetic circuit 100 and an output current I0 are not dependent upon the variation of temperature or the like, and the output current I0 is given by I0=f(V1, V2, V3, V4) determined with inputs V1-V4.
    • 116. 发明专利
    • AC COUPLING CIRCUIT
    • JPS63136804A
    • 1988-06-09
    • JP28404986
    • 1986-11-28
    • HITACHI LTD
    • KATO KAZUOSATO HIDEOSASE TAKASHI
    • H03K19/0175H03F3/00H03K19/00
    • PURPOSE:To minimize an integrated circuit by making a time constant to a signal large and making the time constant to a bias voltage small even if coupling capacity is small by providing the coupling capacity for conducting an AC signal to the input side of an electric circuit whose main entity is a semiconductor amplification element and a semiconductor resistance element which forms the charge and discharge circuit of the coupling capacity and whose voltage-current characteristic is non-linear. CONSTITUTION:Diodes 31 and 32 are connected in serial to the input terminal 12 and the output terminal 13 of an invertor amplifier 10 in a direction opposite to each other and the input terminal 12 is connected to a terminal 11 through a capacitor 40 as the coupling capacity. The terminal 11 is connected to a voltage source 201 and a bias voltage source 202 as a signal source 200. The diodes 31 and 32 form the feedback circuit of the invertor amplifier 10 and also form the charge and discharge circuit of the capacitor 40 and they are constituted with the semiconductor resistance elements whose voltage-current characteristic is non-linear. Thus the diodes 31 and 32 work as the resistance elements with high resistance.
    • 117. 发明专利
    • TIME DIFFERENCE DETECTION CIRCUIT
    • JPS62256520A
    • 1987-11-09
    • JP9795886
    • 1986-04-30
    • HITACHI LTD
    • SATO HIDEOKATO KAZUOSASE TAKASHI
    • H03K5/26H03L7/08H03L7/089H03L7/093
    • PURPOSE:To obtain a time difference detection circuit having a fast response and small ripple by providing an integration circuit integrating differentially two pulse signals and a sample and holding circuit holding the output of the integration circuit. CONSTITUTION:In closing a switch S1 by an input pulse T1, an output voltage VA1 of an operational amplifier A1 is increased because of the integration of a current I1, and the voltage VA1 is decreased because of the integration of the current I2 when the switch S2 is closed by an input pulse T2. As a result, the output voltage VA1 is increased by a DELTAV, the result of integration is sampled by using a smaple pulse T3 at a sample and holding circuit comprising a switch S3, a capacitor C2 and an operational amplifier A2. In repeating the integration, the DELTAV is made zero. Then the operational amplifier A3 and resistors R12, R20 and R30 form an adder circuit, then an output V0 has a voltage proportional to the difference of pulse width of input pulses T1 and T2 and since the result of integration by the operational amplifier A1 is subject to sample and hold, no ripple is caused at the output voltage VA2 of the operational amplifier A2.
    • 118. 发明专利
    • CURRENT MIRROR CIRCUIT
    • JPS62165413A
    • 1987-07-22
    • JP645086
    • 1986-01-17
    • HITACHI LTD
    • KATO KAZUOSATO HIDEOSASE TAKASHI
    • H03F3/343H03F3/34
    • PURPOSE:To attain low voltage operation and to attain the highly accurate operation of a circuit by detecting the operating voltages of a pair of transistors (TR) constituting a current mirror by a differential amplifier and executing the negative feedback control of the base bias voltage of the succeeding current mirror. CONSTITUTION:The base of a TR 202 in a current mirror circuit 20 is forward biased by a TR 201 diode-connected to the 202 based on current flowing from a constant current source 40 in a signal circuit and current is supplied to a TR 102 in a current mirror circuit 10. At that time, the differential amplifier 305 executes the negative feedback control of the common base voltage of the current mirror 10 through a resistor 306 and a diode 101 so that the voltage of an input point 212 becomes equal to that of a node 211. Thereby, the voltages of the nodes 211, 212 are equally set up by the differential amplifier 305 in the steady state and the base current of the current mirror 10 is properly supplied.
    • 120. 发明专利
    • AMPLIFYING CIRCUIT
    • JPS61274410A
    • 1986-12-04
    • JP11415585
    • 1985-05-29
    • HITACHI LTD
    • YAMASHITA KENKICHIKAMATA YASUHARUKATO KAZUOSATO HIDEOUEDA SEIICHISHIMOKAWA RYUSHI
    • G09G1/00G09G1/28H03F3/68H03G3/10H04N5/14
    • PURPOSE:To obtain an amplifying circuit which has a wide frequency band, and also is suitable for converting it to a semiconductor integrated circuit, by unifying and integrating extending from a pre-amplifier to a current mirror output. CONSTITUTION:The titled circuit is provided with a pre-amplifying means 21 of wide frequency band for amplifying an input signal, and plural voltage-current converting means 25 for converting a voltage level variation of an output signal from this pre-amplifying means 21 to a current variation, and amplifying its current signal by a current mirror circuit having a current amplifying operation being proportional to an effective area ratio of a transistor. Also, said pre- amplifying means 21 and plural voltage-current converting means 25 are formed on the same semiconductor substrate. The voltage-current converting circuit 25 is constituted of plural current mirror circuits, for instance, eight pieces of current mirror circuits which is connected in parallel, and even if an output current of one piece of current mirror circuit is a small current, a current flowing through a line lA corresponding to a current synthesizing means becomes a large current in proportion to the number of current mirror circuits.