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111. 发明申请

US20110028521A1 PESTICIDAL COMPOSITION, AND METHOD FOR CONTROLLING PESTS 有权
标题翻译：农药组合物及其控制方法
公开(公告)号：US20110028521A1
公开(公告)日：2011-02-03
申请号：US12935289
申请日：2009-04-10
申请人： Masayuki Morita , Takao Awazu , Akira Nakagawa , Mitsugu Iwasa
发明人： Masayuki Morita , Takao Awazu , Akira Nakagawa , Mitsugu Iwasa
IPC分类号： A01N43/40 , A01P7/00
CPC分类号： A01N43/40 , A01N43/80 , A01N25/30 , A01N2300/00
摘要： To provide a pesticidal composition having a stable and high pesticidal effect. The pesticidal composition comprises a pyridine compound represented by the formula (I): (wherein R1 is CH2CN or and each of R2 and R3 which are independent of each other, is a hydrogen atom, a halogen atom, C1-6 alkyl or C1-6 alkoxy) or its salt and at least one potency-enhancing component selected from the group consisting of a nonionic surface active agent, an anionic surface active agent, a cationic surface active agent, an amphoteric surface active agent, an animal or plant oil, a mineral oil, a water-soluble polymer, a resin and a wax.
摘要翻译：提供具有稳定和高杀虫作用的杀虫剂组合物。杀虫剂组合物包含由式（I）表示的吡啶化合物：其中R1是CH2CN，R2和R3彼此独立的是氢原子，卤素原子，C1-6烷基或C1- 6烷氧基）或其盐和至少一种选自非离子表面活性剂，阴离子表面活性剂，阳离子表面活性剂，两性表面活性剂，动物或植物油的增效组分，矿物油，水溶性聚合物，树脂和蜡。

112. 发明授权

US07826532B2 Motion picture encoding device and motion picture decoding device 有权
标题翻译：动态影像编码装置及动态影像解码装置
公开(公告)号：US07826532B2
公开(公告)日：2010-11-02
申请号：US11070479
申请日：2005-03-03
申请人： Akira Nakagawa , Hidenobu Miyoshi
发明人： Akira Nakagawa , Hidenobu Miyoshi
IPC分类号： H04N7/12 , H04N11/02 , H04N11/04 , H04B1/66
CPC分类号： H04N19/186 , H04N19/105 , H04N19/139 , H04N19/159 , H04N19/16 , H04N19/176 , H04N19/51 , H04N19/513 , H04N19/52 , H04N19/521 , H04N19/61
摘要： When a prediction is made between fields with different parity, the predicative efficiency of a chrominance vector is improved by adaptively switching the generation of a chrominance motion vector depending on a encoding/decoding field parity (top/bottom) and a reference field parity (top/bottom), and the coding efficiency is improved accordingly.
摘要翻译：当在具有不同奇偶性的场之间进行预测时，通过根据编码/解码场奇偶校验（顶/底）和参考场奇偶校验（顶/底）来自适应地切换色度运动矢量的产生，提高了色度矢量的预测效率，底部），编码效率相应提高。

113. 发明申请

US20100061445A1 Moving picture editing apparatus 失效
标题翻译：运动图像编辑装置
公开(公告)号：US20100061445A1
公开(公告)日：2010-03-11
申请号：US12461204
申请日：2009-08-04
申请人： Satoshi Shimada , Akira Nakagawa , Akihiro Yamori
发明人： Satoshi Shimada , Akira Nakagawa , Akihiro Yamori
IPC分类号： H04N7/26
CPC分类号： G11B27/034 , H04N19/40 , H04N19/61 , H04N19/70 , H04N19/85
摘要： A moving picture editing apparatus includes a picture extracting unit that extracts pictures of a predetermined range including a picture subsequent to a coupling point from encoded data to be coupled; an adjustment-information generating unit that generates adjustment information for adjusting values of information to be continuous from/to inside to/from outside the predetermined range upon decoding, from among information included in headers of the pictures of the predetermined range extracted by the picture extracting unit; and a re-encoding unit that adds the adjustment information generated by the adjustment-information generating unit to the headers of the pictures of the predetermined range extracted by the picture extracting unit, and re-encodes the pictures of the predetermined range.
摘要翻译：运动图像编辑装置包括：图像提取单元，从耦合的编码数据中提取包括耦合点之后的图像的预定范围的图像; 调整信息生成单元，从解码后的预定范围的图像的标题中包含的信息中生成用于调整从内到外的信息的值的调整信息，单元; 以及重新编码单元，其将由调整信息生成单元生成的调整信息添加到由图像提取单元提取的预定范围的图像的标题，并对预定范围的图像进行重新编码。

114. 发明申请

US20090267063A1 SEMICONDUCTOR LIGHT-EMITTING DEVICE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：半导体发光器件及其制造方法
公开(公告)号：US20090267063A1
公开(公告)日：2009-10-29
申请号：US12065795
申请日：2006-09-05
申请人： Akira Nakagawa , Yasube Kashiwaba , Ikuo Niikura
发明人： Akira Nakagawa , Yasube Kashiwaba , Ikuo Niikura
IPC分类号： H01L33/00
CPC分类号： H01L33/285 , C23C14/042 , C23C14/086 , C23C14/32 , C30B23/00 , C30B23/02 , C30B29/16 , H01L21/02403 , H01L21/02433 , H01L21/02554 , H01L21/02576 , H01L21/02609
摘要： Disclosed is a semiconductor light-emitting device wherein a pn junction is formed by forming, as a p-type layer (11), a semiconductor thin film which is composed of a ZnO compound doped with nitrogen on an n-type ZnO bulk single crystal substrate (10) whose resistance is lowered by being doped with donor impurities. It is preferable to form the p-type layer (11) on a zinc atom containing surface of the n-type ZnO bulk single crystal substrate (10).
摘要翻译：公开了一种半导体发光器件，其中通过在n型ZnO体单晶上形成由掺杂氮的ZnO化合物构成的p型层（11）形成pn结，衬底（10），其电阻通过掺杂施主杂质而降低。优选在n型ZnO体单晶衬底（10）的含锌原子表面上形成p型层（11）。

115. 发明申请

US20090225225A1 VIDEO SIGNAL PROCESSING DEVICE AND VIDEO SIGNAL PROCESSING METHOD 有权
标题翻译：视频信号处理设备和视频信号处理方法
公开(公告)号：US20090225225A1
公开(公告)日：2009-09-10
申请号：US12399286
申请日：2009-03-06
申请人： Akira Nakagawa , Shunsuke Kobayashi
发明人： Akira Nakagawa , Shunsuke Kobayashi
IPC分类号： H04N5/14
CPC分类号： H04N9/642 , H04N19/103 , H04N19/122 , H04N19/16 , H04N19/167 , H04N19/174 , H04N19/63 , H04N19/635
摘要： An decomposition filter includes a top-field low-frequency decomposition filter and a bottom-field low-frequency decomposition filter whose coefficient is obtained by vertically inverting the coefficient of the top-field low-frequency decomposition filter. It also includes a top-field high- frequency decomposition filter and a bottom-field high-frequency decomposition filter whose coefficient is obtained by vertically inverting the coefficient of the top-field high-frequency decomposition filter. The above-described filters are switched and used according to which an input signal is for, a top-field or a bottom-field.
摘要翻译：分解滤波器包括顶场低频分解滤波器和通过垂直倒置顶场低频分解滤波器的系数获得的系数的底场低频分解滤波器。它还包括顶场高频分解滤波器和底场高频分解滤波器，其系数通过垂直倒置顶场高频分解滤波器的系数而获得。上述滤波器根据其输入信号，顶场或底场进行切换和使用。

116. 发明申请

US20090093104A1 MANUFACTURING METHOD FOR SEMICONDUCTOR CHIPS 有权
标题翻译：半导体晶片的制造方法
公开(公告)号：US20090093104A1
公开(公告)日：2009-04-09
申请号：US11911918
申请日：2006-04-17
申请人： Kiyoshi Arita , Akira Nakagawa
发明人： Kiyoshi Arita , Akira Nakagawa
IPC分类号： H01L21/302
CPC分类号： H01L21/6835 , H01L21/3065 , H01L21/78 , H01L29/0657 , H01L2221/6834 , H01L2221/68354 , H01L2924/10158 , H01L2924/30105
摘要： By forming dividing-groove portions in accordance with dividing regions on the second surface of a semiconductor wafer where an insulating film is placed in the dividing regions of the first surface and performing etching of the entire second surface and the surfaces of the dividing-groove portions by performing plasma etching from the second surface, corner portions on the second surface side are removed, while the insulating film is exposed from the etching bottom portion by removing the dividing-groove portions in the dividing regions. And by continuously performing the plasma etching in a state in which the exposed insulating film is surface charged with electric charge due to ions in plasma, corner portions on the first surface side put in contact with the insulating film are removed, and semiconductor chips that have a high transverse rupture strength are provided.
摘要翻译：通过在半导体晶片的第二表面上形成分隔槽部分，其中绝缘膜被放置在第一表面的分割区域中，并且对整个第二表面进行蚀刻，并且分割槽部分的表面通过从第二表面进行等离子体蚀刻，除去第二表面侧的角部，同时通过去除分割区域中的分割槽部分从蚀刻底部露出绝缘膜。并且通过在由于等离子体中的离子而暴露的绝缘膜被表面带电荷的状态下连续进行等离子体蚀刻，去除与绝缘膜接触的第一表面侧的角部，以及具有提供了高的横向断裂强度。

117. 发明申请

US20090057838A1 Manufacturing Method for Semiconductor Chips, and Semiconductor Chip 有权
标题翻译：半导体芯片的制造方法和半导体芯片
公开(公告)号：US20090057838A1
公开(公告)日：2009-03-05
申请号：US11918432
申请日：2006-04-11
申请人： Kiyoshi Arita , Akira Nakagawa
发明人： Kiyoshi Arita , Akira Nakagawa
IPC分类号： H01L21/306 , H01L23/58
CPC分类号： H01L21/6835 , H01J2237/334 , H01L21/3065 , H01L21/31116 , H01L21/31138 , H01L21/78 , H01L2221/6834 , H01L2221/68354 , H01L2924/30105
摘要： In a manufacturing method for performing plasma etching on a second surface of a semiconductor wafer that has a first surface where an insulating film is placed in dividing regions and the second surface which is opposite from the first surface and on which a mask for defining the dividing regions is placed thereby exposing the insulating film from etching bottom portions by removing portions that correspond to the dividing regions and subsequently continuously performing the plasma etching in the state in which the exposed surfaces of the insulating film are charged with electric charge due to ions in the plasma thereby removing corner portions put in contact with the insulating film in the device-formation-regions, isotropic etching is performed on the semiconductor wafer at any timing.
摘要翻译：在用于在半导体晶片的第二表面上进行等离子体蚀刻的制造方法中，所述半导体晶片具有绝缘膜放置在分割区域中的第一表面和与第一表面相反的第二表面，并且在其上形成用于限定分割的掩模放置区域，通过除去与分割区域相对应的部分，然后在绝缘膜的暴露表面由于电子束中的离子而被充电的状态下连续进行等离子体蚀刻而使绝缘膜暴露于蚀刻底部等离子体，从而去除与器件形成区域中的绝缘膜接触的拐角部分，在任何时刻对半导体晶片进行各向同性蚀刻。

118. 发明申请

US20090048129A1 NANOPARTICLE-CONTAINING LUBRICATING OIL COMPOSITIONS 审中-公开
标题翻译：含纳米油的润滑油组合物
公开(公告)号：US20090048129A1
公开(公告)日：2009-02-19
申请号：US12188048
申请日：2008-08-07
申请人： Yutaka Mabuchi , Akira Nakagawa
发明人： Yutaka Mabuchi , Akira Nakagawa
IPC分类号： C10M125/10 , C10M169/04 , C10M129/16 , C10M137/04 , C10M125/02
CPC分类号： C10M125/02 , C10M125/04 , C10M125/08 , C10M161/00 , C10M169/044 , C10M2201/041 , C10M2201/061 , C10M2201/062 , C10M2205/0285 , C10M2209/084 , C10M2209/104 , C10M2217/024 , C10M2223/04 , C10N2220/082 , C10N2230/06 , C10N2230/54 , C10N2260/09 , C10M2209/108 , C10N2260/06
摘要： To provide a nanoparticle-containing lubricating oil composition which demonstrates a low friction coefficient and realizes a further fuel economy. A nanoparticle-containing lubricating oil composition comprising a base oil, an additive having hydroxyl group, and nanoparticle. A nanoparticle-containing lubricating oil composition comprising a base oil, an ashless friction modifier having hydroxyl group, and nanoparticle. A nanoparticle-containing lubricating oil composition comprising a base oil, an additive having hydroxyl group, and nanoparticle having a particle diameter of 1 to 100 nm. A nanoparticle-containing lubricating oil composition comprising a base oil, an ashless friction modifier having hydroxyl group, and nanoparticle having a particle diameter of 1 to 100 nm.
摘要翻译：提供一种表现出低摩擦系数并实现进一步燃料经济性的含纳米颗粒的润滑油组合物。一种含纳米颗粒的润滑油组合物，其包含基础油，具有羟基的添加剂和纳米颗粒。一种含纳米颗粒的润滑油组合物，其包含基础油，具有羟基的无灰摩擦改性剂和纳米颗粒。一种含有纳米颗粒的润滑油组合物，其包含基础油，具有羟基的添加剂和粒径为1〜100nm的纳米粒子。一种含有纳米颗粒的润滑油组合物，其包含基础油，具有羟基的无灰摩擦改性剂和粒径为1至100nm的纳米颗粒。

119. 发明授权

US07420637B2 Substrate with parallax barrier layer, method for producing substrate with parallax barrier layer, and three-dimensional display 有权
标题翻译：具有视差屏障层的基板，具有视差屏障层的基板的制造方法以及三维显示
公开(公告)号：US07420637B2
公开(公告)日：2008-09-02
申请号：US10522601
申请日：2003-07-16
申请人： Akira Imai , Akira Nakagawa , Toshihiro Matsumoto
发明人： Akira Imai , Akira Nakagawa , Toshihiro Matsumoto
IPC分类号： G02F1/1333
CPC分类号： G02B27/26 , G02B27/2214 , G02F1/1335
摘要： The present invention provides a three-dimensional display device, which can display a 3D image of higher quality than a conventional one by arranging a parallax barrier layer with higher positioning accuracy, and a method for fabricating such a display device. The three-dimensional display device 100 includes a first substrate 11, which is provided closer to the viewer and which is made of a transparent material, a second substrate 21 arranged so as to face the first substrate 11, a liquid crystal layer 30 provided between the first substrate 11 and the second substrate 21, and a parallax barrier layer 12 provided on the surface of the first substrate so as to face the viewer. A polarizer 40 is further provided on the surface of the viewer-side substrate 10 that includes the parallax barrier layer 12 thereon.
摘要翻译：本发明提供一种三维显示装置，其可以通过布置具有较高定位精度的视差屏障层来显示比传统3D图像更高质量的3D图像，以及制造这种显示装置的方法。三维显示装置100包括：靠近观察者设置并由透明材料制成的第一基板11，配置成与第一基板11相对配置的第二基板21，设置在第一基板11之间的液晶层30，第一基板11和第二基板21以及设置在第一基板的表面上以面对观看者的视差屏障层12。在其上包括视差屏障层12的观察者侧基板10的表面上还设有偏振片40。

120. 发明申请

US20060019416A1 Manufacturing method for semiconductor devices, arrangement determination method and apparatus for semiconductor device formation regions, and program for determining arrangement of semiconductor device formation regions 失效
公开(公告)号：US20060019416A1
公开(公告)日：2006-01-26
申请号：US11183739
申请日：2005-07-19
申请人： Kiyoshi Arita , Hiroshi Haji , Kazuhiro Noda , Akira Nakagawa , Teruaki Nishinaka
发明人： Kiyoshi Arita , Hiroshi Haji , Kazuhiro Noda , Akira Nakagawa , Teruaki Nishinaka
IPC分类号： H01L21/66 , G01R31/26
CPC分类号： G03F7/70433 , H01L21/78
摘要： With use of a length-dimension of a second-line-segment of a unit-device-formation-region as an arrangement interval, a plurality of parallel lines are disposed in a device-formation-effective-region on a wafer so as to form a plurality of parallel-line-partition-regions, the unit-device-formation-regions are arranged in each of the parallel-line-partition-regions independently of and separately from other parallel-line-partition-regions so that the acquisition number of the unit-device-formation-regions is maximized, and an arrangement of the respective unit-device-formation-regions in the respective parallel-line-partition-regions is determined as an arrangement of the entire device-formation-effective-region.

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