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    • 103. 发明授权
    • Semiconductor memory device
    • 半导体存储器件
    • US07535753B2
    • 2009-05-19
    • US11778346
    • 2007-07-16
    • Akira KatayamaNobuaki OtsukaKeiichi KushidaOsamu Hirabayashi
    • Akira KatayamaNobuaki OtsukaKeiichi KushidaOsamu Hirabayashi
    • G11C11/00G11C5/06
    • G11C7/02G11C8/08G11C11/412
    • A semiconductor memory device includes a first inverter circuit and a second inverter circuit, a first transfer gate which is connected between a first power node of the first inverter circuit and a first bit line, a second transfer gate which is connected between a second power node of the second inverter circuit and a second bit line, a first word line connected to gate terminals of the first transfer gate and the second transfer gate, a first read transistor connected between the first power node and a second word line, a second read transistor connected between the second power node and the second word line, and an application circuit which is connected to the second word line, and applies a read voltage to the second word line in reading data.
    • 半导体存储器件包括第一反相器电路和第二反相器电路,连接在第一反相器电路的第一电源节点和第一位线之间的第一传输门,连接在第二电源节点之间的第二传输门 的第二位线,连接到第一传输门和第二传输门的栅极端的第一字线,连接在第一功率节点和第二字线之间的第一读取晶体管,第二读取晶体管 连接在第二电源节点和第二字线之间,以及应用电路,连接到第二字线,并在读取数据时向第二字线施加读取电压。