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101. 发明授权

US07834595B2 Multi battery pack system, control method thereof, and battery pack using the same 有权
公开(公告)号：US07834595B2
公开(公告)日：2010-11-16
申请号：US12796043
申请日：2010-06-08
申请人： Eguchi Yasuhito , Tanina Shoji , Dal-Hoon Lee , Sang-Hoon Lee , Jee-Ho Kim
发明人： Eguchi Yasuhito , Tanina Shoji , Dal-Hoon Lee , Sang-Hoon Lee , Jee-Ho Kim
IPC分类号： H02J7/24
CPC分类号： H01M10/441 , H01M10/0445 , H01M10/46 , H01M10/482 , H01M2010/4271 , H01M2010/4278
摘要： A multi battery pack system is composed of a plurality of battery packs. The master battery pack receives a total voltage from each slave battery pack and calculates a target total voltage using its total voltage and total voltages of all slave battery pack whenever a predetermined time period passes, sends the calculated target total voltage to each slave battery pack, compares the target total voltage with its total voltage, and then connects or disconnects its cell group and output terminals according to the comparison result. The slave battery packs include at least one slave battery pack, which sends its total voltage according to a request of the master battery pack, receives a target total voltage from the master battery pack, compares the target total voltage with its total voltage, and then connects or disconnects its cell group and output terminals according to the comparison result.

102. 发明授权

US07821006B2 Liquid crystal display comprising light sensing TFT having opening in gate electrode 有权
标题翻译：液晶显示器包括在栅电极中具有开口的感光TFT
公开(公告)号：US07821006B2
公开(公告)日：2010-10-26
申请号：US11486606
申请日：2006-07-14
申请人： Kwan-Wook Jung , Ung-Sik Kim , Pil-Mo Choi , Seock-Cheon Song , Ho-Suk Maeng , Sang-Hoon Lee , Keun-Woo Park
发明人： Kwan-Wook Jung , Ung-Sik Kim , Pil-Mo Choi , Seock-Cheon Song , Ho-Suk Maeng , Sang-Hoon Lee , Keun-Woo Park
IPC分类号： H01L29/423 , H01L31/0224 , H01L31/10 , H01L27/32
CPC分类号： H01L27/124 , G02F1/13318 , G02F1/133308 , G02F2001/13332 , G02F2201/58 , H01L27/1214 , H01L29/42384 , H01L29/78621
摘要： There are provided a TFT, a TFT substrate using the TFT, a method of fabricating the TFT substrate, and an LCD. The TFT includes a source region, a drain region, and a gate electrode having an opening. The opening of the gate electrode is to enhance the light sensing ability of the TFT when it is used as a light sensor, since light is incident into a region where the opening is formed. The TFT including the gate having the opening can be used in a substrate of a flat display or an LCD using such a substrate. The above TFT can sense light incident from outside the display to adjust the brightness of the screen according to the external illumination.
摘要翻译：提供TFT，使用TFT的TFT基板，制造TFT基板的方法和LCD。 TFT包括源极区，漏极区和具有开口的栅电极。栅电极的开口是为了提高TFT用作光传感器时的光感测能力，因为光入射到形成开口的区域。包括具有开口的栅极的TFT可以用于平面显示器的基板或使用这种基板的LCD。上述TFT可以感测从显示器外部入射的光，以根据外部照明来调节屏幕的亮度。

103. 发明申请

US20100150549A1 Test interface device, test system and optical interface memory device 有权
标题翻译：测试接口设备，测试系统和光接口存储设备
公开(公告)号：US20100150549A1
公开(公告)日：2010-06-17
申请号：US12592817
申请日：2009-12-03
申请人： Sang-Hoon Lee , Eun-Jo Byun , Cheol-Jong Woo , Se-Jang Oh
发明人： Sang-Hoon Lee , Eun-Jo Byun , Cheol-Jong Woo , Se-Jang Oh
IPC分类号： H04B10/08
CPC分类号： G11C29/56 , G11C29/32 , G11C2029/2602 , G11C2029/5602
摘要： A test interface device includes a serializer, an optical transmitter, an optical receiver, and a deserializer. The serializer receives parallel test signals from automatic test equipment, and serializes the parallel test signals into a serial test signal. The optical transmitter converts the serial test signal into an optical test signal. The optical receiver receives the optical test signal from the optical transmitter, and converts the optical test signal into the serial test signal. The deserializer deserializes the serial test signal into the parallel test signals, and transmits the parallel test signals to a device under test. As a result, signal transfer speed may be improved and optical resource usage may be reduced.
摘要翻译：测试接口设备包括串行器，光发送器，光接收器和解串器。串行器从自动测试设备接收并行测试信号，将并行测试信号串行化为串行测试信号。光发射机将串行测试信号转换为光学测试信号。光接收机从光发射机接收光测试信号，并将光测试信号转换为串行测试信号。解串器将串行测试信号反序列化为并行测试信号，并将并行测试信号发送到被测设备。结果，可以提高信号传送速度，并且可以减少光学资源的使用。

104. 发明授权

US07629754B2 Deflection yoke for cathode ray tube 失效
标题翻译：阴极射线管偏转磁轭
公开(公告)号：US07629754B2
公开(公告)日：2009-12-08
申请号：US11348738
申请日：2006-02-06
申请人： Do-Nyun Kim , Ran-Ji Lee , Je-Wook Nam , Chang-Ryon Byon , Hoo-Deuk Kim , Moon-Jin Kim , Sang-Hoon Lee
发明人： Do-Nyun Kim , Ran-Ji Lee , Je-Wook Nam , Chang-Ryon Byon , Hoo-Deuk Kim , Moon-Jin Kim , Sang-Hoon Lee
IPC分类号： G09G1/04
CPC分类号： H01J29/701
摘要： A deflection yoke for a cathode ray tube improves assembly and productivity and enables effective control of magnetic field corrections during device processing. The deflection yoke includes a horizontal deflection coil located next to the outer circumference of a funnel to generate a horizontal magnetic field, and a vertical deflection coil installed at the outer circumference of the funnel to generate a vertical deflection magnetic field. The vertical deflection coil is insulated from the horizontal deflection coil. A ferrite core is located close to the vertical deflection coil to reduce the loss in the magnetic force generated from the horizontal and vertical deflection coils, and to enhance their magnetic efficiency. A correction unit is spaced apart from the horizontal deflection coil by a predetermined distance to correct a geometric distortion of the vertical and the horizontal deflection magnetic fields that is generated due to the vertical and horizontal deflection coils.
摘要翻译：用于阴极射线管的偏转线圈提高组装和生产率，并且能够在器件处理期间有效地控制磁场校正。偏转线圈包括位于漏斗的外圆周旁边以产生水平磁场的水平偏转线圈和安装在漏斗的外圆周处以产生垂直偏转磁场的垂直偏转线圈。垂直偏转线圈与水平偏转线圈绝缘。铁氧体磁心位于靠近垂直偏转线圈的位置，以减少由水平和垂直偏转线圈产生的磁力的损失，并提高其磁效率。校正单元与水平偏转线圈间隔预定距离，以校正由于垂直和水平偏转线圈而产生的垂直和水平偏转磁场的几何失真。

105. 发明授权

US07626413B2 Parallel testing of semiconductor devices using a dividing voltage supply unit 失效
标题翻译：使用分压电源单元对半导体器件进行并联测试
公开(公告)号：US07626413B2
公开(公告)日：2009-12-01
申请号：US12185697
申请日：2008-08-04
申请人： Sang-Hoon Lee , Joon-Su Ji , Jung-Bae Ahn
发明人： Sang-Hoon Lee , Joon-Su Ji , Jung-Bae Ahn
IPC分类号： G01R31/02
CPC分类号： G01R31/31926 , G01R31/31721 , G11C29/56 , G11C29/56008 , G11C2029/2602 , G11C2029/5602
摘要： Provided is a method of performing a parallel test on semiconductor devices, the method including coupling a power signal line to a set of at least two semiconductor devices through a switching device, performing at least one part of a parallel test on the set of semiconductor devices, and disconnecting a semiconductor device from the set in response to determining that the semiconductor device is defective as a result of the at least one part of the parallel test.
摘要翻译：提供了一种对半导体器件进行并行测试的方法，该方法包括通过开关器件将功率信号线耦合到至少两个半导体器件的集合，在该组半导体器件上进行至少一部分并行测试并且响应于由于所述并行测试的所述至少一部分的结果确定所述半导体器件有缺陷而将半导体器件与所述组件断开连接。

106. 发明申请

US20090290548A1 APPARATUS AND METHOD FOR MANAGING WIRELESS RESOURCES 审中-公开
标题翻译：用于管理无线资源的装置和方法
公开(公告)号：US20090290548A1
公开(公告)日：2009-11-26
申请号：US12441403
申请日：2007-04-26
申请人： Sang-Hoon Lee , Hyung-Keuk Lee
发明人： Sang-Hoon Lee , Hyung-Keuk Lee
IPC分类号： H04W72/00 , G06F15/173
CPC分类号： H04W72/085 , H04N19/30 , H04N19/61
摘要： The present invention relates to an apparatus and method for managing wireless resources, which can provide a service to improve transmission efficiency when multimedia data is transmitted in a mobile communication system. The wireless resource management apparatus includes a data analysis unit (110) for separating data into a plurality of bit stream layers, which form a layered structure, by analyzing the data according to a predetermined rule, and for detecting amounts of information of respective bit stream layers. A wireless resource allocation unit (130) allocates the bit stream layers to frequency bands based on the amounts of information of the bit stream layers detected by the data analysis unit. The present invention is advantageous in that it can reduce inter-cell interference from the standpoint of an application layer that directly influences users.
摘要翻译：本发明涉及一种用于管理无线资源的装置和方法，当在移动通信系统中发送多媒体数据时，该装置和方法可以提供一种提高传输效率的服务。无线资源管理装置包括数据分析单元，用于通过根据预定规则分析数据，将数据分离成多个比特流层，形成分层结构，并且用于检测各个比特流的信息量层。无线资源分配单元（130）基于由数据分析单元检测到的比特流层的信息量，将比特流层分配给频带。本发明的优点在于，从直接影响用户的应用层的观点来看，可以减少小区间干扰。

107. 发明申请

US20090102500A1 Interposer and probe card having the same 有权
标题翻译：内插器和探针卡具有相同的功能
公开(公告)号：US20090102500A1
公开(公告)日：2009-04-23
申请号：US12285962
申请日：2008-10-17
申请人： Young-Soo An , Sang-Hoon Lee , Se-Jang Oh
发明人： Young-Soo An , Sang-Hoon Lee , Se-Jang Oh
IPC分类号： G01R31/26 , H01R12/00
CPC分类号： G01R31/2889 , H01R12/714
摘要： An interposer may include a first base, at least one first signal line in the first base, and at least one first ground line in the first base, wherein the ground line surrounds the at least one first signal line. The at least one first signal line and the at least one first ground line may be exposed through an upper surface of the first base. The at least one first signal line may be configured to conduct a test current through the first base. An interposer may also include a second base below the first base and may include a printed circuit board between the first base and the second base. A probe card may include a multilayer substrate having at least one contact needle, a coaxial board having at least one coaxial signal cable and the above described interposer between the multilayer substrate and the coaxial board.
摘要翻译：插入器可以包括第一基极，第一基极中的至少一个第一信号线和第一基极中的至少一个第一接地线，其中接地线包围至少一个第一信号线。所述至少一个第一信号线和所述至少一个第一接地线可以通过所述第一基座的上表面暴露。所述至少一个第一信号线可以被配置为进行穿过所述第一基座的测试电流。插入器还可以包括位于第一基座下方的第二基座，并且可以包括在第一基座和第二基座之间的印刷电路板。探针卡可以包括具有至少一个接触针的多层衬底，具有至少一个同轴信号电缆的同轴板以及多层衬底和同轴板之间的上述插入器。

108. 发明授权

US07521375B2 Method of forming an oxinitride layer 有权
标题翻译：形成氮氧化物层的方法
公开(公告)号：US07521375B2
公开(公告)日：2009-04-21
申请号：US11973042
申请日：2007-10-05
申请人： Young-sub You , Hun-Hyeoung Leam , Seok-Woo Nam , Bong-Hyun Kim , Woong Lee , Sang-Hoon Lee
发明人： Young-sub You , Hun-Hyeoung Leam , Seok-Woo Nam , Bong-Hyun Kim , Woong Lee , Sang-Hoon Lee
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/0223 , H01L21/02255 , H01L21/02332 , H01L21/0234 , H01L21/31662
摘要： In methods of forming an oxide layer and an oxynitride layer, a substrate is loaded into a reaction chamber having a first pressure and a first temperature. The oxide layer is formed on the substrate using a reaction gas while increasing a temperature of the reaction chamber from the first temperature to a second temperature under a second pressure. Additionally, the oxide layer is nitrified in the reaction chamber to form the oxynitride layer on the substrate. When the oxide layer and/or the oxynitride layer are formed on the substrate, minute patterns of a semiconductor device, for example a DRAM device, an SRAM device or an LOGIC device may be easily formed on the oxide layer or the oxynitride layer.
摘要翻译：在形成氧化物层和氧氮化物层的方法中，将衬底装载到具有第一压力和第一温度的反应室中。使用反应气体在基板上形成氧化物层，同时在第二压力下将反应室的温度从第一温度升至第二温度。此外，氧化物层在反应室中被硝化以在衬底上形成氧氮化物层。当在衬底上形成氧化物层和/或氧氮化物层时，可以容易地在氧化物层或氧氮化物层上形成半导体器件（例如DRAM器件，SRAM器件或LOGIC器件）的微小图案。

109. 发明授权

US07452121B2 Backlight assembly and display device having the same 有权
标题翻译：具有相同的背光组件和显示装置
公开(公告)号：US07452121B2
公开(公告)日：2008-11-18
申请号：US11485727
申请日：2006-07-13
申请人： Joo-Woan Cho , Sang-Hoon Lee , Sang-Yu Lee , Gi-Cherl Kim , Chun-Ho Song
发明人： Joo-Woan Cho , Sang-Hoon Lee , Sang-Yu Lee , Gi-Cherl Kim , Chun-Ho Song
IPC分类号： F21V7/04
CPC分类号： G02B6/0085 , G02B6/0068
摘要： A backlight assembly includes a light-generating device, a receiving container, a first heat-dissipating member, a heat-blocking member, and a second heat-dissipating member. The receiving container receives the light-generating device. The first heat-dissipating member contacts the receiving container. The heat-blocking member is disposed on the first heat-dissipating member. The second heat-dissipating member contacts the first heat-dissipating member. Therefore, liquid crystal is prevented from being deteriorated by heat generated by a light source.
摘要翻译：背光组件包括发光装置，接收容器，第一散热构件，隔热构件和第二散热构件。接收容器接收发光装置。第一散热构件与接收容器接触。隔热构件设置在第一散热构件上。第二散热构件与第一散热构件接触。因此，通过光源产生的热量防止液晶的劣化。

110. 发明授权

US07423443B2 Method of performing parallel test on semiconductor devices by dividing voltage supply unit 失效
标题翻译：通过分压电源单元对半导体器件进行并行测试的方法
公开(公告)号：US07423443B2
公开(公告)日：2008-09-09
申请号：US11330013
申请日：2006-01-10
申请人： Sang-Hoon Lee , Joon-Su Ji , Jung-Bae Ahn
发明人： Sang-Hoon Lee , Joon-Su Ji , Jung-Bae Ahn
IPC分类号： G01R31/26
CPC分类号： G01R31/31926 , G01R31/31721 , G11C29/56 , G11C29/56008 , G11C2029/2602 , G11C2029/5602
摘要： Provided is a method of performing a parallel test on semiconductor devices, the method including coupling a power signal line to a set of at least two semiconductor devices through a switching device, performing at least one part of a parallel test on the set of semiconductor devices, and disconnecting a semiconductor device from the set in response to determining that the semiconductor device is defective as a result of the at least one part of the parallel test.
摘要翻译：提供了一种对半导体器件进行并行测试的方法，该方法包括通过开关器件将功率信号线耦合到至少两个半导体器件的集合，在该组半导体器件上进行至少一部分并行测试并且响应于由于所述并行测试的所述至少一部分的结果确定所述半导体器件有缺陷而将半导体器件与所述组件断开连接。

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