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101. 发明申请

US20080099793A1 Photodiode module and apparatus including multiple photodiode modules 有权
标题翻译：光电二极管模块和包括多个光电二极管模块的设备
公开(公告)号：US20080099793A1
公开(公告)日：2008-05-01
申请号：US11654046
申请日：2007-01-17
申请人： David Fattal , Jason Blackstock , Duncan Stewart
发明人： David Fattal , Jason Blackstock , Duncan Stewart
IPC分类号： H01L27/148 , H01L29/768
CPC分类号： H01L31/02024 , H01L27/1446 , H01L31/02162 , H01L31/022408 , H01L31/1085
摘要： Various embodiments of the present invention are directed to a photodiode module including a structure configured to selectively couple light to a dielectric-surface mode of a photonic crystal of the photodiode module. In one embodiment of the present invention, a photodiode module includes a semiconductor structure having a p-region and an n-region. The photodiode module further includes a photonic crystal having a surface positioned adjacent to the semiconductor structure. A diffraction grating of the photodiode module may be positioned and configured to selectively couple light incident on the diffraction grating to a dielectric-surface mode associated with the surface of the photonic crystal. In another embodiment of the present invention, a photodiode apparatus includes multiple, stacked photodiode modules, each of which is configured to selectively absorb light at a selected wavelength or range of wavelengths.
摘要翻译：本发明的各种实施例涉及一种光电二极管模块，其包括被配置为选择性地将光耦合到光电二极管模块的光子晶体的电介质表面模式的结构。在本发明的一个实施例中，光电二极管模块包括具有p区和n区的半导体结构。光电二极管模块还包括具有邻近半导体结构定位的表面的光子晶体。可以将光电二极管模块的衍射光栅定位和配置为将入射在衍射光栅上的光选择性地耦合到与光子晶体的表面相关联的电介质表面模式。在本发明的另一实施例中，光电二极管装置包括多个堆叠的光电二极管模块，每个光电二极管模块被配置为选择性地吸收所选择的波长或波长范围的光。

102. 发明申请

US20070252131A1 Method of interconnect formation using focused beams 有权
标题翻译：使用聚焦光束的互连形成方法
公开(公告)号：US20070252131A1
公开(公告)日：2007-11-01
申请号：US11413476
申请日：2006-04-28
申请人： William Tong , Duncan Stewart , R. Williams , Manish Sharma , Zhiyong Li , Gary Gibson
发明人： William Tong , Duncan Stewart , R. Williams , Manish Sharma , Zhiyong Li , Gary Gibson
IPC分类号： H01L29/06
CPC分类号： H01L21/76892 , H01L21/76823 , H01L23/5254 , H01L27/1052 , H01L2924/0002 , H01L2924/12044 , H01L2924/3011 , H01L2924/00
摘要： A method of forming an electrical interconnect, which includes a first electrode, an interlayer of a programmable material disposed over at least a portion of the first electrode, and a second electrode disposed over the programmable material at a non-zero angle relative to the first electrode. The interlayer includes a modified region having differing electrical properties than the rest of the interlayer, sandwiched at the junction of the first electrode and the second electrode. The interlayer may be exposed to a focused beam to form the modified region.
摘要翻译：一种形成电互连的方法，包括第一电极，设置在第一电极的至少一部分上的可编程材料的中间层，以及设置在可编程材料上的第二电极，相对于第一电极以非零角度电极。中间层包括夹在第一电极和第二电极的接合处的与中间层的其余部分不同的电特性的改性区域。中间层可以暴露于聚焦光束以形成改质区域。

103. 发明申请

US20060238217A1 Active interconnects and control points in integrated circuits 有权
标题翻译：集成电路中的有源互连和控制点
公开(公告)号：US20060238217A1
公开(公告)日：2006-10-26
申请号：US11112795
申请日：2005-04-21
申请人： R. Williams , Philip Kuekes , Frederick Perner , Greg Snider , Duncan Stewart
发明人： R. Williams , Philip Kuekes , Frederick Perner , Greg Snider , Duncan Stewart
IPC分类号： H03K19/003
CPC分类号： H05K7/1092 , H01L23/5228 , H01L2924/0002 , H01L2924/00
摘要： In various embodiments of the present invention, tunable resistors are introduced at the interconnect layer of integrated circuits in order to provide a means for adjusting internal voltage and/or current levels within the integrated circuit to repair defective components or to configure the integrated circuit following manufacture. For example, when certain internal components, such as transistors, do not have specified electronic characteristics due to manufacturing defects, adjustment of the variable resistances of the tunable resistors included in the interconnect layer of integrated circuits according to embodiments of the present invention can be used to adjust internal voltage and/or levels in order to ameliorate the defective components. In other cases, the tunable resistors may be used as switches to configure integrated circuit components, including individual transistors and logic gates as well as larger, hierarchically structured functional modules and domains. In some cases, components and modules may be turned off, while, in other cases, components and modules may be turned on.
摘要翻译：在本发明的各种实施例中，在集成电路的互连层处引入可调电阻器，以便提供用于调整集成电路内的内部电压和/或电流水平以修复有缺陷的部件或者在制造后配置集成电路的装置。例如，当诸如晶体管的某些内部组件由于制造缺陷而没有指定的电子特性时，可以使用根据本发明的实施例的包括在集成电路的互连层中的可调电阻器的可变电阻的调整以调整内部电压和/或电平以便改善有缺陷的部件。在其他情况下，可调谐电阻器可以用作开关以配置集成电路部件，包括单独的晶体管和逻辑门以及更大的分层结构的功能模块和域。在某些情况下，可能会关闭组件和模块，而在其他情况下，可能会打开组件和模块。

104. 发明申请

US20050032203A1 Custom electrodes for molecular memory and logic devices 审中-公开
公开(公告)号：US20050032203A1
公开(公告)日：2005-02-10
申请号：US10930398
申请日：2004-08-30
申请人： Patricia Beck , Douglas Ohlberg , Duncan Stewart , Zhiyong Li
发明人： Patricia Beck , Douglas Ohlberg , Duncan Stewart , Zhiyong Li
IPC分类号： H01L21/28 , G11C13/02 , H01L21/285 , H01L27/28 , H01L29/06 , H01L21/00 , C12M1/34
CPC分类号： H01L27/28 , G11C13/02 , H01L2924/0002 , H01L2924/00
摘要： A method is provided for fabricating molecular electronic devices comprising at least a bottom electrode and a molecular switch film on the bottom electrode. The method includes forming the bottom electrode by a process including: cleaning portions of the substrate where the bottom electrode is to be deposited; pre-sputtering the portions; depositing a conductive layer on at least the portions; and cleaning the top surface of the conductive layer. Advantageously, the conductive electrode properties include: low or controlled oxide formation (or possibly passivated), high melting point, high bulk modulus, and low diffusion. Smooth deposited film surfaces are compatible with Langmuir-Blodgett molecular film deposition. Tailored surfaces are further useful for SAM deposition. The metallic nature gives high conductivity connection to molecules. Barrier layers may be added to the device stack, i.e., Al2O3 over the conductive layer.

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