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    • 91. 发明申请
    • Polar loop transmitter
    • 极环发射机
    • US20030067994A1
    • 2003-04-10
    • US10267905
    • 2002-10-09
    • Zarlink Semiconductor Limited
    • Peter Edward Chadwick
    • H04L027/04H04L027/12H04L027/20
    • H03F1/3282H03F1/0205H03F1/32H03F1/3247H03F2201/3233
    • A polar loop transmitter circuit arrangement includes a circuit input, a circuit output, a controllable signal source, a modulator connected between the signal source and the output, a first amplifier having its input connected to the circuit input, a second amplifier having its input connected to the circuit output, and a comparator. Each amplifier preferably includes respective amplitude detector and signal modifier portions connected in series between their respective inputs and outputs. An output of each of the amplifiers is connected to a respective input of the comparator, and an output of the comparator is connected to a control input of the modulator. The amplifiers may each be characterized by transfer functions that are generally logarithmic. Each amplifier's signal modifier portion may further include an analog-to-digital converter, a digital signal modifier, and a digital-to-analog converter. Additional signal mixer and/or phase comparison elements may also be incorporated into select embodiments of the subject polar loop transmitter technology.
    • 极环回路发射器电路装置包括电路输入端,电路输出端,可控信号源,连接在信号源与输出端之间的调制器,第一放大器,其输入端连接到电路输入端;第二放大器,其输入端连接 到电路输出,以及一个比较器。 每个放大器优选地包括在它们各自的输入和输出之间串联连接的相应的振幅检测器和信号修正器部分。 每个放大器的输出端连接到比较器的相应输入端,比较器的输出端连接到调制器的控制输入端。 放大器的每个都可以通过通常为对数的传递函数来表征。 每个放大器的信号修改器部分还可以包括模数转换器,数字信号修改器和数模转换器。 附加的信号混合器和/或相位比较元件也可以并入目标极环发射机技术的选择实施例中。
    • 93. 发明申请
    • Phase modulation power spreading used to reduce RF or microwave transmitter output power spur levels
    • 相位调制功率扩展用于降低射频或微波发射机的输出功率突发等级
    • US20030043933A1
    • 2003-03-06
    • US09941371
    • 2001-08-28
    • Mark Kintis
    • H04L027/20
    • H04B1/28H04B15/04H04B2215/067
    • A two stage mixer is configured to reduce the power levels of out of band spurious output signals or spurs, such as the leakage from the second stage mixer by way of phase modulation power spreading. The local oscillator signal applied to first mixer stage is phase modulated while the local oscillator signal applied to the second mixer stage is inverse modulated. As such, a problematic spur, such as leakage from the local oscillator applied to the second mixer stage is spread so that the power levels of the spur are distributed a wider bandwidth instead of concentrating the power levels at single frequencies, thus reducing the power level at any single frequency. By utilizing phase modulation, the need for relatively complex and expensive filters is eliminated.
    • 双级混频器被配置为通过相位调制功率扩展来降低带外杂散输出信号或杂散的功率电平,例如来自第二级混频器的泄漏。 施加到第一混频器级的本地振荡器信号被相位调制,而施加到第二混频器级的本地振荡器信号被逆调制。 因此,诸如来自施加到第二混频器级的本地振荡器的泄漏的有问题的杂散被扩展,使得杂散的功率电平分布更宽的带宽,而不是在单个频率上集中功率电平,从而降低功率电平 在任何单一频率。 通过利用相位调制,消除了相对复杂和昂贵的滤波器的需要。
    • 94. 发明申请
    • Phase shift keying modulation including a data converter for converting an input data signal having 3 bits long into two ternary converted data signals
    • 相移键控调制包括用于将具有3位长的输入数据信号转换为两个三进制转换数据信号的数据转换器
    • US20030035496A1
    • 2003-02-20
    • US10219299
    • 2002-08-16
    • NEC CORPORATION
    • Seiichi Noda
    • H04L027/20
    • H04L27/186
    • In a phase modulation apparatus for modulating a phase of a carrier signal by an input signal to produce a phase-shift-keying-modulated wave, a data converter converts an input data signal having 3 bits long as the input signal into first and second ternary converted data signals. A ternary phase shift keying modulator modulates, in synchronism with a clock signal, the phase of the carrier signal by the first and the second ternary converted data signals to produce, as the phase-shift-keying-modulated wave, first and second ternary phase shift keying modulated signals, respectively. Disposed between the data converter and the ternary phase shift keying modulator, a parallel-serial converter temporally multiplexes the first and the second ternary converted data signals into first and second multiplexed signals, respectively. The parallel-serial converter supplies the ternary phase shift keying modulator with the first and the second multiplexed
    • 在用于通过输入信号调制载波信号的相位以产生相移键控调制波的相位调制装置中,数据转换器将具有3位长的输入数据信号作为输入信号转换成第一和第三三进制 转换数据信号。 三相相移键控调制器与时钟信号同步地通过第一和第二三进制转换的数据信号来调制载波信号的相位,以产生作为相移键控调制波的第一和第二三元相位 移位键控调制信号。 在数据转换器和三相相移键控调制器之间,并行 - 串行转换器将第一和第二三进制转换的数据信号分别时间复用为第一和第二复用信号。 并行串行转换器为第一和第二复用的三元相移键控调制器提供
    • 95. 发明申请
    • Symbol constellations having second-order statistics with cyclostationary phase
    • 符号星座具有循环平稳相位的二阶统计
    • US20030035492A1
    • 2003-02-20
    • US09928897
    • 2001-08-14
    • Charles Douglas Murphy
    • H04L027/04H04L027/12H04L027/20H04K001/02H04L025/03H04L025/49H03H007/30
    • H04L27/2067H04L25/0238
    • The present invention is a machine or method used in digital communications. Symbols are selected in periodic fashion from at least two different symbol constellations. At least one of the symbol constellations has a non-conjugated second moment not equal to zero. The non-conjugated second moment is a second-order statistic. Symbol selection leads to second-order input statistics having cyclostationary phase, and thus to second-order output statistics having cyclostationary phase. These statistics can be used for low-complexity identification and equalization of both linear and nonlinear channels. The invention allows for low-complexity identification and equalization of linear channels and of nonlinear channels without requiring constant-modulus constellations.
    • 本发明是用于数字通信的机器或方法。 从至少两个不同的符号星座以周期的方式选择符号。 符号星座中的至少一个具有不等于零的非共轭二次矩。 非共轭二次矩是二阶统计量。 符号选择导致二阶输入统计具有循环平稳相位,从而导致具有循环平稳相位的二阶输出统计。 这些统计数据可用于线性和非线性通道的低复杂度识别和均衡。 本发明允许线性通道和非线性通道的低复杂度识别和均衡,而不需要恒模数星座。
    • 97. 发明申请
    • Modulator and signaling method
    • 调制器和信令方式
    • US20030016762A1
    • 2003-01-23
    • US10172566
    • 2002-06-14
    • Frederick L. MartinRobert E. StengelEdwin E. Bautista
    • H03C003/00H04L027/20
    • H04L27/2007
    • Phase shift key modulators (100, 500, 1000, 1400, 1700) are provided in which a multiphase signal source (108, 1402, 1406-1412,1702) is used to generate a plurality of phases of a carrier signal. A selector (110) is used to select one phase or a sequence of phases of the carrier signal to represent each bit pattern that is received from a binary data source (102, 1422). The multiphase signal source preferably comprises a multiphase oscillator that includes a phase locked ring of variable propagation delay inverters (202). Preferably, a phase sequencer (502) is used to select a monotonic sequence of phases to represent each bit pattern. Preferably two phase selectors (110, 1004) are used to simultaneously select two phases of carrier signal, and a phase interpolator (1106) is used to generate a sequence of phases from the two phases selected by the two phase selectors (110, 1004).
    • 提供了相移键调制器(100,500,1000,1400,1700),其中使用多相信号源(108,1402,1406-1412,1702)来产生载波信号的多个相位。 选择器(110)用于选择载波信号的相位或序列,以表示从二进制数据源(102,1422)接收的每个位模式。 多相信号源优选地包括多相振荡器,其包括可变传播延迟反相器(202)的锁相环。 优选地,相位序列器(502)用于选择相位的单调序列以表示每个位模式。 优选地,两个相位选择器(110,1004)用于同时选择载波信号的两相,并且相位内插器(1106)用于从由两个相位选择器(110,1004)选择的两相中产生相位序列, 。
    • 98. 发明申请
    • Serial communication circuit and serial transmitting and receiving system
    • 串行通信电路和串行发送和接收系统
    • US20030002589A1
    • 2003-01-02
    • US10144730
    • 2002-05-15
    • Kotaro SuzukiTakeshi Fujii
    • H04L027/20H04L027/12H04L027/04H04L027/00
    • H04L25/068
    • To eliminates the need for synchronization of operating clocks with each other in serial communications between the semiconductor integrated circuit at the transmitting and receiving sides. In the reloading control unit of the circuit at the transmitting side, a second reloading register is set in a timer after setting a first reloading register when DATAnull0, while when DATAnull1, the first reloading register is set in the timer after setting the second reloading register. Accordingly, waveforms having different duty ratios are outputted. In the data converting circuit of the circuit at the receiving side, the waveforms are converted into null0null, null1null based on the ratio of the H,L level periods of each waveform to supply them to a serial I/O.
    • 在发送和接收侧的半导体集成电路之间的串行通信中,不需要使操作时钟彼此同步。 在发送侧的电路的重新加载控制单元中,当DATA = 0时,在设置第一重新加载寄存器之后,在定时器中设置第二重新加载寄存器,而当DATA = 1时,在设置之后将第一重新加载寄存器设置在定时器中 第二次重新加载注册。 因此,输出具有不同占空比的波形。 在接收侧的电路的数据转换电路中,根据每个波形的H,L电平周期的比率将波形转换为“0”,“1”,将其提供给串行I / O。