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91. 发明专利

JP5166375B2 Digital / analog converter having a circuit architecture to improve the switch loss 有权
公开(公告)号：JP5166375B2
公开(公告)日：2013-03-21
申请号：JP2009194393
申请日：2009-08-25
申请人：アナログディヴァイスィズインク
发明人：ロデリック・マクラクラン
IPC分类号： H03M1/74
CPC分类号： H03M1/0845 , H03M1/76 , H03M1/785 , H03M1/808

92. 发明专利

JP4324202B2 A / d converter 有权
公开(公告)号：JP4324202B2
公开(公告)日：2009-09-02
申请号：JP2007014917
申请日：2007-01-25
申请人：シャープ株式会社
发明人：正彦丸山
IPC分类号： H03M1/08 , H03M1/56
CPC分类号： H03M1/0845 , H03M1/0607 , H03M1/56

93. 发明专利

JP2005269611A Comparator, ad converter, semiconductor device, and imaging device 有权
标题翻译：比较器，AD转换器，半导体器件和成像器件
公开(公告)号：JP2005269611A
公开(公告)日：2005-09-29
申请号：JP2005015642
申请日：2005-01-24
申请人： Rohm Co Ltd , ローム株式会社
发明人： YUKI HIROFUMI , KAWAMURA YASUNORI
IPC分类号： H04N5/14 , H03K5/08 , H03K5/153 , H03K5/24 , H03M1/08 , H03M1/36 , H03M1/44 , H04N5/232
CPC分类号： H03K5/2481 , H03K5/249 , H03M1/0845 , H03M1/365
摘要： PROBLEM TO BE SOLVED: To solve a problem that an area of a circuit is increased because a plurality of analog switches are provided to a hysteresis circuit which is provided to a comparator. SOLUTION: In a first comparator A 1 , a first inverting circuit 28 and a second inverting circuit 30 are disposed in series. Input voltage V in is supplied to a first node 24 via a first switch 20, and reference voltage V ref is supplied to the first node 24 via a second switch 22. Difference between the input voltage V in and the reference voltage V ref is inverted by the first inverting circuit 28, an output of the first inverting circuit 28 is further inverted by the second inverting circuit 30, and outputted as an output voltage Vout which is a result of comparison. A potential of a second node 26 varies by pushing up by a third capacitance C 3 . COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了解决由于向提供给比较器的滞后电路提供多个模拟开关而增加电路面积的问题。解决方案：在第一比较器A 1 中，串联设置第一反相电路28和第二反相电路30。中的输入电压V 经由第一开关20提供给第一节点24，并且参考电压V SB被从第二开关22提供给第一节点24。在第一反相电路28使第一反相电路28的第一反相电路28的输出与第一反相电路28的输出反相后，在中的输入电压V 与基准电压V SB之间< 电路30，作为比较结果输出作为输出电压Vout。第二节点26的电位通过向上推动第三电容C 3而变化。版权所有（C）2005，JPO＆NCIPI

94. 发明专利

JP3583942B2 The signal processing device 有权
公开(公告)号：JP3583942B2
公开(公告)日：2004-11-04
申请号：JP8926299
申请日：1999-03-30
申请人：三洋電機株式会社
发明人：透渡辺
IPC分类号： H04N5/14 , G06J1/00 , H03M1/08 , H03M1/12 , H04N5/335 , H04N5/357 , H04N5/378
CPC分类号： H04N5/335 , G06J1/00 , H03M1/0845 , H03M1/12 , H04N5/217

95. 发明专利

JP2003060504A A/d conversion apparatus and error correction device for a/d converter 有权
标题翻译： A / D转换器和A / D转换器的错误校正装置
公开(公告)号：JP2003060504A
公开(公告)日：2003-02-28
申请号：JP2001246282
申请日：2001-08-14
申请人： Fujitsu Ltd , 富士通株式会社
发明人： JIN SHUNICHI , HONDA KIYOKO
IPC分类号： H03M1/10 , H03M1/08 , H03M1/12
CPC分类号： H03M1/0845 , H03M1/12
摘要： PROBLEM TO BE SOLVED: To correct error due to irregularities of a reference transition voltage peculiar to products of A/D converters, and realize high resolution of an A/D converter.
SOLUTION: A zero transition voltage and a full transition voltage are inputted in the A/D converter 4, the respective digital conversion values are fed back to a device irregularity correcting circuit 53, and an H side reference voltage AVRH and an L side reference voltage AVRL are so determined that digital outputs corresponding to the respective transition voltage can be obtained. A digital output of the A/D converter 4 is fed back to a high resolution coping circuit 56, and AVRL or AVRH is changed in accordance with an analog input voltage to the A/D converter 4, thereby making the difference one-half. By repeating that A/D conversion is again performed, a value of high order bits is obtained. The value of high order bits is merged with a value of low order bits outputted from the A/D converter 4 by a merging circuit 57.
COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：纠正由于A / D转换器产品特有的参考转换电压的不规则引起的误差，实现A / D转换器的高分辨率。解决方案：在A / D转换器4中输入零转换电压和全跃变电压，各个数字转换值反馈到器件不规则校正电路53，H侧参考电压AVRH和L侧参考电压 AVRL被确定为可以获得对应于各个转换电压的数字输出。 A / D转换器4的数字输出被反馈到高分辨率应答电路56，并且根据到A / D转换器4的模拟输入电压来改变AVRL或AVRH，从而使得差异为一半。通过重复再次执行A / D转换，获得高位数的值。高位数的值通过合并电路57与从A / D转换器4输出的低位数的值合并。

96. 发明授权

US10879921B2 Integrated circuit and method for communicating data 有权
公开(公告)号：US10879921B2
公开(公告)日：2020-12-29
申请号：US16668563
申请日：2019-10-30
申请人： Melexis Technologies SA
发明人： Matthijs Pardoen , Cesare Ghezzi , Kevin Fahrni
IPC分类号： H03M1/66 , H03M1/08 , G05F1/595
CPC分类号： H03M1/0845 , G05F1/595 , H03M1/0827
摘要： An integrated circuit is provided that includes an output stage circuit. The output stage circuit includes an input node for receiving a digital input signal, a supply voltage node for receiving a supply voltage signal, a digital to analog convertor for converting the digital signal, an amplifier for amplifying the converted signal, a first/second and optionally third voltage regulator generating a first/second and optionally third voltage signal, and a greatest-voltage selector circuit for providing power to the amplifier. Two different voltages are provided to the DAC. The output signal can be a SENT signal. The circuit is highly robust against power-interruptions and EMI.

97. 发明申请

US20180109746A1 SOLID-STATE IMAGING DEVICE, ELECTRONIC APPARATUS, AND AD CONVERTER 审中-公开
公开(公告)号：US20180109746A1
公开(公告)日：2018-04-19
申请号：US15562643
申请日：2016-03-23
申请人： Sony Corporation
发明人： Katsuhiko Hanzawa , Shizunori Matsumoto
IPC分类号： H04N5/378 , H03M1/34 , H03M1/56 , H04N5/357 , H04N5/3745
CPC分类号： H04N5/357 , H01L27/146 , H03K5/08 , H03M1/0678 , H03M1/0845 , H03M1/0863 , H03M1/123 , H03M1/34 , H03M1/56 , H04N5/3575 , H04N5/374 , H04N5/37455 , H04N5/378
摘要： The present technology relates to a solid-state imaging device, an electronic apparatus, and an AD converter that are capable of suppressing the occurrence of an error in AD conversion results.The solid-state imaging device includes a pixel section having a plurality of pixels, a comparator for comparing a pixel signal outputted from the pixels with a reference signal, and a counter for counting the time of comparison made by the comparator. The comparator includes a first amplifier for comparing the pixel signal with the reference signal, a second amplifier that has a first transistor and amplifies an output signal of the first amplifier, and a second transistor having the same polarity as the first transistor. A gate of the second transistor is connected to an output end of the first amplifier, and a source and a drain of the second transistor are connected to the same fixed potential as a source of the first transistor. The present technology is applicable, for example, to a CMOS image sensor.

98. 发明授权

US09900016B1 Compensation of non-linearity at digital to analog converters 有权
公开(公告)号：US09900016B1
公开(公告)日：2018-02-20
申请号：US15588065
申请日：2017-05-05
申请人： INTEL IP CORPORATION
发明人： Stefan Trampitsch , Daniel Gruber
IPC分类号： H03M1/06 , H03M1/66
CPC分类号： H03M1/0602 , H03M1/0845 , H03M1/66
摘要： An apparatus for compensating for nonlinearities in a DAC caused by variabilities of a power supply. The apparatus may include a power supply, a processing component, and a front-end circuit. The power supply may generate power, where the power includes variabilities in a power. The processing component may generate a digital signal. The front-end circuit may be operatively coupled to the power supply and the processing component. The front-end circuit may receive the power from the power supply, identify the nonlinearities in the power, receive the digital signal from the processing component, and adjust the digital signal for the nonlinearities to obtain an input signal to send to a digital to analog converter (DAC).

99. 发明授权

US09831883B1 Analog system and associated methods thereof 有权
公开(公告)号：US09831883B1
公开(公告)日：2017-11-28
申请号：US15614977
申请日：2017-06-06
申请人： Frank R. Dropps
发明人： Frank R. Dropps
IPC分类号： H03M1/06 , H03M1/12 , H03M1/10 , G01K7/42 , G01K13/00 , G01K1/14 , H03M1/00 , G01K3/04 , G01K7/01
CPC分类号： H03M1/06 , G01K1/02 , G01K1/14 , G01K3/04 , G01K7/01 , G01K7/42 , G01K13/002 , G01K2219/00 , H03M1/00 , H03M1/0809 , H03M1/0845 , H03M1/089 , H03M1/12 , H03M1/361
摘要： In one aspect a system is provided. The system a plurality of flash compare modules to output a set of unordered output signals based on an analog input signal; a plurality of device selection modules that receive the unordered output signals and generate ordered signals representing the analog input; and a temperature and voltage compensation module for receiving one or more of temperature and voltage signals from at least a temperature and voltage sensor module that senses one or more of temperature and voltage values that are used to compensate for changes in output signals caused by changes in one or more of die temperature and core voltage.

100. 发明申请

US20160173112A1 SWITCHABLE SECONDARY PLAYBACK PATH 有权
公开(公告)号：US20160173112A1
公开(公告)日：2016-06-16
申请号：US15050857
申请日：2016-02-23
申请人： Cirrus Logic, Inc.
发明人： Tejasvi Das , John L. Melanson
IPC分类号： H03M1/00 , H03M1/78
CPC分类号： H03M1/002 , H03M1/0845 , H03M1/66 , H03M1/662 , H03M1/68 , H03M1/70 , H03M1/785 , H03M3/32 , H03M3/392 , H03M3/414 , H03M3/416 , H03M3/50
摘要： In accordance with embodiments of the present disclosure, a processing system may include a plurality of processing paths including a first processing path and a second processing path, a digital-to-analog stage output, and a controller. The first processing path may include a first digital-to-analog converter for converting the digital input signal into a first intermediate analog signal, the first digital-to-analog converter configured to operate in a high-power state and a low-power state. The second processing path may include a second digital-to-analog converter for converting a digital input signal into a second intermediate analog signal. The digital-to-analog stage output may be configured to generate an analog signal comprising a sum of the first intermediate analog signal and the second intermediate analog signal. The controller may be configured to operate the first digital-to-analog converter in the lower-power state when a magnitude of the digital input signal is below a threshold magnitude.

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