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91. 发明申请

US20140027820A1 FORMING FACET-LESS EPITAXY WITH SELF-ALIGNED ISOLATION 有权
标题翻译：具有自对准隔离的成形面较小的外观
公开(公告)号：US20140027820A1
公开(公告)日：2014-01-30
申请号：US13556406
申请日：2012-07-24
申请人： Michael V. Aquilino , Byeong Yeol Kim , Ying Li , Carl John Radens
发明人： Michael V. Aquilino , Byeong Yeol Kim , Ying Li , Carl John Radens
IPC分类号： H01L21/336 , H01L29/78
CPC分类号： H01L21/76232 , H01L29/66628 , H01L29/66636
摘要： A method of forming a semiconductor structure may include preparing a continuous active layer in a region of the substrate and forming a plurality of adjacent gates on the continuous active layer. A first raised epitaxial layer may be deposited on a recessed region of the continuous active layer between a first and a second one of the plurality of gates, whereby the first and second gates are adjacent. A second raised epitaxial layer may be deposited on another recessed region of the continuous active layer between the second and a third one of the plurality of gates, whereby the second and third gates are adjacent. Using a cut mask, a trench structure is etched into the second gate structure and a region underneath the second gate in the continuous active layer. The trench is filled with isolation material for electrically isolating the first and second raised epitaxial layers.
摘要翻译：形成半导体结构的方法可以包括在衬底的区域中制备连续有源层，并在连续有源层上形成多个相邻栅极。第一凸起的外延层可以沉积在多个栅极中的第一和第二栅极之间的连续有源层的凹陷区域上，由此第一和第二栅极相邻。第二凸起的外延层可以沉积在多个栅极中的第二和第三栅极之间的连续有源层的另一个凹陷区域上，由此第二和第三栅极相邻。使用切割掩模，沟槽结构被蚀刻到第二栅极结构中以及连续有源层中的第二栅极下方的区域。沟槽填充有用于电隔离第一和第二凸起外延层的隔离材料。

92. 发明申请

US20140015092A1 SEALED SHALLOW TRENCH ISOLATION REGION 有权
标题翻译：密封沙滩隔离区
公开(公告)号：US20140015092A1
公开(公告)日：2014-01-16
申请号：US13548237
申请日：2012-07-13
申请人： Michael V. Aquilino , Xiang Hu , Daniel J. Jaeger , Byeong Y. Kim , Yong M. Lee , Ying Li , Reinaldo A. Vega
发明人： Michael V. Aquilino , Xiang Hu , Daniel J. Jaeger , Byeong Y. Kim , Yong M. Lee , Ying Li , Reinaldo A. Vega
IPC分类号： H01L29/06 , H01L21/762
CPC分类号： H01L21/823437 , H01L21/76224 , H01L29/66621
摘要： A method for formation of a sealed shallow trench isolation (STI) region for a semiconductor device includes forming a STI region in a substrate, the STI region comprising a STI fill; forming a sealing recess in the STI fill of the STI region; and forming a sealing layer in the sealing recess over the STI fill.
摘要翻译：用于形成用于半导体器件的密封浅沟槽隔离（STI）区域的方法包括在衬底中形成STI区域，所述STI区域包括STI填充物; 在STI区域的STI填充物中形成密封凹槽; 以及在所述STI填充物上的所述密封凹槽中形成密封层。

93. 发明授权

US08626257B2 Analyte sensor 有权
公开(公告)号：US08626257B2
公开(公告)日：2014-01-07
申请号：US12267525
申请日：2008-11-07
申请人： Ying Li , Apurv Ullas Kamath , Richard C. Yang , Mark C. Brister
发明人： Ying Li , Apurv Ullas Kamath , Richard C. Yang , Mark C. Brister
IPC分类号： A61B5/05
CPC分类号： A61B5/157 , A61B5/0031 , A61B5/14532 , A61B5/14535 , A61B5/14539 , A61B5/14542 , A61B5/14546 , A61B5/14735 , A61B5/1486 , A61B5/14865 , A61B5/1495 , A61B5/15003 , A61B5/150992 , A61B5/155 , A61B5/412 , A61B5/4839 , A61B5/6848 , A61B5/6849 , A61B5/7275 , A61B5/743 , A61B2560/0223 , A61B2560/04 , A61B2562/085 , A61M5/14 , A61M5/16804 , A61M5/1723 , A61M2005/14296 , A61M2230/201 , C12Q1/001 , C12Q1/006 , G06F19/3468 , G16H20/17 , G16H40/40 , Y02A90/26
摘要： Systems and methods of use for continuous analyte measurement of a host's vascular system are provided. In some embodiments, a continuous glucose measurement system includes a vascular access device, a sensor and sensor electronics, the system being configured for insertion into communication with a host's circulatory system.

94. 发明授权

US08600393B2 Methods and apparatus for enabling interference coordination in heterogeneous networks 有权
标题翻译：用于实现异构网络中的干扰协调的方法和装置
公开(公告)号：US08600393B2
公开(公告)日：2013-12-03
申请号：US13250429
申请日：2011-09-30
申请人： Lingjia Liu , Guowang Miao , Ying Li , Jianzhong Zhang , Young-Han Nam
发明人： Lingjia Liu , Guowang Miao , Ying Li , Jianzhong Zhang , Young-Han Nam
IPC分类号： H04W40/00
CPC分类号： H04W16/14 , H04W16/16 , H04W36/0055 , H04W36/04 , H04W52/244 , H04W72/082 , H04W84/045
摘要： For use in a heterogeneous network, a method for enabling interference coordination includes, upon occurrence of a trigger condition, determining, at a first low power node, that the first low power node is approaching a second low power node. The method also includes sending, at the first low power node, an entering message to an evolved Node-B (eNB) that serves the first low power node. The method further includes receiving, at the first low power node, configuration information from the eNB to perform at least one measurement of the second low power node.
摘要翻译：为了在异构网络中使用，用于启用干扰协调的方法包括在出现触发条件时，在第一低功率节点处确定第一低功率节点接近第二低功率节点。该方法还包括在第一低功率节点向向第一低功率节点服务的演进节点B（eNB）发送进入消息。该方法还包括在第一低功率节点处接收来自eNB的配置信息以执行第二低功率节点的至少一个测量。

95. 发明申请

US20130279810A1 VIDEO PROCESSING SYSTEM WITH FACE DETECTION AND METHODS FOR USE THEREWITH 有权
标题翻译：具有面部检测的视频处理系统及其使用方法
公开(公告)号：US20130279810A1
公开(公告)日：2013-10-24
申请号：US13467600
申请日：2012-05-09
申请人： Ying Li , Xu Gang (Wilf) Zhao
发明人： Ying Li , Xu Gang (Wilf) Zhao
IPC分类号： G06K9/62
CPC分类号： G06K9/00724 , H04N19/103 , H04N19/152 , H04N19/167 , H04N19/17
摘要： A system for processing a video signal into a processed video signal includes a pattern recognition module for detecting a face in the image sequence, based on coding feedback data, and generating pattern recognition data in response thereto, wherein the pattern recognition data indicates the pattern of interest. A video codec generates the processed video signal and generates the coding feedback data in conjunction with the processing of the image sequence.
摘要翻译：用于将视频信号处理成经处理的视频信号的系统包括：图形识别模块，用于基于编码反馈数据检测图像序列中的面部，并响应于此生成模式识别数据，其中模式识别数据指示利益。视频编解码器生成经处理的视频信号，并结合图像序列的处理生成编码反馈数据。

96. 发明申请

US20130251024A1 METHOD AND DEVICE TO IDENTIFY MOTION VECTOR CANDIDATES USING A SCALED MOTION SEARCH 有权
标题翻译：使用规模运动搜索识别运动矢量候选的方法和装置
公开(公告)号：US20130251024A1
公开(公告)日：2013-09-26
申请号：US13425522
申请日：2012-03-21
申请人： Ying Li , Xu Gang Zhao
发明人： Ying Li , Xu Gang Zhao
IPC分类号： H04N7/26
CPC分类号： H04N19/53 , H04N19/56
摘要： A scaled motion search section can be used in a video processing device that processes a video input signal that includes a plurality of pictures. The scaled motion search section includes a downscaling module that downscales the plurality of pictures to generate a plurality of downscaled pictures, wherein the downscaling module includes a horizontal downscaling filter and a vertical downscaling filter, and wherein the vertical downscaling filter generates downscaled pixels for a macroblock pair using only pixels from the macroblock pair. A transfer function that models the scaled motion vectors is determined and used to identify a final set of motion vector candidates used in a larger scale motion search.
摘要翻译：缩放运动搜索部分可以用于处理包括多个图像的视频输入信号的视频处理装置。缩放运动搜索部分包括缩小模块，其缩小多个图片以生成多个缩小的图片，其中缩小模块包括水平缩小滤镜和垂直缩小滤镜，并且其中垂直缩小滤镜产生宏块的缩小像素只使用来自宏块对的像素。确定用于对缩放的运动矢量建模的传递函数，并用于识别在较大比例运动搜索中使用的运动矢量候选的最终集合。

97. 发明授权

US08536656B2 Self-aligned contacts for high k/metal gate process flow 有权
标题翻译：用于高k /金属栅极工艺流程的自对准触点
公开(公告)号：US08536656B2
公开(公告)日：2013-09-17
申请号：US12987221
申请日：2011-01-10
申请人： Ravikumar Ramachandran , Ramachandra Divakaruni , Ying Li
发明人： Ravikumar Ramachandran , Ramachandra Divakaruni , Ying Li
IPC分类号： H01L21/70
CPC分类号： H01L29/401 , H01L21/76895 , H01L21/76897 , H01L29/49 , H01L29/4983 , H01L29/51 , H01L29/66545 , H01L29/6656
摘要： A semiconductor structure is provided that includes a semiconductor substrate having a plurality of gate stacks located on a surface of the semiconductor substrate. Each gate stack includes, from bottom to top, a high k gate dielectric layer, a work function metal layer and a conductive metal. A spacer is located on sidewalls of each gate stack and a self-aligned dielectric liner is present on an upper surface of each spacer. A bottom surface of each self-aligned dielectric liner is present on an upper surface of a semiconductor metal alloy. A contact metal is located between neighboring gate stacks and is separated from each gate stack by the self-aligned dielectric liner. The structure also includes another contact metal having a portion that is located on and in direct contact with an upper surface of the contact metal and another portion that is located on and in direct contact with the conductive metal of one of the gate stacks. Methods of forming the semiconductor structure using a replacement gate and a non-replacement gate scheme are also disclosed.
摘要翻译：提供一种半导体结构，其包括具有位于半导体衬底的表面上的多个栅极叠层的半导体衬底。每个栅极堆叠包括从底部到顶部的高k栅极电介质层，功函数金属层和导电金属。间隔件位于每个栅极堆叠的侧壁上，并且自对准电介质衬垫存在于每个间隔件的上表面上。每个自对准电介质衬垫的底表面存在于半导体金属合金的上表面上。接触金属位于相邻的栅极堆叠之间，并通过自对准电介质衬垫与每个栅极堆叠分离。该结构还包括另一个接触金属，其具有位于接触金属的上表面上且与触头金属的上表面直接接触的部分，以及位于与其中一个栅极叠层的导电金属直接接触的另一部分。还公开了使用替换栅极和非替代栅极方案形成半导体结构的方法。

98. 发明申请

US20130239220A1 Monitoring and Managing User Privacy Levels 有权
公开(公告)号：US20130239220A1
公开(公告)日：2013-09-12
申请号：US13417363
申请日：2012-03-12
申请人： Gerard Gjonej , Ying Li
发明人： Gerard Gjonej , Ying Li
IPC分类号： G06F21/24
CPC分类号： H04L63/1433 , G06F21/6245 , G06F21/6254 , G06F21/6263 , H04L63/1408 , H04L67/02 , H04L67/22
摘要： Various embodiments pertain to techniques for measuring a user's privacy level as a user interacts with various web services. In various embodiments, entities with which the user interacts are detected and sensitive information shared by the user is logged to determine what a given entity knows about the user. In some embodiments, sensitive information that is shared by a user can be processed using a predictive algorithm to ascertain a user's level of privacy. When a user's identity is predicted by the algorithm, a user can be alerted to the loss of anonymity. In various embodiments, user-defined areas of anonymity can be used to measure a user's definition of privacy. In some embodiments, alerts can also be provided to the user when a new, previously undisclosed, piece of information is shared by the user.

99. 发明授权

US08527624B2 Mechanism for adaptive profiling for performance analysis 失效
标题翻译：性能分析适应性分析的机制
公开(公告)号：US08527624B2
公开(公告)日：2013-09-03
申请号：US12130718
申请日：2008-05-30
申请人： Ying Chen , Evelyn Duesterwald , Ying Li , Qi Ming Teng
发明人： Ying Chen , Evelyn Duesterwald , Ying Li , Qi Ming Teng
IPC分类号： G06F15/173 , G06F11/00 , G06F9/44 , G01R11/00 , G01R31/28
CPC分类号： G06F11/3612 , G06F11/3452 , G06F11/3466 , G06F2201/86 , G06F2201/865 , G06F2201/88
摘要： Adaptive profiling for performance analysis of a computer system controls one or more agents to monitor a plurality of events occurring in a target computer system based on an adaptive logic. Collected data may be filtered and analyzed to determine one or more contributor events that attribute to performance of the target computer system. One or more patterns are observed or detected in said collected data, behavior of said one or more agents are adjusted based on said detected one or more patterns. The adaptive logic may be further reconfigured based on said detected one or more patterns.
摘要翻译：用于计算机系统的性能分析的自适应分析控制一个或多个代理以基于自适应逻辑监视在目标计算机系统中发生的多个事件。收集的数据可以被过滤和分析以确定属于目标计算机系统的性能的一个或多个贡献者事件。在所述收集的数据中观察或检测到一个或多个图案，基于所检测到的一个或多个图案来调整所述一个或多个代理的行为。可以基于所检测到的一个或多个模式来进一步重新配置自适应逻辑。

100. 发明授权

US08479162B2 Method and apparatus for locating memory leak in a program 失效
标题翻译：用于定位程序中的内存泄漏的方法和装置
公开(公告)号：US08479162B2
公开(公告)日：2013-07-02
申请号：US12511122
申请日：2009-07-29
申请人： Ying Li , Tian Cheng Liu , Quan Long , Jing Luo , Cheng Wei Wang
发明人： Ying Li , Tian Cheng Liu , Quan Long , Jing Luo , Cheng Wei Wang
IPC分类号： G06F9/44
CPC分类号： G06F11/3604
摘要： A method and apparatus for locating a memory leak in a program code by a computer device using a combination of dynamic analysis and static analysis approaches. The method includes dynamically analyzing the program to determine a memory leak characteristic; filtering out items which do not match the determined memory leak characteristic of the program to reduce a static analysis range to certain suspicious parts of a source code; and statically analyzing the suspicious parts of the program to locate the memory leak in the program. The apparatus includes a dynamic analyzer device to determine memory leak characteristics; and a static analyzer device to filter out items which do not match the determined memory leak characteristic to reduce a static analysis range to certain suspicious parts of a source code and locate the memory leak in the program.
摘要翻译：一种用于通过计算机设备使用动态分析和静态分析方法的组合来定位程序代码中的存储器泄漏的方法和装置。该方法包括动态分析程序以确定存储器泄漏特性; 过滤掉与确定的程序的内存泄漏特性不匹配的项目，以将静态分析范围减少到源代码的某些可疑部分; 并静态分析程序的可疑部分，以定位程序中的内存泄漏。该装置包括用于确定存储器泄漏特性的动态分析器装置; 以及静态分析器装置，用于过滤出与确定的存储器泄漏特性不匹配的项目，以将静态分析范围减少到源代码的某些可疑部分，并将程序中的存储器泄漏定位。

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