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    • 92. 发明授权
    • Seed coating apparatus
    • 种子包衣机
    • US06261371B1
    • 2001-07-17
    • US09294942
    • 1999-04-20
    • Kazushi NakatsukasaYasushi KohnoTakamichi Maejima
    • Kazushi NakatsukasaYasushi KohnoTakamichi Maejima
    • B05C502
    • A01C1/06
    • A seed coating apparatus comprises a seed supplying unit, a coating unit, a hardening unit and a washing unit assembled in series. The coating unit is provided with an exchangeable nozzle block having the nozzles and with passages for respectively feeding the nozzles with gelling solution. All the passages are simultaneously blocked-and-resumed by two valves, which slidably cross the passages at upstream and downstream portions thereof. Each nozzle is supplied therein with a seed through a cylinder disposed at the center thereof and with gelling solution from the passage flowing toward the cylinder through discharge ports in opposite to each other. Holes of the nozzles for dropping the gel-coated seeds to the hardening unit are closed by a shutter after the gel-coated seeds are dropped therefrom.
    • 种子包衣设备包括种子供应单元,涂层单元,硬化单元和串联组装的洗涤单元。 涂覆单元设置有可更换的喷嘴块,其具有喷嘴和通道,用于分别向喷嘴供给胶凝溶液。 所有的通道同时被两个阀阻断和恢复,该阀在其上游和下游部分可滑动地穿过通道。 每个喷嘴在其中通过设置在其中心的圆柱体供应种子,并且具有来自通道的胶凝溶液通过彼此相反的排出口流向气缸。 用于将凝胶涂覆的种子滴落到硬化单元的喷嘴的孔在凝胶涂覆的种子从其中滴落之后用快门封闭。
    • 95. 发明授权
    • Apparatus for encapsulating seed by gel
    • 用于通过凝胶包封种子的装置
    • US06048571A
    • 2000-04-11
    • US978296
    • 1997-11-25
    • Yasushi KohnoKazushi Nakatsukasa
    • Yasushi KohnoKazushi Nakatsukasa
    • A01C1/00A01C1/06A01G13/00
    • A01C1/06
    • An apparatus for encapsulating seed by gel of the present invention, wherein seed are drawn from a hopper of a seed supply portion into a stocker, are absorbed by an absorption head from a stocker, and are conveyed by move of the absorption head. The stocker comprising a vibrator and a vibratory plate, wherein one side of the vibratory plate forms a recess for storing the seed thereon, and the other side of the vibratory plate is connected with the vibrator, so that the seed on the vibratory plate are suspended by vibration of the vibrator. Thrust pins exsertably inserted into end nozzles of the absorption head and connected with an actuator, so that the thrust pins project at the period of casting the seed from the end nozzles.
    • 本发明的将种子从种子供给部的料斗中拉出到储料器中的由本发明的凝胶种子的装置被吸收头从贮存器吸收,并通过吸收头的移动被输送。 储料器包括振动器和振动板,其中振动板的一侧形成用于在其上存放种子的凹槽,并且振动板的另一侧与振动器连接,使得振动板上的种子被悬挂 通过振动器的振动。 止推销被可插拔地插入到吸收头的端部喷嘴中并且与致动器连接,使得止推销在从端部喷嘴浇铸晶种的期间突出。
    • 98. 发明授权
    • Testable LSI device incorporating latch/shift registers and method of
testing the same
    • 具有锁存/移位寄存器的可测试的LSI器件及其测试方法
    • US4912395A
    • 1990-03-27
    • US211043
    • 1988-06-24
    • Yoshio SatoToshifumi IshiiYasushi Kohno
    • Yoshio SatoToshifumi IshiiYasushi Kohno
    • G06F11/22G01R31/28G01R31/3185G11C29/32
    • G11C29/32G01R31/318566
    • A testable LSI chip incorporating memory blocks, such as RAM and ROM, and random logic circuitry, and a testing method thereof are disclosed. A front-stage peripheral logic circuit block and rear-stage peripheral logic circuit block connected to the input and output modes of a memory block are provided on their output side and input side, respectively, with the flip-flops in correspondence to the input and output nodes of the memory block. The flip-flops on the output side and flip-flops on the input side are each connected to form a shift register. In testing the front peripheral logic block, the test result is latched in the flip-flops on the output side and then the contents are shifted out for reading. In testing the rear-stage peripheral logic circuit block, a bit pattern for testing is shifted-in and latched in the flip-flops on the input side and then supplied to the rear-stage peripheral logic circuit block under test. The front and rear-stage peripheral logic circuit blocks are tested independently of the memory block.
    • 公开了一种包含诸如RAM和ROM的存储器块和随机逻辑电路的可测试的LSI芯片及其测试方法。 连接到存储器块的输入和输出模式的前级周边逻辑电路块和后级周边逻辑电路块分别在其输出侧和输入侧上与触发器对应于输入和 输出节点的内存块。 输出侧的触发器和输入侧的触发器各自连接形成移位寄存器。 在测试前端外设逻辑块时,将测试结果锁定在输出侧的触发器中,然后将内容移出以进行读取。 在测试后级周边逻辑电路块时,用于测试的位模式被插入并锁存在输入侧的触发器中,然后提供给被测试的后级外围逻辑电路块。 独立于存储块测试前级和后级外围逻辑电路块。