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91. 发明申请

US20140073119A1 DEFECT FREE STRAINED SILICON ON INSULATOR (SSOI) SUBSTRATES 有权
标题翻译：在绝缘子（SSOI）衬底上缺陷自由应变硅
公开(公告)号：US20140073119A1
公开(公告)日：2014-03-13
申请号：US13612675
申请日：2012-09-12
申请人： Stephen W. Bedell , Bahman Hekmatshoartabari , Devendra K. Sadana , Ghavam G. Shahidi , Davood Shahrjerdi
发明人： Stephen W. Bedell , Bahman Hekmatshoartabari , Devendra K. Sadana , Ghavam G. Shahidi , Davood Shahrjerdi
IPC分类号： H01L21/20
CPC分类号： H01L29/7847 , H01L21/02532 , H01L21/02581 , H01L21/0262 , H01L21/76254
摘要： A method of forming a strained semiconductor material that in one embodiment includes forming a cleave layer in a host semiconductor substrate, and contacting a strain inducing material layer on a surface of a transfer portion of the host semiconductor substrate. A handle substrate is then contacted to an exposed surface of the stress inducing material layer. The transfer portion of the host semiconductor substrate may then be separated from the host semiconductor substrate along the cleave layer. A dielectric layer is formed directly on the transfer portion of the host semiconductor substrate. The handle substrate and the stress inducing material are then removed, wherein the transferred portion of the host semiconductor substrate provides a strained semiconductor layer that is in direct contact with a dielectric layer.
摘要翻译：一种形成应变半导体材料的方法，其在一个实施方案中包括在主半导体衬底中形成切割层，并且在主半导体衬底的转移部分的表面上使应变诱导材料层接触。然后将手柄基板与应力诱导材料层的暴露表面接触。然后可以将主体半导体衬底的转移部分沿着切割层与主体半导体衬底分离。电介质层直接形成在主体半导体衬底的转移部分上。然后去除手柄衬底和应力诱导材料，其中主体半导体衬底的转移部分提供与电介质层直接接触的应变半导体层。

92. 发明申请

US20140070215A1 DEFECT FREE STRAINED SILICON ON INSULATOR (SSOI) SUBSTRATES 失效
公开(公告)号：US20140070215A1
公开(公告)日：2014-03-13
申请号：US13614308
申请日：2012-09-13
申请人： Stephen W. Bedell , Bahman Hekmatshoartabari , Devendra K. Sadana , Ghavam G. Shahidi , Davood Shahrjerdi
发明人： Stephen W. Bedell , Bahman Hekmatshoartabari , Devendra K. Sadana , Ghavam G. Shahidi , Davood Shahrjerdi
IPC分类号： H01L21/20 , H01L29/02 , H01L29/04
CPC分类号： H01L29/7847 , H01L21/02532 , H01L21/02581 , H01L21/0262 , H01L21/76254
摘要： A method of forming a strained semiconductor material that in one embodiment includes forming a cleave layer in a host semiconductor substrate, and contacting a strain inducing material layer on a surface of a transfer portion of the host semiconductor substrate. A handle substrate is then contacted to an exposed surface of the stress inducing material layer. The transfer portion of the host semiconductor substrate may then be separated from the host semiconductor substrate along the cleave layer. A dielectric layer is formed directly on the transfer portion of the host semiconductor substrate. The handle substrate and the stress inducing material are then removed, wherein the transferred portion of the host semiconductor substrate provides a strained semiconductor layer that is in direct contact with a dielectric layer.

93. 发明申请

US20130316538A1 SURFACE MORPHOLOGY GENERATION AND TRANSFER BY SPALLING 审中-公开
标题翻译：表面形态生成和转移
公开(公告)号：US20130316538A1
公开(公告)日：2013-11-28
申请号：US13478749
申请日：2012-05-23
申请人： Stephen W. Bedell , Keith E. Fogel , Augustin J. Hong , Ning Li , Devendra K. Sadana , Katherine L. Saenger , Davood Shahrjerdi , Kuen-Ting Shiu
发明人： Stephen W. Bedell , Keith E. Fogel , Augustin J. Hong , Ning Li , Devendra K. Sadana , Katherine L. Saenger , Davood Shahrjerdi , Kuen-Ting Shiu
IPC分类号： H01L21/304 , H01L21/306
CPC分类号： H01L21/304 , H01L31/02363 , Y02E10/50
摘要： The generation of surface patterns or the replication of surface patterns is achieved in the present disclosure without the need to employ an etching process. Instead, a unique fracture mode referred to as spalling is used in the present disclosure to generate or replicate surface patterns. In the case of surface pattern generation, a surface pattern is provided in a stressor layer and then spalling is performed. In the case of surface pattern replication, a surface pattern is formed within or on a surface of a base substrate, and then a stressor layer is applied. After applying the stressor layer, spalling is performed. Generation or replication of surface patterns utilizing spalling provides a low cost means for generation or replication of surface patterns.
摘要翻译：在本公开中实现表面图案的产生或表面图案的复制，而不需要采用蚀刻工艺。相反，在本公开中使用称为剥落的独特的断裂模式来生成或复制表面图案。在表面图案生成的情况下，在应力层中设置表面图案，然后进行剥离。在表面图案复制的情况下，在基底表面上或表面上形成表面图案，然后施加应力层。施加应力层后，进行剥落。利用剥落产生或复制表面图案为生成或复制表面图案提供了低成本的手段。

94. 发明申请

US20130316488A1 REMOVAL OF STRESSOR LAYER FROM A SPALLED LAYER AND METHOD OF MAKING A BIFACIAL SOLAR CELL USING THE SAME 有权
标题翻译：从粉末层去除压力层和使用其制造双极太阳能电池的方法
公开(公告)号：US20130316488A1
公开(公告)日：2013-11-28
申请号：US13481795
申请日：2012-05-26
申请人： Stephen W. Bedell , Keith E. Fogel , Bahman Hekmatshoartabari , Paul A. Lauro , Ning Li , Devendra K. Sadana , Ghavam G. Shahidi , Davood Shahrjerdi
发明人： Stephen W. Bedell , Keith E. Fogel , Bahman Hekmatshoartabari , Paul A. Lauro , Ning Li , Devendra K. Sadana , Ghavam G. Shahidi , Davood Shahrjerdi
IPC分类号： H01L31/02 , H01L21/302 , H01L21/762
CPC分类号： H01L31/0684 , H01L21/02002 , H01L31/1896 , Y02E10/547
摘要： A stressor layer used in a controlled spalling method is removed through the use of a cleave layer that can be fractured or dissolved. The cleave layer is formed between a host semiconductor substrate and the metal stressor layer. A controlled spalling process separates a relatively thin residual host substrate layer from the host substrate. Following attachment of a handle substrate to the residual substrate layer or other layers subsequently formed thereon, the cleave layer is dissolved or otherwise compromised to facilitate removal of the stressor layer. Such removal allows the fabrication of a bifacial solar cell.
摘要翻译：以受控剥落方式使用的应力层通过使用可以断裂或溶解的裂开层去除。在主体半导体衬底和金属应力层之间形成切割层。受控的剥落过程将相对薄的残余主体衬底层与主体衬底分离。在将手柄衬底附接到残留衬底层或随后在其上形成的其它层之后，解理层被溶解或以其他方式受到损害以便于去除应力层。这种去除允许制造双面太阳能电池。

95. 发明申请

US20130269860A1 TEMPERATURE-CONTROLLED DEPTH OF RELEASE LAYER 审中-公开
标题翻译：释放层的温度控制深度
公开(公告)号：US20130269860A1
公开(公告)日：2013-10-17
申请号：US13448939
申请日：2012-04-17
申请人： Maha M. Khayyat , Norma E. Sosa Cortes , Stephen W. Bedell , Keith E. Fogel , Devendra K. Sadana
发明人： Maha M. Khayyat , Norma E. Sosa Cortes , Stephen W. Bedell , Keith E. Fogel , Devendra K. Sadana
IPC分类号： B32B38/00 , B05D3/02
CPC分类号： B32B38/10 , B32B2457/14 , H01L21/02002 , H01L21/304 , H01L21/6836 , H01L31/1892 , Y02E10/50
摘要： A stressor layer is formed atop a base substrate at a first temperature which induces a first tensile stress in the base substrate that is below a fracture toughness of base substrate. The base substrate and the stressor layer are then brought to a second temperature which is less than the first temperature. The second temperature induces a second tensile stress in the stressor layer which is greater than the first tensile stress and which is sufficient to allow for spalling mode fracture to occur within the base substrate. The base substrate is spalled at the second temperature to form a spalled material layer. Spalling occurs at a fracture depth which is dependent upon the fracture toughness of the base substrate, stress level within the base substrate, and the second tensile stress of the stressor layer induced at the second temperature.
摘要翻译：在第一温度下在基底顶部形成应力层，该第一温度在基础基板中引起低于基底基板的断裂韧性的第一拉伸应力。然后使基底和应力层达到小于第一温度的第二温度。第二温度在应力层中引起第二拉伸应力，其大于第一拉伸应力，并且其足以允许在基底基底内发生剥落模式断裂。基底基板在第二温度下剥离以形成剥离的材料层。剥离发生在取决于基底的断裂韧性，基底衬底内的应力水平以及在第二温度下引起的应力层的第二拉伸应力的断裂深度。

96. 发明申请

US20130242627A1 MONOLITHIC HIGH VOLTAGE MULTIPLIER 有权
标题翻译：单相高压乘法器
公开(公告)号：US20130242627A1
公开(公告)日：2013-09-19
申请号：US13418921
申请日：2012-03-13
申请人： Stephen W. Bedell , Bahman Hekmatshoartabari , Devendra K. Sadana , Ghavam G. Shahidi , Davood Shahrjerdi
发明人： Stephen W. Bedell , Bahman Hekmatshoartabari , Devendra K. Sadana , Ghavam G. Shahidi , Davood Shahrjerdi
IPC分类号： H02M7/06 , G06F17/50
CPC分类号： H02M7/106 , H01L21/304 , H01L21/6835 , H01L29/0619 , H01L29/0634 , H01L29/2003 , H01L29/205 , H01L29/42316 , H01L29/7786 , H01L29/872 , H01L2221/6835 , H01L2221/68368 , Y02B70/1483
摘要： High voltage diode-connected gallium nitride high electron mobility transistor structures or Schottky diodes are employed in a network including high-k dielectric capacitors in a solid state, monolithic voltage multiplier. A superjunction formed by vertical p/n junctions in gallium nitride facilitates operation of the high electron mobility transistor structures and Schottky diodes. A design structure for designing, testing or manufacturing an integrated circuit is tangibly embodied in a machine-readable medium and includes elements of a solid state voltage multiplier.
摘要翻译：高压二极管连接的氮化镓高电子迁移率晶体管结构或肖特基二极管用于包括固态高分子电压倍增器的高k介质电容器的网络中。由氮化镓中的垂直p / n结形成的超结，有利于高电子迁移率晶体管结构和肖特基二极管的工作。用于设计，测试或制造集成电路的设计结构被有形地体现在机器可读介质中并且包括固态电压倍增器的元件。

97. 发明授权

US08476152B2 N-type carrier enhancement in semiconductors 失效
标题翻译：半导体中的N型载流子增强
公开(公告)号：US08476152B2
公开(公告)日：2013-07-02
申请号：US13436850
申请日：2012-03-31
申请人： Jee Hwan Kim , Stephen W. Bedell , Siegfried Maurer , Devendra K. Sadana
发明人： Jee Hwan Kim , Stephen W. Bedell , Siegfried Maurer , Devendra K. Sadana
IPC分类号： H01L21/265
CPC分类号： H01L21/26513 , H01L29/165 , H01L29/167 , H01L29/66636 , Y10S438/919
摘要： A method includes epitaxially growing a germanium (Ge) layer onto a Ge substrate and incorporating a compensating species with a compensating atomic radius into the Ge layer. The method includes implanting an n-type dopant species with a dopant atomic radius into the Ge layer. The method includes selecting the n-type dopant species and the compensating species in such manner that the size of the Ge atomic radius is inbetween the n-type dopant atomic radius and the compensating atomic radius.
摘要翻译：一种方法包括将锗（Ge）层外延生长到Ge衬底上并将具有补偿原子半径的补偿物质结合到Ge层中。该方法包括将具有掺杂剂原子半径的n型掺杂物种类植入到Ge层中。该方法包括选择n型掺杂剂物质和补偿物质，使得Ge原子半径的大小在n型掺杂剂原子半径和补偿原子半径之间。

98. 发明申请

US20130095598A1 BACK-SURFACE FIELD STRUCTURES FOR MULTI-JUNCTION III-V PHOTOVOLTAIC DEVICES 审中-公开
公开(公告)号：US20130095598A1
公开(公告)日：2013-04-18
申请号：US13602122
申请日：2012-09-01
申请人： Stephen W. Bedell , Bahman Hekmatshoar-Tabari , Devendra K. Sadana , Ghavam G. Shahidi , Davood Shahrjerdi
发明人： Stephen W. Bedell , Bahman Hekmatshoar-Tabari , Devendra K. Sadana , Ghavam G. Shahidi , Davood Shahrjerdi
IPC分类号： H01L31/18
CPC分类号： H01L31/0725 , H01L31/0693 , H01L31/1808 , Y02E10/544 , Y02P70/521
摘要： A multi-junction III-V photovoltaic device is provided that includes at least one top cell comprised of at least one III-V compound semiconductor material; and a bottom cell in contact with a surface of the at least one top cell. The bottom cell includes a germanium-containing layer in contact with the at least one top cell, at least one intrinsic hydrogenated silicon-containing layer in contact with a surface of the germanium-containing layer, and at least one doped hydrogenated silicon-containing layer in contact with a surface of the at least one intrinsic hydrogenated silicon-containing layer. The intrinsic and doped silicon-containing layers can be amorphous, nano/micro-crystalline, poly-crystalline or single-crystalline.

99. 发明申请

US20130025659A1 MULTI-JUNCTION PHOTOVOLTAIC DEVICE AND FABRICATION METHOD 有权
公开(公告)号：US20130025659A1
公开(公告)日：2013-01-31
申请号：US13612632
申请日：2012-09-12
申请人： Stephen W. Bedell , Keith E. Fogel , Bahman Hekmatshoar-Tabari , Devendra K. Sadana , Ghavam G. Shahidi , Davood Shahrjerdi
发明人： Stephen W. Bedell , Keith E. Fogel , Bahman Hekmatshoar-Tabari , Devendra K. Sadana , Ghavam G. Shahidi , Davood Shahrjerdi
IPC分类号： H01L31/0725
CPC分类号： H01L31/1892 , H01L31/02167 , H01L31/0687 , H01L31/0725 , H01L31/0747 , H01L31/076 , H01L31/1808 , H01L31/1812 , Y02E10/544 , Y02E10/548 , Y02P70/521
摘要： A method of forming a photovoltaic device that includes bonding a substrate to a germanium-containing semiconductor layer with a stressor layer, wherein the stressor layer cleaves the germanium-containing semiconductor layer. At least one semiconductor layer is formed on a cleaved surface of the germanium-containing semiconductor layer that is opposite the conductivity type of the germanium-containing semiconductor layer to provide a first solar cell. The first solar cell absorbs a first range of wavelengths. At least one second solar cell may be formed on the first solar cell, wherein the at least one second solar cell is composed of at least one semiconductor material to absorb a second range of wavelengths that is different than the first range wavelengths absorbed by the first solar cell.

100. 发明申请

US20120322227A1 METHOD FOR CONTROLLED LAYER TRANSFER 有权
标题翻译：控制层转移方法
公开(公告)号：US20120322227A1
公开(公告)日：2012-12-20
申请号：US13159893
申请日：2011-06-14
申请人： Stephen W. Bedell , Keith E. Fogel , Paul A. Lauro , Devendra K. Sadana
发明人： Stephen W. Bedell , Keith E. Fogel , Paul A. Lauro , Devendra K. Sadana
IPC分类号： H01L21/30
CPC分类号： H01L21/304 , H01L31/1896 , Y02E10/50 , Y02P80/30
摘要： A method of controlled layer transfer is provided. The method includes providing a stressor layer to a base substrate. The stressor layer has a stressor layer portion located atop an upper surface of the base substrate and a self-pinning stressor layer portion located adjacent each sidewall edge of the base substrate. A spalling inhibitor is then applied atop the stressor layer portion of the base substrate, and thereafter the self-pinning stressor layer portion of the stressor layer is decoupled from the stressor layer portion. A portion of the base substrate that is located beneath the stressor layer portion is then spalled from the original base substrate. The spalling includes displacing the spalling inhibitor from atop the stressor layer portion. After spalling, the stressor layer portion is removed from atop a spalled portion of the base substrate.
摘要翻译：提供了一种受控层转移的方法。该方法包括向基底基底提供应力层。应力层具有位于基底基板的上表面顶部的应力层，以及位于基底基板的每个侧壁边缘附近的自锁紧应力层。然后将剥落抑制剂施加在基底衬底的应力层部分的顶部，然后将应力层的自锁定应力层部分与应力层部分分离。位于应力层部分之下的基底部分的一部分然后从原始基底剥离。剥落包括从应力层部分顶部置换剥落抑制剂。剥落后，从基底基板的剥离部的顶部除去应力层。

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