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91. 发明授权

US08138527B2 Transistor and semiconductor device 有权
标题翻译：晶体管和半导体器件
公开(公告)号：US08138527B2
公开(公告)日：2012-03-20
申请号：US12309244
申请日：2007-07-12
申请人： Tadahiro Ohmi , Akinobu Teramoto , Rihito Kuroda
发明人： Tadahiro Ohmi , Akinobu Teramoto , Rihito Kuroda
IPC分类号： H01L27/148
CPC分类号： H01L27/1203 , H01L21/28202 , H01L29/518 , H01L29/78654 , H01L29/78696
摘要： An accumulation mode transistor has an impurity concentration of a semiconductor layer in a channel region at a value higher than 2×1017 cm−3 to achieve a large gate voltage swing.
摘要翻译：累积模式晶体管的沟道区域中的半导体层的杂质浓度高于2×1017cm-3，以实现大的栅极电压摆动。

92. 发明授权

US08114245B2 Plasma etching device 失效
标题翻译：等离子体蚀刻装置
公开(公告)号：US08114245B2
公开(公告)日：2012-02-14
申请号：US10304869
申请日：2002-11-26
申请人： Tadahiro Ohmi , Masaki Hirayama , Haruyuki Takano , Yusuke Hirayama
发明人： Tadahiro Ohmi , Masaki Hirayama , Haruyuki Takano , Yusuke Hirayama
IPC分类号： C23F1/00 , H01L21/306 , C23C16/509 , C23C16/52 , C23C16/505 , C23C16/22 , C23C16/06
CPC分类号： H01J37/32623 , H01J37/32082 , H01J37/3266
摘要： A plasma etching device which has an auxiliary electrode enabling realization of a uniform plasma density of generated plasma on the surface of a base and which enables uniform etching with respect to the base without depending upon pressure and without rotating a magnetic field applying means. The plasma etching device has magnetic field applying means which has two parallel plate electrodes I and II and RF power applying means, with the base set on the electrode I, and which is horizontal and unidirectional with respect to the surface of the base where plasma etching is carried out. In this plasma etching device, an auxiliary electrode is provided at least on the upstream side of the base in a flow of electron current generated by the magnetic field applying means. The auxiliary electrode includes a local electrode arranged on the side facing the electrode II and means for adjusting impedance provided at a part of the local electrode to be electrically connected with the electrode I.
摘要翻译：一种等离子体蚀刻装置，其具有能够实现基底表面上产生的等离子体的均匀等离子体密度的辅助电极，并且能够相对于基座进行均匀蚀刻而不依赖于压力而不旋转磁场施加装置。等离子体蚀刻装置具有磁场施加装置，其具有两个平行板电极I和II以及RF功率施加装置，其基极设置在电极I上，并且相对于基板的表面是水平和单向的，其中等离子体蚀刻完成了。在该等离子体蚀刻装置中，在由磁场施加装置产生的电流的流动中，至少在基座的上游侧设置有辅助电极。辅助电极包括布置在面向电极II的一侧的局部电极和用于调节局部电极的一部分以与电极I电连接的阻抗的装置。

93. 发明授权

US08047225B2 Method for water hammerless opening of fluid passage, and method for supplying chemical solutions and device for water hammerless opening for which the method is used 有权
标题翻译：流体通道的无水锤打开方法，以及用于提供化学溶液的方法和使用该方法的无水锤打开装置
公开(公告)号：US08047225B2
公开(公告)日：2011-11-01
申请号：US12422136
申请日：2009-04-10
申请人： Tadahiro Ohmi , Kouji Nishino , Masaaki Nagase , Ryousuke Dohi , Nobukazu Ikeda , Ryutaro Nishimura
发明人： Tadahiro Ohmi , Kouji Nishino , Masaaki Nagase , Ryousuke Dohi , Nobukazu Ikeda , Ryutaro Nishimura
IPC分类号： F16K31/42
CPC分类号： F16K47/02 , Y10T137/0324 , Y10T137/0396 , Y10T137/7761 , Y10T137/7762 , Y10T137/7842 , Y10T137/86389 , Y10T137/86397 , Y10T137/86461
摘要： The water hammerless opening device comprises an actuator operating type valve installed on the fluid passage, an electro-pneumatic conversion device to supply the 2-step actuator operating pressure Pa to the afore-mentioned actuator operating type valve, a vibration sensor removably fixed to the pipe passage on the upstream side of the actuator operating type valve, and a tuning box to which the vibration detecting signal Pr detected by the vibration sensor is inputted, through which the control signal Sc to control the step operating pressure Ps′ of the afore-mentioned 2-step actuator operating pressure Pa is outputted to the electro-pneumatic conversion device, and with which the 2-step actuator operating pressure Pa, of the step operating pressure Ps′ which makes the vibration detecting signal Pr nearly zero, is outputted from the electro-pneumatic conversion by adjusting the control signal Sc.
摘要翻译：无水锤打开装置包括安装在流体通道上的致动器操作型阀，向上述致动器操作型阀提供2级致动器操作压力Pa的电动气动转换装置，可拆卸地固定到在致动器操作型阀的上游侧的管道通道和输入了由振动传感器检测到的振动检测信号Pr的调谐箱，通过该调谐箱控制控制信号Sc以控制前述的操作压力Ps' 将上述的2步执行器工作压力Pa输出到电动气动变换装置，将使振动检测信号Pr接近零的阶梯操作压力Ps'的2级致动器工作压力Pa'从通过调节控制信号Sc进行电 - 气转换。

94. 发明申请

US20110198702A1 Contact Formation Method, Semiconductor Device Manufacturing Method, and Semiconductor Device 有权
标题翻译：触点形成方法，半导体器件制造方法和半导体器件
公开(公告)号：US20110198702A1
公开(公告)日：2011-08-18
申请号：US13126249
申请日：2009-10-23
申请人： Tadahiro Ohmi , Akinobu Teramoto , Tatsunori Isogai , Hiroaki Tanaka
发明人： Tadahiro Ohmi , Akinobu Teramoto , Tatsunori Isogai , Hiroaki Tanaka
IPC分类号： H01L27/092 , H01L21/28 , H01L23/52 , H01L29/78
CPC分类号： H01L21/823814 , H01L21/28079 , H01L21/28518 , H01L21/823835 , H01L27/092 , H01L29/41733 , H01L29/458 , H01L29/4958 , H01L29/66772 , H01L29/7833 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device manufacturing method which achieves a contact of a low resistivity is provided.In a state where a first metal layer in contact with a semiconductor is covered with a second metal layer for preventing oxidation, only the first metal layer is silicided to form a silicide layer with no oxygen mixed therein. As a material of the first metal layer, a metal having a work function difference of a predetermined value from the semiconductor is used. As a material of the second metal layer, a metal which does not react with the first metal layer at an annealing temperature is used.
摘要翻译：提供了实现低电阻率的接触的半导体器件制造方法。在与半导体接触的第一金属层被用于防止氧化的第二金属层覆盖的状态下，仅将第一金属层硅化以形成不混合氧的硅化物层。作为第一金属层的材料，使用与半导体具有预定值的功函数差的金属。作为第二金属层的材料，使用在退火温度下不与第一金属层反应的金属。

95. 发明申请

US20110186425A1 MAGNETRON SPUTTERING METHOD, AND MAGNETRON SPUTTERING APPARATUS 审中-公开
标题翻译： MAGNETRON溅射方法和MAGNETRON SPUTTERING装置
公开(公告)号：US20110186425A1
公开(公告)日：2011-08-04
申请号：US12999985
申请日：2009-06-17
申请人： Tadahiro Ohmi , Tetsuya Goto , Nobuaki Seki , Satoru Kawakami , Takaaki Matsuoka
发明人： Tadahiro Ohmi , Tetsuya Goto , Nobuaki Seki , Satoru Kawakami , Takaaki Matsuoka
IPC分类号： C23C14/35
CPC分类号： C23C14/35 , H01J37/3405 , H01J37/3423
摘要： A sputtering method includes disposing a plurality of thin and long deposition regions such that the thin and long deposition regions each cross in a first direction a circular reference region having a diameter equal to that of a semiconductor wafer, and are arranged at predetermined intervals in a second direction perpendicular to the first direction; disposing one of the plurality of thin and long deposition regions such that one side of sides thereof extending in the first direction passes through a substantial center of the circular reference region; disposing another of the plurality of thin and long deposition regions such that one side of sides thereof extending in the first direction passes through a substantial edge of the circular reference region; setting each of widths of the plurality of thin and long deposition regions such that a value obtained by summing the widths of the plurality of thin and long deposition regions in the second direction is substantially equal to a radius of the circular reference region; disposing a plurality of thin and long targets to face the corresponding thin and long deposition regions such that sputtering particles emitted from the plurality of thin and long targets are incident on the corresponding thin and long deposition regions; disposing a semiconductor wafer, while overlapping with the circular reference region; confining a plasma generated by a magnetron discharge in the vicinity of the targets, and emitting the sputtering particles from the targets; and rotating the semiconductor wafer at a predetermined rotation speed by using a normal line passing through the center of the circular reference region as a rotation central axis, to deposit a film on a surface of the semiconductor wafer.
摘要翻译：溅射方法包括设置多个薄且长的沉积区域，使得薄且长的沉积区域各自在第一方向上与具有与半导体晶片的直径相等的直径的圆形参考区域交叉，并且以预定间隔布置在第二方向垂直于第一方向; 设置所述多个薄且长的沉积区域中的一个，使得其沿着所述第一方向延伸的侧面的一侧穿过所述圆形参考区域的大致中心; 设置多个薄且长的沉积区域中的另一个，使得其沿着第一方向延伸的侧面的一侧通过圆形参考区域的实质边缘; 设置多个薄和长沉积区域的宽度，使得通过将第二方向上的多个薄沉积区域和长沉积区域的宽度求和而获得的值基本上等于圆形参考区域的半径; 设置多个薄且长的靶以面对相应的薄和长沉积区域，使得从多个薄且长的靶发射的溅射颗粒入射到相应的薄和长的沉积区域; 在与圆形参考区域重叠的同时设置半导体晶片; 限制在靶附近由磁控管放电产生的等离子体，并从靶中发射溅射粒子; 并且通过使用通过圆形基准区域的中心的法线作为旋转中心轴以预定转速旋转半导体晶片，以在半导体晶片的表面上沉积膜。

96. 发明申请

US20110127075A1 INTERLAYER INSULATING FILM, WIRING STRUCTURE, AND METHODS OF MANUFACTURING THE SAME 审中-公开
标题翻译：层间绝缘膜，接线结构及其制造方法
公开(公告)号：US20110127075A1
公开(公告)日：2011-06-02
申请号：US12673543
申请日：2008-08-14
申请人： Tadahiro Ohmi , Takaaki Matsuoka , Atsutoshi Inokuchi , Kohei Watanuki , Tadashi Koike , Tatsuhiko Adachi
发明人： Tadahiro Ohmi , Takaaki Matsuoka , Atsutoshi Inokuchi , Kohei Watanuki , Tadashi Koike , Tatsuhiko Adachi
IPC分类号： H05K1/11 , H05K3/46 , H05K3/36 , H05K1/00
CPC分类号： H01L23/5329 , H01L21/0212 , H01L21/02126 , H01L21/022 , H01L21/02274 , H01L21/02304 , H01L21/02362 , H01L21/3121 , H01L21/316 , H01L21/76807 , H01L21/76819 , H01L21/76829 , H01L21/76832 , H01L21/76835 , H01L21/7684 , H01L21/76897 , H01L23/53238 , H01L23/53295 , H01L2924/0002 , H01L2924/00
摘要： An insulative coat film comprising one or two or more kinds of oxides having a dielectric constant (k) of 2.5 or smaller and expressed by a general formula of ((CH3)nSiO2-n/2)x(SiO2)1-x (where n=1 to 3, x≦1) is used to form an interlayer insulation film. The insulative coat film applied by spin-coating is flat without reflecting underlying unevenness, and the heat-treated film has surface roughness of 1 nm or less in Ra and 20 nm or less in a P-V value. The interlayer insulation film containing the insulative coat film can have a wiring structure and an electrode formed only by etching without need of a CMP process.
摘要翻译：包含介电常数（k）为2.5或更小并由通式（（CH 3）n SiO 2 -n / 2）x（SiO 2）1-x表示的一种或两种以上的氧化物的绝缘涂膜，其中 n = 1〜3，x＆lt; 1; 1）用于形成层间绝缘膜。通过旋涂施加的绝缘涂膜是平坦的，没有反射下面的不均匀，并且热处理膜在Ra中的表面粗糙度为1nm以下，P-V值为20nm以下。包含绝缘涂膜的层间绝缘膜可以具有布线结构和仅通过蚀刻形成的电极，而不需要CMP工艺。

97. 发明授权

US07935385B2 Metal material having formed thereon chromium oxide passive film and method for producing the same, and parts contacting with fluid and system for supplying fluid and exhausting gas 失效
标题翻译：在其上形成有氧化铬钝化膜的金属材料及其制造方法，以及与流体接触的部件和用于供应流体和排出气体的系统
公开(公告)号：US07935385B2
公开(公告)日：2011-05-03
申请号：US10646855
申请日：2003-08-21
申请人： Tadahiro Ohmi , Yasuyuki Shirai , Nobukazu Ikeda , Eiji Ideta , Akihiro Morimoto , Tetsutaro Ogushi , Takehisa Konishi
发明人： Tadahiro Ohmi , Yasuyuki Shirai , Nobukazu Ikeda , Eiji Ideta , Akihiro Morimoto , Tetsutaro Ogushi , Takehisa Konishi
IPC分类号： B05D3/02 , B05D3/04 , C25D5/50
CPC分类号： C23C8/02 , C23C26/00 , Y10T428/24322 , Y10T428/24355 , Y10T428/31678
摘要： The object of the present invention is to form a chromium-oxide film excellent in corrosion resistance without containing an oxide film of other metal onto the optional metallic material. The chromium-oxide passivation film excellent in corrosion resistance without containing the oxide film of other metal can be formed inexpensively and in a short time, and a fluid supplying system for supplying fluid hard in corrosivity in safety is able to be provided. This invention comprises a step of forming the passivation film consisting of a chromium oxide by giving heat treatment in an oxidizing atmosphere after coating chromium on metallic material of which surface roughness (Ra) of a coat surface is not more than 1.5 μm
摘要翻译：本发明的目的是在不含任何金属材料的其它金属的氧化物膜的情况下，形成耐腐蚀性优异的氧化铬膜。能够廉价且短时间地形成不含有其他金属的氧化物膜的耐腐蚀性优异的氧化铬钝化膜，能够提供安全的腐蚀性难以供给流体的流体供给系统。本发明包括以下步骤：在涂覆表面的粗糙度（Ra）不大于1.5μm的金属材料上涂覆铬后，在氧化气氛中进行热处理，形成由氧化铬组成的钝化膜

98. 发明授权

US07893537B2 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US07893537B2
公开(公告)日：2011-02-22
申请号：US11795308
申请日：2006-01-17
申请人： Tadahiro Ohmi , Akinobu Teramoto
发明人： Tadahiro Ohmi , Akinobu Teramoto
IPC分类号： H01L23/48
CPC分类号： H01L29/4983 , H01L21/76224 , H01L21/76829 , H01L21/76835 , H01L21/823481 , H01L23/3171 , H01L29/66575 , H01L29/78 , H01L2924/0002 , H01L2924/00
摘要： At least part of an element isolation region, an interlayer insulating film, and a protection insulating film, other than a gate insulating film (silicon oxide film), is formed of carbon fluoride (CFx, 0.3
摘要翻译：由氟化碳（CFx，0.3

99. 发明申请

US20110034037A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE AND METHOD FOR CLEANING SEMICONDUCTOR SUBSTRATE 有权
标题翻译：用于制造半导体器件的方法和用于清洁半导体衬底的方法
公开(公告)号：US20110034037A1
公开(公告)日：2011-02-10
申请号：US12988007
申请日：2009-04-10
申请人： Tadahiro Ohmi , Akinobu Teramoto , Rui Hasebe , Masayuki Miyashita
发明人： Tadahiro Ohmi , Akinobu Teramoto , Rui Hasebe , Masayuki Miyashita
IPC分类号： H01L21/469 , B08B3/00
CPC分类号： H01L21/02052 , H01L21/02054 , H01L21/0206 , Y10S438/906
摘要： Disclosed is a method for cleaning a semiconductor substrate that can solve a problem of a conventional cleaning method which should include at least five steps for cleaning a substrate such as a semiconductor substrate. The method for cleaning a semiconductor substrate comprises a first step of cleaning a substrate with ultrapure water containing ozone, a second step of cleaning the substrate with ultrapure water containing a surfactant, and a third step of removing an organic compound derived from the surfactant, with a cleaning liquid containing ultrapure water and 2-propanol. After the third step, plasma of noble gas such as krypton is applied to the substrate to further remove the organic compound derived from the surfactant.
摘要翻译：公开了一种能够解决现有的清洗方法的问题的半导体基板的清洗方法，该清洗方法应至少包括五个步骤，用于清洗半导体基板等基板。用于清洗半导体衬底的方法包括用含有臭氧的超纯水清洗衬底的第一步骤，用含有表面活性剂的超纯水清洗衬底的第二步骤以及从表面活性剂中除去有机化合物的第三步骤，含有超纯水和2-丙醇的清洗液。在第三步之后，将诸如氪的惰性气体的等离子体施加到基底上以进一步除去源自表面活性剂的有机化合物。

100. 发明授权

US07820558B2 Semiconductor device and method of producing the semiconductor device 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US07820558B2
公开(公告)日：2010-10-26
申请号：US11812807
申请日：2007-06-21
申请人： Tadahiro Ohmi , Akinobu Teramoto , Koutaro Tanaka
发明人： Tadahiro Ohmi , Akinobu Teramoto , Koutaro Tanaka
IPC分类号： H01L21/31 , H01L29/76
CPC分类号： H01L29/7802 , H01J37/32192 , H01L21/049 , H01L29/1608 , H01L29/518 , H01L29/6606 , H01L29/66068
摘要： A film with small hysteresis and high voltage resistance is obtained by reducing the carbon content in a gate insulating film on a SiC substrate. Specifically, the carbon content in the gate insulating film is set to 1×1020 atoms/cm3 or less. For this, using a plasma processing apparatus, a silicon oxide film is formed on the SiC substrate and then the formed silicon oxide film is reformed by exposure to radicals containing nitrogen atoms. Thus, the gate insulating film excellent in electrical properties is obtained.
摘要翻译：通过降低SiC衬底上的栅极绝缘膜中的碳含量，获得具有小滞后和高耐电压性的膜。具体地，将栅极绝缘膜中的碳含量设定为1×1020原子/ cm3以下。为此，使用等离子体处理装置，在SiC衬底上形成氧化硅膜，然后通过暴露于含有氮原子的基团将形成的氧化硅膜重整。因此，获得了电性能优异的栅极绝缘膜。

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