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    • 92. 发明申请
    • Techniques for Data Prefetching Using Indirect Addressing with Offset
    • 使用偏移量进行间接寻址的数据预取技术
    • US20090198904A1
    • 2009-08-06
    • US12024246
    • 2008-02-01
    • Ravi K. ArimilliBalaram SinharoyWilliam E. SpeightLixin Zhang
    • Ravi K. ArimilliBalaram SinharoyWilliam E. SpeightLixin Zhang
    • G06F12/08
    • G06F12/0862G06F12/1045G06F2212/6028
    • A technique for performing data prefetching using indirect addressing includes determining a first memory address of a pointer associated with a data prefetch instruction. Content, that is included in a first data block (e.g., a first cache line) of a memory, at the first memory address is then fetched. An offset is then added to the content of the memory at the first memory address to provide a first offset memory address. A second memory address is then determined based on the first offset memory address. A second data block (e.g., a second cache line) that includes data at the second memory address is then fetched (e.g., from the memory or another memory). A data prefetch instruction may be indicated by a unique operational code (opcode), a unique extended opcode, or a field (including one or more bits) in an instruction.
    • 使用间接寻址执行数据预取的技术包括确定与数据预取指令相关联的指针的第一存储器地址。 然后取出包含在第一存储器地址的存储器的第一数据块(例如,第一高速缓存行)中的内容。 然后将偏移量添加到第一存储器地址处的存储器的内容以提供第一偏移存储器地址。 然后基于第一偏移存储器地址确定第二存储器地址。 包括第二存储器地址上的数据的第二数据块(例如,第二高速缓存行)然后被取出(例如,从存储器或另一个存储器)。 数据预取指令可以由指令中的唯一操作代码(操作码),唯一扩展操作码或字段(包括一个或多个位)来指示。
    • 93. 发明申请
    • Isotactic 3, 4-isoprene-based polymer
    • 全异戊二烯基异戊二烯基聚合物
    • US20070179260A1
    • 2007-08-02
    • US10591322
    • 2005-03-04
    • Zhaomin HouLixin Zhang
    • Zhaomin HouLixin Zhang
    • C08F4/06C08F4/44
    • C08F136/08C08F4/54C08F4/52
    • The present invention provides 3,4-isoprene-based polymer with high regioregularity, in particular high tacticity. Specifically, the present invention provides an isoprene-based polymer, including a structural unit represented by Formula (I) in Claims, wherein the isotacticity of an arrangement of the structural units is 99% mmmm or more in terms of pentad content. Further, the present invention provides a production method for the isoprene-based polymer, which comprises polymerizing an isoprene-based compound in the presence of a polymerization catalyst containing a complex represented by the following Formula (A) in Claims.
    • 本发明提供了具有高定向性,特别是高立构规整度的3,4-异戊二烯类聚合物。 具体地说,本发明提供了一种异戊二烯类聚合物,其包括由权利要求中的式(I)表示的结构单元,其中结构单元的排列的全同立构规整度为五元组含量为99%mm以上。 此外,本发明提供了一种异戊二烯类聚合物的制造方法,其包括在含有权利要求中的下述通式(A)所示的络合物的聚合催化剂的存在下使异戊二烯系化合物聚合。
    • 98. 发明授权
    • Predication supporting code generation by indicating path associations of symmetrically placed write instructions
    • 通过指示对称放置的写指令的路径关联来支持代码生成的预测
    • US09262140B2
    • 2016-02-16
    • US12123083
    • 2008-05-19
    • Ram RanganMark W. StephensonLixin Zhang
    • Ram RanganMark W. StephensonLixin Zhang
    • G06F9/45
    • G06F8/4451
    • A predication technique for out-of-order instruction processing provides efficient out-of-order execution with low hardware overhead. A special op-code demarks unified regions of program code that contain predicated instructions that depend on the resolution of a condition. Field(s) or operand(s) associated with the special op-code indicate the number of instructions that follow the op-code and also contain an indication of the association of each instruction with its corresponding conditional path. Each conditional register write in a region has a corresponding register write for each conditional path, with additional register writes inserted by the compiler if symmetry is not already present, forming a coupled set of register writes. Therefore, a unified instruction stream can be decoded and dispatched with the register writes all associated with the same re-name resource, and the conditional register write is resolved by executing the particular instruction specified by the resolved condition.
    • 用于无序指令处理的预测技术提供了低硬件开销的有效的无序执行。 一个特殊的操作代码区分了程序代码的统一区域,其中包含依赖于条件分辨率的预测指令。 与特殊操作码相关联的字段或操作数指示操作码后面的指令数,并且还包含每个指令与其对应条件路径的关联的指示。 区域中的每个条件寄存器写入对于每个条件路径都有相应的寄存器写入,如果对称性尚未存在,编译器插入附加的寄存器写入,形成一组寄存器写操作。 因此,统一的指令流可以使用与相同重名资源相关联的寄存器写入进行解码和分派,并且通过执行由解析条件指定的特定指令来解决条件寄存器写入。