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91. 发明申请

US20080085584A1 OXIDATION/HEAT TREATMENT METHODS OF MANUFACTURING NON-VOLATILE MEMORY DEVICES 审中-公开
标题翻译：制造非易失性存储器件的氧化/热处理方法
公开(公告)号：US20080085584A1
公开(公告)日：2008-04-10
申请号：US11857824
申请日：2007-09-19
申请人： Young-Jin Noh , Chul-Sung Kim , Si-Young Choi , Bon-Young Koo , Ki-Hyun Hwang , Sung-Kweon Baek
发明人： Young-Jin Noh , Chul-Sung Kim , Si-Young Choi , Bon-Young Koo , Ki-Hyun Hwang , Sung-Kweon Baek
IPC分类号： H01L21/336
CPC分类号： H01L21/28247 , H01L29/40114
摘要： Methods of manufacturing non-volatile memory devices are disclosed which may at least partially cure etch damage and may at least partially remove defect sites in gate structures of the devices caused during manufacturing of the devices. An exemplary method of manufacturing a non-volatile memory device includes forming a gate structure on a substrate, the gate structure including a control gate electrode, a blocking layer pattern, a floating gate electrode, and a tunnel insulating layer pattern. An oxidation process is performed that at least partially cures damage caused to the substrate and to the gate structure during formation of the gate structure. A first heat treatment is performed under a gas atmosphere including nitrogen to at least partially remove defect sites on the gate structure caused by the oxidation process. A second heat treatment is performed under a gas atmosphere including chlorine to at least partially remove remaining defect sites on the gate structure caused by the oxidation process.
摘要翻译：公开了制造非易失性存储器件的方法，其可以至少部分地固化蚀刻损伤，并且可以至少部分地去除在器件的制造期间引起的器件的栅极结构中的缺陷位置。制造非易失性存储器件的示例性方法包括在衬底上形成栅极结构，栅极结构包括控制栅电极，阻挡层图案，浮栅电极和隧道绝缘层图案。进行氧化处理，其至少部分地固化在栅极结构形成期间对衬底和栅极结构的损伤。在包括氮气的气体气氛下进行第一热处理，以至少部分地去除由氧化过程引起的栅极结构上的缺陷部位。在包括氯的气体气氛下进行第二热处理，以至少部分地去除由氧化过程引起的栅极结构上的剩余缺陷部位。

92. 发明申请

US20070066083A1 Method of forming a silicon-rich nanocrystalline structure by an atomic layer deposition process and method of manufacturing a non-volatile semiconductor device using the same 有权
标题翻译：通过原子层沉积工艺形成富硅纳米晶体结构的方法和使用其制造非易失性半导体器件的方法
公开(公告)号：US20070066083A1
公开(公告)日：2007-03-22
申请号：US11494451
申请日：2006-07-28
申请人： Sang-Ryol Yang , Kyong-Hee Joo , In-Seok Yeo , Ki-Hyun Hwang , Seung-Hyun Lim
发明人： Sang-Ryol Yang , Kyong-Hee Joo , In-Seok Yeo , Ki-Hyun Hwang , Seung-Hyun Lim
IPC分类号： H01L21/31 , H01L21/469 , H01L21/4763
CPC分类号： H01L21/02164 , B82Y10/00 , C23C16/308 , C23C16/401 , C23C16/45529 , H01L21/0214 , H01L21/02211 , H01L21/0228 , H01L21/02337 , H01L21/28273 , H01L21/3141 , H01L21/32055 , H01L29/42328 , Y10S438/962
摘要： In a method of forming a silicon-rich nanocrystalline structure by an ALD process, a first gas including a first silicon compound is provided onto an object to form a silicon-rich chemisorption layer on the object. A second gas including oxygen is provided onto the silicon-rich chemisorption layer to form a silicon-rich insulation layer on the object. A third gas including a second silicon compound is provided onto the silicon-rich insulation layer to form a silicon nanocrystalline layer on the silicon-rich insulation layer. The first gas, the second gas and the third gas may be repeatedly provided to alternately form the silicon-rich nanocrystalline structure having a plurality of silicon-rich insulation layers and a plurality of silicon nanocrystalline layers on the object.
摘要翻译：在通过ALD工艺形成富含硅的纳米晶体结构的方法中，将包含第一硅化合物的第一气体提供到物体上以在物体上形成富含硅的化学吸附层。在富含硅的化学吸附层上提供包含氧的第二气体，以在物体上形成富含硅的绝缘层。在富硅绝缘层上提供包括第二硅化合物的第三气体，以在富硅绝缘层上形成硅纳米晶层。可以重复地提供第一气体，第二气体和第三气体以交替地形成在物体上具有多个富硅绝缘层和多个硅纳米晶层的富含硅的纳米晶体结构。

93. 发明申请

US20070042573A1 Methods of Forming Conductive Polysilicon Thin Films Via Atomic Layer Deposition and Methods of Manufacturing Semiconductor Devices Including Such Polysilicon Thin Films 有权
标题翻译：通过原子层沉积形成导电多晶硅薄膜的方法和制造包括这种多晶硅薄膜的半导体器件的方法
公开(公告)号：US20070042573A1
公开(公告)日：2007-02-22
申请号：US11421111
申请日：2006-05-31
申请人： Jin-Gyun Kim , Ki-Hyun Hwang , Jin-Tae Noh , Hong-Suk Kim , Sung-Hae Lee
发明人： Jin-Gyun Kim , Ki-Hyun Hwang , Jin-Tae Noh , Hong-Suk Kim , Sung-Hae Lee
IPC分类号： H01L21/20
CPC分类号： H01L27/11521 , C23C16/24 , C23C16/45527 , H01L21/02532 , H01L21/02576 , H01L21/02579 , H01L21/0262 , H01L21/28273 , H01L21/28525 , H01L27/115 , H01L29/66825
摘要： A method of forming a conductive polysilicon thin film and a method of manufacturing a semiconductor device using the same are provided. The method of forming a conductive polysilicon thin film may comprise simultaneously supplying a Si precursor having halogen elements as a first reactant and a dopant to a substrate to form a first reactant adsorption layer that is doped with impurities on the substrate and then supplying a second reactant having H (hydrogen) to the first reactant adsorption layer to react the H of the second reactant with the halogen elements of the first reactant to form a doped Si atomic layer on the substrate.
摘要翻译：提供一种形成导电多晶硅薄膜的方法和使用其制造半导体器件的方法。形成导电多晶硅薄膜的方法可以包括同时向衬底提供具有卤素元素的Si前体作为第一反应物和掺杂剂以形成在衬底上掺杂杂质的第一反应物吸附层，然后提供第二反应物对第一反应物吸附层具有H（氢）以使第二反应物的H与第一反应物的卤素元素反应，以在衬底上形成掺杂的Si原子层。

94. 发明授权

US07119392B2 Storage electrode of a semiconductor device and method of forming the same 有权
标题翻译：半导体器件的存储电极及其形成方法
公开(公告)号：US07119392B2
公开(公告)日：2006-10-10
申请号：US11086318
申请日：2005-03-23
申请人： Kyoung-Seok Kim , Ki-Hyun Hwang , Hyo-Jung Kim , Hyeon-Deok Lee , Seok-Woo Nam
发明人： Kyoung-Seok Kim , Ki-Hyun Hwang , Hyo-Jung Kim , Hyeon-Deok Lee , Seok-Woo Nam
IPC分类号： H01L21/8242
CPC分类号： H01L28/84 , H01L27/10814 , H01L27/10817 , H01L27/10852 , H01L28/90
摘要： In a storage electrode of a semiconductor device, and a method of forming the same, the storage electrode includes an outer cylinder including a first outer cylindrical portion having a first outer diameter, and a second outer cylindrical portion that is formed on the first outer cylindrical portion and having a second outer diameter, which is less than the first outer diameter, the first and second outer cylindrical portions having substantially equal inner diameters, and an inner cylinder formed on inner surfaces of the outer cylinder.
摘要翻译：在半导体器件的存储电极及其形成方法中，所述存储电极包括：外筒，所述外筒包括具有第一外径的第一外筒部和形成在所述第一外筒上的第二外筒部; 部分具有小于第一外径的第二外径，第一和第二外筒部具有基本相等的内径，以及形成在外筒内表面上的内筒。

95. 发明授权

US07007933B2 Method and apparatus for supplying a source gas 失效
标题翻译：用于供应源气体的方法和装置
公开(公告)号：US07007933B2
公开(公告)日：2006-03-07
申请号：US10431981
申请日：2003-05-08
申请人： Jai-Dong Lee , Ki-Hyun Hwang , Chang-Hyun Ko
发明人： Jai-Dong Lee , Ki-Hyun Hwang , Chang-Hyun Ko
IPC分类号： B01F3/04
CPC分类号： C23C16/4482 , Y10S261/65
摘要： A method for supplying a source gas to a processing chamber for forming a film on a substrate in the processing chamber includes: heating a carrier gas; bubbling the heated carrier gas in a liquid source disposed in a container to form a vapor source; and supplying a source gas including the vapor source and the heated carrier gas into the processing chamber for forming the film.
摘要翻译：将源气体供给到处理室中的基板上形成膜的处理室的方法包括：对载气进行加热; 将加热的载气鼓泡在设置在容器中的液体源中以形成蒸气源; 以及将包括蒸气源和被加热的载气的源气体供应到用于形成膜的处理室中。

96. 发明申请

US20050032372A1 Methods for forming a thin film on an integrated circuit device by sequentially providing energies to activate the reactants 失效
标题翻译：通过依次提供激活反应物的能量在集成电路器件上形成薄膜的方法
公开(公告)号：US20050032372A1
公开(公告)日：2005-02-10
申请号：US10814553
申请日：2004-03-31
申请人： Chang-Hyun Ko , Ki-Hyun Hwang , Hyo-Jung Kim
发明人： Chang-Hyun Ko , Ki-Hyun Hwang , Hyo-Jung Kim
IPC分类号： H01L21/20 , B05D5/00 , C23C16/40 , H01L21/302 , H01L21/314 , H01L21/461
CPC分类号： H01L21/02299 , C23C16/403 , C23C16/405 , C23C16/45525 , C23C16/45536 , H01L21/022 , H01L21/0228 , H01L21/3141 , H01L21/3142
摘要： Methods for forming a thin film on an integrated circuit device including providing energy to reactants in a deposition chamber to activate the reactants. The activated reactants are then deposited on the substrate to form a thin film on the substrate. The reactants selected may be selectively activated so that different thin films are formed in a single chamber thereby reducing processing time.
摘要翻译：在集成电路装置上形成薄膜的方法，包括向沉积室中的反应物提供能量以激活反应物。然后将活化的反应物沉积在基底上以在基底上形成薄膜。选择的反应物可以被选择性地激活，使得在单个室中形成不同的薄膜，从而减少处理时间。

97. 发明授权

US06838719B2 Dram cell capacitors having U-shaped electrodes with rough inner and outer surfaces 有权
标题翻译：具有内表面和内表面粗糙的U形电极的电容器电容器
公开(公告)号：US06838719B2
公开(公告)日：2005-01-04
申请号：US10223751
申请日：2002-08-20
申请人： Ki-Hyun Hwang , Chang-Won Choi , Seok-Woo Nam , Bon-Young Koo , Young-Sub Yu , Han-Jin Lim
发明人： Ki-Hyun Hwang , Chang-Won Choi , Seok-Woo Nam , Bon-Young Koo , Young-Sub Yu , Han-Jin Lim
IPC分类号： H01L21/02 , H01L21/8242 , H01L27/108
CPC分类号： H01L28/91 , H01L27/10852 , H01L28/84
摘要： Methods of forming integrated circuit capacitors include the steps of forming a first electrically insulating layer having a conductive plug therein, on a semiconductor substrate, and then forming second and third electrically insulating layers of different materials on the first electrically insulating layer. A contact hole is then formed to extend through the second and third electrically insulating layers and expose the conductive plug. Next, a conductive layer is formed in the contact hole and on the third electrically insulating layer. A step is then performed to planarize the conductive layer to define a U-shaped electrode in the contact hole. The third electrically insulating layer is then etched-back to expose upper portions of outer sidewalls of the U-shaped electrode, using the second electrically insulating layer as an etch stop layer. However, the second electrically insulating layer is not removed but is left to act as a supporting layer for the U-shaped electrode. This second electrically insulating layer preferably comprises a composite of a nitride layer and an oxide layer. To increase the effective surface area of the U-shaped electrode, an HSG layer may also be formed on the inner and outer sidewalls of the U-shaped electrode.

98. 发明授权

US08994091B2 Non-volatile memory device having a vertical structure and method of fabricating the same 有权
标题翻译：具有垂直结构的非易失性存储器件及其制造方法
公开(公告)号：US08994091B2
公开(公告)日：2015-03-31
申请号：US13458293
申请日：2012-04-27
申请人： Sang-Hoon Lee , Jin-Gyun Kim , Koong-Hyun Nam , Ki-Hyun Hwang , Hun-Hyeong Lim , Dong-Kyum Kim
发明人： Sang-Hoon Lee , Jin-Gyun Kim , Koong-Hyun Nam , Ki-Hyun Hwang , Hun-Hyeong Lim , Dong-Kyum Kim
IPC分类号： H01L29/76 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11582 , H01L27/11556 , H01L29/4234 , H01L29/7889 , H01L29/7926
摘要： A non-volatile memory device having a vertical structure includes a semiconductor layer, a sidewall insulation layer extending in a vertical direction on the semiconductor layer, and having one or more protrusion regions, first control gate electrodes arranged in the vertical direction on the semiconductor layer, and respectively contacting one of portions of the sidewall insulation layer where the one or more protrusion regions are not formed and second control gate electrodes arranged in the vertical direction on the semiconductor layer, and respectively contacting one of the one or more protrusion regions.
摘要翻译：具有垂直结构的非易失性存储器件包括半导体层，在半导体层上沿垂直方向延伸的侧壁绝缘层，并且具有一个或多个突出区域，在半导体层上沿垂直方向布置的第一控制栅电极并且分别接触在半导体层上形成有一个或多个突起区域的侧壁绝缘层的一部分和在垂直方向上排列的第二控制栅电极，并分别接触一个或多个突出区域中的一个。

99. 发明申请

US20110237059A1 Non-volatile memory devices with multiple layers having band gap relationships among the layers 有权
标题翻译：具有层之间具有带隙关系的多层的非易失性存储器件
公开(公告)号：US20110237059A1
公开(公告)日：2011-09-29
申请号：US13067405
申请日：2011-05-31
申请人： Seung-Jae Baik , Hong-Suk Kim , Si-Young Choi , Ki-Hyun Hwang , Sang-Jin Hyun
发明人： Seung-Jae Baik , Hong-Suk Kim , Si-Young Choi , Ki-Hyun Hwang , Sang-Jin Hyun
IPC分类号： H01L21/28
CPC分类号： H01L29/792 , H01L21/28282 , H01L29/42348 , H01L29/513 , H01L29/66833
摘要： A nonvolatile memory device may include: a tunnel insulating layer on a semiconductor substrate; a charge storage layer on the tunnel insulating layer; a blocking insulating layer on the charge storage layer; and a control gate electrode on the blocking insulating layer. The tunnel insulating layer may include a first tunnel insulating layer and a second tunnel insulating layer. The first tunnel insulating layer and the second tunnel insulating layer may be sequentially stacked on the semiconductor substrate. The second tunnel insulating layer may have a larger band gap than the first tunnel insulating layer. A method for fabricating a nonvolatile memory device may include: forming a tunnel insulating layer on a semiconductor substrate; forming a charge storage layer on the tunnel insulating layer; forming a blocking insulating layer on the charge storage layer; and forming a control gate electrode on the blocking insulating layer.
摘要翻译：非易失性存储器件可以包括：半导体衬底上的隧道绝缘层; 隧道绝缘层上的电荷存储层; 电荷存储层上的阻挡绝缘层; 以及在所述阻挡绝缘层上的控制栅电极。隧道绝缘层可以包括第一隧道绝缘层和第二隧道绝缘层。第一隧道绝缘层和第二隧道绝缘层可以顺序堆叠在半导体衬底上。第二隧道绝缘层可以具有比第一隧道绝缘层更大的带隙。非易失性存储器件的制造方法可以包括：在半导体衬底上形成隧道绝缘层; 在隧道绝缘层上形成电荷存储层; 在电荷存储层上形成阻挡绝缘层; 以及在所述阻挡绝缘层上形成控制栅电极。

100. 发明申请

US20110237055A1 Methods of Manufacturing Stacked Semiconductor Devices 审中-公开
标题翻译：堆叠半导体器件制造方法
公开(公告)号：US20110237055A1
公开(公告)日：2011-09-29
申请号：US13053291
申请日：2011-03-22
申请人： Yong-hoon Son , Si-Young Choi , Myoung-Bum Lee , Ki-Hyun Hwang , Seung-Jae Baik , Jeong Hee Han
发明人： Yong-hoon Son , Si-Young Choi , Myoung-Bum Lee , Ki-Hyun Hwang , Seung-Jae Baik , Jeong Hee Han
IPC分类号： H01L21/20
CPC分类号： H01L27/11578 , H01L27/0688 , H01L27/11524 , H01L27/11551 , H01L27/1207
摘要： A stacked semiconductor device that is reliable by forming an insulating layer on a lower memory layer and by forming a single crystalline semiconductor in portions of the insulating layer. A method of manufacturing the stacked semiconductor device, including: providing a lower memory layer including a plurality of lower memory structures; forming an insulating layer on the lower memory layer; forming trenches by removing portions of the insulating layer; forming a preparatory semiconductor layer for filling the trenches; and forming a single crystalline semiconductor layer by phase-changing the preparatory semiconductor layer.
摘要翻译：通过在下部存储层上形成绝缘层，在绝缘层的一部分形成单晶半导体，可靠的叠层型半导体装置。一种制造叠层半导体器件的方法，包括：提供包括多个下部存储结构的下部存储层; 在下部存储层上形成绝缘层; 通过去除绝缘层的部分形成沟槽; 形成用于填充沟槽的准备半导体层; 以及通过相变所述预备半导体层来形成单晶半导体层。

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