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    • 91. 发明授权
    • Thin film transistor and method for fabricating the same
    • 薄膜晶体管及其制造方法
    • US08748892B2
    • 2014-06-10
    • US12576591
    • 2009-10-09
    • Yong-Soo ChoKyo-Ho MoonHoon Choi
    • Yong-Soo ChoKyo-Ho MoonHoon Choi
    • H01L31/00H01L29/04H01L29/10H01L21/00H01L21/84
    • H01L29/4908H01L27/1214H01L29/78648
    • The present invention relates to a thin-film transistor in a liquid crystal display device and a method of fabricating the same, and the thin-film transistor may be configured by including a first gate electrode formed on an insulating substrate; a first gate insulation film formed on the insulating substrate including the first gate electrode; an active layer formed on the first gate insulation film; source/drain electrodes formed on the active layer and arranged at both sides of the first gate electrode; a second gate insulation film formed on the active layer and the first gate insulation film including the source/drain electrodes and provided with a contact hole for exposing part of the drain electrode; a second gate electrode overlapped with the first gate electrode on the second gate insulation film; and a pixel electrode electrically connected to the drain electrode through the contact hole.
    • 液晶显示装置中的薄膜晶体管及其制造方法技术领域本发明涉及液晶显示装置中的薄膜晶体管及其制造方法,薄膜晶体管可以通过包括形成在绝缘基板上的第一栅电极构成, 形成在包括所述第一栅极的所述绝缘基板上的第一栅极绝缘膜; 形成在第一栅极绝缘膜上的有源层; 源极/漏电极,形成在有源层上,并布置在第一栅电极的两侧; 形成在所述有源层上的第二栅极绝缘膜和包括所述源极/漏极的所述第一栅极绝缘膜,并且设置有用于使所述漏极的一部分露出的接触孔; 在所述第二栅极绝缘膜上与所述第一栅电极重叠的第二栅电极; 以及通过接触孔与漏电极电连接的像素电极。
    • 95. 发明授权
    • Semiconductor apparatus
    • 半导体装置
    • US08310289B2
    • 2012-11-13
    • US12648907
    • 2009-12-29
    • Hoon Choi
    • Hoon Choi
    • H03L7/06
    • H03L7/0812
    • A semiconductor apparatus for reducing unnecessary current consumption disclosed. The semiconductor apparatus includes: a clock signal transmission unit that selectively transmits a clock signal in accordance with the frequency of the clock signal at an operation standby mode. A delay locked loop generates a DLL clock signal on the basis of the clock signal inputted through the clock signal transmission unit. The delay locked loop generates the DLL clock signal during a period where the clock signal is transmitted.
    • 一种用于减少不必要的电流消耗的半导体装置。 半导体装置包括:时钟信号发送单元,其在操作待机模式下根据时钟信号的频率选择性地发送时钟信号。 延迟锁定环根据通过时钟信号传输单元输入的时钟信号产生DLL时钟信号。 延迟锁定环在发送时钟信号的时段内产生DLL时钟信号。
    • 97. 发明授权
    • Process condition evaluation method for liquid crystal display module
    • 液晶显示模块的工艺条件评估方法
    • US08178367B2
    • 2012-05-15
    • US12958031
    • 2010-12-01
    • Jeong-Yeop LeeHoon ChoiYoung Seok ChoiKwang-Sik Oh
    • Jeong-Yeop LeeHoon ChoiYoung Seok ChoiKwang-Sik Oh
    • H01L21/66G01R31/26
    • G09G3/006G09G3/3648
    • A process condition evaluation method for a liquid crystal display module (LCM) includes: a first step of obtaining a threshold power measuring pattern, an analysis sample for a cell bonding status in an LCD fabrication process, and obtaining a lower substrate sample by separating an upper substrate from the threshold power measuring pattern; a second step of supplying voltages on a gate pad on the lower substrate sample with sequentially increasing a voltage level by a predetermined unit by using an electrical device, and obtaining a threshold current and a threshold voltage by measuring currents at a drain pad whenever voltage increased by a predetermined unit is applied to the gate pad; and a third step of obtaining threshold power based on the threshold current and the threshold voltage, and thereby evaluating process conditions of the LCM.
    • 液晶显示模块(LCM)的工艺条件评估方法包括:获得阈值功率测量图案的第一步骤,LCD制造工艺中的单元接合状态的分析样本,以及通过分离下一个 上基板从阈值功率测量图案; 第二步骤,通过使用电气装置依次增加预定单位的电压电平,在下部基板样品上的栅极焊盘上提供电压,并且每当电压增加时,通过测量漏极焊盘处的电流来获得阈值电流和阈值电压 通过预定单元施加到栅极焊盘; 以及第三步骤,基于阈值电流和阈值电压获得阈值功率,从而评估LCM的处理条件。