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91. 发明授权

US06498755B2 SEMICONDUCTOR STORAGE DEVICE CONDUCTING A LATE-WRITE OPERATION AND CONTROLLING A TEST READ-OPERATION TO READ DATA NOT FROM A DATA LATCH CIRCUIT BUT FROM A MEMORY CORE CIRCUIT REGARDLESS OF WHETHER A PRECEDING ADDRESS AND A PRESENT ADDRESS MATCH EACH OTHER 有权
标题翻译：半导体存储器件进行较早的写入操作并且控制测试读取操作以从数据锁存器电路读取数据而不是从存储器核心电路读取数据，无论前面的地址和现在地址是否匹配其他任何其他的
公开(公告)号：US06498755B2
公开(公告)日：2002-12-24
申请号：US09790612
申请日：2001-02-23
申请人： Yoshitaka Takahashi , Hitoshi Ikeda , Shinya Fujioka
发明人： Yoshitaka Takahashi , Hitoshi Ikeda , Shinya Fujioka
IPC分类号： G11C700
CPC分类号： G11C7/109 , G11C7/1006 , G11C7/1045 , G11C7/1078 , G11C7/1087 , G11C7/1093 , G11C8/00 , G11C8/06
摘要： A semiconductor storage device conducts a late-write operation. The semiconductor storage device comprises: a memory core circuit storing data; a data latch circuit storing preceding data corresponding to a preceding write-operation; an address compare circuit comparing a preceding address corresponding to the preceding write-operation and a present address corresponding to a present read-operation so as to determine whether the preceding address and the present address match each other; and a control circuit. The control circuit controls a test read-operation to read data from the memory core circuit regardless of whether the preceding address and the present address match each other.
摘要翻译：半导体存储装置进行后期写入操作。半导体存储装置包括：存储数据的存储器核心电路; 数据锁存电路，存储对应于先前的写入操作的先前数据; 比较与前一写入操作相对应的前一地址和对应于当前读操作的当前地址的地址比较电路，以便确定前一地址和当前地址是否彼此匹配; 和控制电路。无论前一地址和当前地址是否彼此匹配，控制电路控制测试读取操作以从存储器核心电路读取数据。

92. 发明授权

US06477130B2 Optical pick-up apparatus 失效
公开(公告)号：US06477130B2
公开(公告)日：2002-11-05
申请号：US09939635
申请日：2001-08-28
申请人： Yoshitaka Takahashi
发明人： Yoshitaka Takahashi
IPC分类号： G11B700
CPC分类号： G11B7/0909 , G11B7/094 , G11B7/127 , G11B7/1359 , G11B7/13922 , G11B2007/0006 , G11B2007/13727
摘要： The present invention provides a method and apparatus for utilizing light rays of differing wavelengths to read optical discs of different respective capacities. The present invention serves to prevent aberration of the minute optical spot used to read the respective optical discs and also serves to eliminate an offset component with respect to the signals received by the photo detector, as reflected from the respective optical discs.

93. 发明授权

US06404688B2 Semiconductor memory device having a self-refresh operation 失效
标题翻译：具有自刷新操作的半导体存储器件
公开(公告)号：US06404688B2
公开(公告)日：2002-06-11
申请号：US09791839
申请日：2001-02-26
申请人： Yoshiaki Okuyama , Yoshitaka Takahashi , Shinya Fujioka , Akihiro Funyu
发明人： Yoshiaki Okuyama , Yoshitaka Takahashi , Shinya Fujioka , Akihiro Funyu
IPC分类号： G11C700
CPC分类号： G11C11/406 , G11C7/1045
摘要： A semiconductor memory device having a self-refresh operation includes a first circuit generating a first signal that specifies a first self-refresh cycle by a non-volatile circuit element provided in the semiconductor memory device, a second circuit receiving a second signal that specifies a second self-refresh cycle via a terminal that is used in common to another signal, and a third circuit generating a pulse signal having one of the first and second self-refresh cycles, the pulse signal being related to the self-refresh operation.
摘要翻译：具有自刷新操作的半导体存储器件包括：第一电路，产生由设置在半导体存储器件中的非易失性电路元件指定第一自刷新周期的第一信号;第二电路，接收指定第第二自刷新周期经由与另一信号共同使用的端子，以及第三电路，产生具有第一和第二自刷新周期中的一个的脉冲信号，所述脉冲信号与自刷新操作相关。

94. 发明授权

US06343058B1 Optical pickup device applicable to two kinds of recording media with minimized deterioration of a beam spot 失效
标题翻译：光拾取装置适用于具有最小化光束斑点劣化的两种记录介质
公开(公告)号：US06343058B1
公开(公告)日：2002-01-29
申请号：US09182662
申请日：1998-10-30
申请人： Hiroshi Akiyama , Yoshitaka Takahashi
发明人： Hiroshi Akiyama , Yoshitaka Takahashi
IPC分类号： G11B700
CPC分类号： G11B7/1353 , G11B7/123 , G11B7/127 , G11B7/131 , G11B7/1365 , G11B7/1374 , G11B7/1376 , G11B7/139 , G11B7/13922 , G11B2007/0006
摘要： An optical pickup device shares an objective lens for two different light sources so as to handle two kinds of optical recording media, that is, a first optical recording medium and a second optical recording medium, the second optical recording medium having a thickness larger than a thickness of the first optical recording medium. A first light source emits a first beam having a first wavelength. A second light source emits a second beam having a second wavelength. An objective lens converges the first beam and projects the converged first beam onto the first optical recording medium. The objective lens also converges the second beam and projects the converged second beam onto the second optical recording medium. A second coupling lens changes the second beam to a beam which matches the objective lens. The second coupling lens alone has a wavefront aberration substantially proportional to a field angle thereof so that the second beam after passing through the second coupling lens has a wavefront different from a wavefront of the first beam.
摘要翻译：一种光学拾取装置共享用于两个不同光源的物镜，以便处理两种光学记录介质，即第一光学记录介质和第二光学记录介质，第二光学记录介质的厚度大于第一光记录介质的厚度。第一光源发射具有第一波长的第一光束。第二光源发射具有第二波长的第二光束。物镜会聚第一光束并将会聚的第一光束投影到第一光记录介质上。物镜也会聚第二光束并将会聚的第二光束投影到第二光记录介质上。第二耦合透镜将第二光束改变成与物镜匹配的光束。单独的第二耦合透镜具有与其场角基本上成比例的波前像差，使得通过第二耦合透镜之后的第二光束具有与第一光束的波前不同的波阵面。

95. 发明授权

US06262924B1 Programmable semiconductor memory device 失效
标题翻译：可编程半导体存储器件
公开(公告)号：US06262924B1
公开(公告)日：2001-07-17
申请号：US09452168
申请日：1999-12-01
申请人： Yutaka Fukutani , Tomohiro Nakayama , Seizi Hirayama , Waichiro Fujieda , Arayama Youji , Atsushi Fujii , Yoshitaka Takahashi , Masanori Nagasawa , Masakazu Kimura , Tutomu Taniguti , Hiroyuki Fujimoto
发明人： Yutaka Fukutani , Tomohiro Nakayama , Seizi Hirayama , Waichiro Fujieda , Arayama Youji , Atsushi Fujii , Yoshitaka Takahashi , Masanori Nagasawa , Masakazu Kimura , Tutomu Taniguti , Hiroyuki Fujimoto
IPC分类号： G11C700
CPC分类号： G11C29/822 , G11C8/18 , G11C16/0441 , G11C16/10 , G11C17/12 , G11C29/80 , G11C29/83 , G11C29/846
摘要： A semiconductor memory device is provided with terminals for receiving a chip enable signal and an address signal, an internal circuit, and an internal control signal generating circuit for generating a predetermined internal control signal which makes an output timing of the semiconductor memory device same regardless of a level of the address signal when the chip enable signal undergoes a transition from an inactive level to an active level. The internal circuit is deactivated in response to the inactive level of the chip enable signal and is activated in response to the active level of the chip enable signal.
摘要翻译：半导体存储器件设置有用于接收芯片使能信号和地址信号的端子，内部电路和内部控制信号产生电路，用于产生预定的内部控制信号，其使半导体存储器件的输出定时相同，而不管当芯片使能信号经历从非活动电平转换到有效电平时的地址信号的电平。内部电路响应于芯片使能信号的无效电平被去激活，并且响应于芯片使能信号的有效电平被激活。

96. 发明授权

US6089172A Lock stitch sewing machine with automatic thread tension adjusting device 有权
标题翻译：自动线张力调节装置的锁缝机
公开(公告)号：US6089172A
公开(公告)日：2000-07-18
申请号：US374672
申请日：1999-08-16
申请人： Hideaki Takenoya , Yoshikazu Ebata , Akira Orii , Yoshitaka Takahashi , Eiji Murakami , Eiichi Shomura , Tsutomu Takagi , Yukio Hosaka
发明人： Hideaki Takenoya , Yoshikazu Ebata , Akira Orii , Yoshitaka Takahashi , Eiji Murakami , Eiichi Shomura , Tsutomu Takagi , Yukio Hosaka
IPC分类号： D05B19/12 , D05B47/04 , D05B47/06
CPC分类号： D05B19/12 , D05B47/04
摘要： A lock stitch sewing machine with an automatic thread tension adjusting device is disclosed, wherein the sewing machine has a plurality of thread tension adjusting mechanisms 7, each of which including a pair of thread tension disks 12, 13, one of which is normally pressed by a spring toward the other. A sensor 4 is responsive to the operation of a thread tension releasing lever 20 made by a user with a slight touch applied thereto to give a signal. A CPU1 is responsive to the signal to compare the value of the existing thread tension of the thread tension adjusting mechanisms 7 with a predetermined one. If the value of the existing thread tension is higher than the predetermined one, the CPU1 is operated reduce the value of the existing thread tension to a predetermined one. Thus the tension releasing operation ability is increased.
摘要翻译：公开了一种具有自动线张力调节装置的缝纫缝纫机，其中缝纫机具有多个线张力调节机构7，每个线张力调节机构7包括一对线张力盘12,13，其中一个线张力盘12通常被朝向另一个的春天。传感器4响应于由使用者施加的轻微触摸而产生的线张力释放杆20的操作以产生信号。 CPU1响应该信号以将线张力调节机构7的现有线张力的值与预定线张力调节机构7的值进行比较。如果现有线张力的值高于预定线张力，则CPU1被操作将现有线张力的值减小到预定线张力。因此，张力释放操作能力增加。

97. 发明授权

US6004018A Device for producing embroidery data on the basis of image data 失效
标题翻译：基于图像数据生成绣花数据的装置
公开(公告)号：US6004018A
公开(公告)日：1999-12-21
申请号：US799275
申请日：1997-02-13
申请人： Takayuki Kawasato , Shinichi Fuchigami , Haruhiko Tanaka , Yoshitaka Takahashi
发明人： Takayuki Kawasato , Shinichi Fuchigami , Haruhiko Tanaka , Yoshitaka Takahashi
IPC分类号： D05B19/08 , D05B19/10 , G06F19/00 , G06G7/64 , G06G7/66
CPC分类号： D05B19/10 , D05B19/08
摘要： Disclosed is a device for producing embroidery stitch data on the basis of image data, wherein an image is read in by use of an image scanner and is divided into a plurality of latticed sections. The latticed sections are all searched through one after another and discriminated if each of the sections is stitched or not. Unit stitch patterns are selected to be stitched in the sections respectively which have been discriminated to be stitched, the selected unit stitch patterns including at most two patterns which have different initial stitch points and different end stitch points and are located in predetermined sections respectively.
摘要翻译：公开了一种用于根据图像数据产生刺绣针迹数据的装置，其中使用图像扫描仪读取图像并将其划分为多个网格部分。网格部分都经过一个接一个的搜索，并且区分每个部分是否被缝合。所选择的单位线迹图案分别被选择为缝合在已经被识别为被缝合的部分中，所选择的单位线迹图案至多包括具有不同初始针迹点和不同末端针迹点的两个图案，并且分别位于预定部分中。

98. 发明授权

US5831933A Programmable semiconductor memory device 失效
公开(公告)号：US5831933A
公开(公告)日：1998-11-03
申请号：US847596
申请日：1997-04-25
申请人： Yutaka Fukutani , Tomohiro Nakayama , Seizi Hirayama , Waichiro Fujieda , Arayama Youji , Atsushi Fujii , Yoshitaka Takahashi , Masanori Nagasawa , Masakazu Kimura , Tutomu Taniguti , Hiroyuki Fujimoto
发明人： Yutaka Fukutani , Tomohiro Nakayama , Seizi Hirayama , Waichiro Fujieda , Arayama Youji , Atsushi Fujii , Yoshitaka Takahashi , Masanori Nagasawa , Masakazu Kimura , Tutomu Taniguti , Hiroyuki Fujimoto
IPC分类号： G11C8/18 , G11C16/04 , G11C17/12 , G11C29/00 , G11C8/00
CPC分类号： G11C29/80 , G11C16/0441 , G11C17/12 , G11C29/822 , G11C29/83 , G11C29/846 , G11C8/18
摘要： A semiconductor memory device is provided with terminals for receiving a chip enable signal and an address signal, an internal circuit, and an internal control signal generating circuit for generating a predetermined internal control signal which makes an output timing of the semiconductor memory device same regardless of a level of the address signal when the chip enable signal undergoes a transition from an inactive level to an active level. The internal circuit is deactivated in response to the inactive level of the chip enable signal and is activated in response to the active level of the chip enable signal.

99. 发明授权

US4577574A Electronic sewing machine with a pattern display 失效
标题翻译：电子缝纫机带图案显示
公开(公告)号：US4577574A
公开(公告)日：1986-03-25
申请号：US594774
申请日：1984-03-26
申请人： Yoshitaka Takahashi
发明人： Yoshitaka Takahashi
IPC分类号： D05B3/02 , D05B19/00 , D05B19/02 , D05B35/12 , D05B69/00 , G09G3/02 , G09G3/20
CPC分类号： D05B19/105 , D05B19/10
摘要： An electronic sewing machine with a dot matrix display for representing the image of a selected pattern to be stitched, having a first memory which stores stitch control data which may be sequentially read out in dependence upon a selected pattern per rotation of the sewing machine and transmitted to a driving part of a stitch forming mechanism; prior to initiation of the driving part, a calculator receives the read out stitch control data to make calculations for linearly interpolating between the adjacent stitches, thus to repeatedly renew the stitch control data into display data; a second memory stores the display condition data for controlling the cycle of pattern unit to be displayed; a counter counts up the cycles of the selected pattern in reference to the renewed stitch control data. Thus when the display calculations are finished through out the pattern cycles, the sewing operation is made possible, and the calculated display data are temporarily stored in a third memory to drive the dot matrix display of the sewing machine.
摘要翻译：一种具有点阵显示器的电子缝纫机，用于表示要缝合的所选择的图案的图像，具有第一存储器，该第一存储器存储根据缝纫机的每次旋转所选择的图案可以依次读出的针迹控制数据并发送到针迹形成机构的驱动部分; 在开始驱动部件之前，计算器接收读出的针脚控制数据，以进行相邻针迹之间的线性内插的计算，从而将缝合控制数据重复地更新为显示数据; 第二存储器存储用于控制要显示的图案单元的周期的显示条件数据; 参考更新的针脚控制数据，计数器对所选图案的周期进行计数。因此，当通过模式循环完成显示计算时，可以进行缝制操作，并将所计算的显示数据临时存储在第三存储器中，以驱动缝纫机的点阵显示。

100. 发明授权

US4524309A Safety control device of commutator motors 失效
标题翻译：换向电机安全控制装置
公开(公告)号：US4524309A
公开(公告)日：1985-06-18
申请号：US332359
申请日：1981-12-18
申请人： Michio Hisatake , Kazuji Yamamoto , Toru Hyodo , Yoshitaka Takahashi
发明人： Michio Hisatake , Kazuji Yamamoto , Toru Hyodo , Yoshitaka Takahashi
IPC分类号： H02P7/295 , H02H7/08 , H02P1/18 , H02P7/292 , H02K17/32
CPC分类号： H02H7/0833 , H02P7/293
摘要： A safety control device for a speed control circuit of a commutator motor having an ignition circuit includes a circuit for detecting an armature current and defining whether the commutator motor is energized with a supply current or with a free wheel current, a maintaining circuit for discriminating if the detected result is a continuously energized condition or an intermittent condition, and a bistable circuit. The maintaining circuit smoothes the detected voltage of the energized motor and maintains the voltage over at least one cycle of the power source and functions temporarily in an equivalent manner of continuous energization of the motor when power source is applied to the motor. The bistable circuit nullifies the ignition circuit of the motor control when the motor is in an intermittent energization and switches the ignition circuit into an effective condition as the maintaining circuit comes to accumulate the voltage above the predetermined level while no speed designation is made to the speed control circuit of the motor.
摘要翻译：具有点火电路的换向器电动机的速度控制电路的安全控制装置包括用于检测电枢电流的电路，并且确定换向器电动机是用供电电流还是用自由电流电流通电;维持电路，用于鉴别是否检测结果是连续通电状态或间歇状态，双稳态电路。维持电路平滑了通电电动机的检测电压，并将电压保持在电源的至少一个周期上，并且当电源施加到电动机时，暂时以等效的方式连续通电电动机。当电动机处于间歇通电状态时，双稳态电路使电动机控制器的点火电路无效，并且当维持电路达到高于预定电平的电压时将点火电路切换到有效状态，而不对速度进行速度指定电机控制电路。

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