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91. 发明授权

US07333361B2 Biosensor and sensing cell array using the same 有权
标题翻译：生物传感器和感应单元阵列使用相同的
公开(公告)号：US07333361B2
公开(公告)日：2008-02-19
申请号：US11357214
申请日：2006-02-21
申请人： Hee Bok Kang , Dong Yun Jeong , Jae Hyoung Lim , Young Jin Park , Kye Nam Lee , In Woo Jang , Seaung Suk Lee , Chang Shuk Kim
发明人： Hee Bok Kang , Dong Yun Jeong , Jae Hyoung Lim , Young Jin Park , Kye Nam Lee , In Woo Jang , Seaung Suk Lee , Chang Shuk Kim
IPC分类号： G11C11/15
CPC分类号： G01N27/76 , G01N33/49 , G01R33/093 , G01R33/1284 , G11C11/1653 , G11C11/1657 , G11C11/1659 , G11C11/1673 , G11C11/1693 , H01F10/325
摘要： A biosensor and a sensing cell array using a biosensor are disclosed. Adjacent materials containing a plurality of different ingredients are analyzed to determine the ingredients based on their magnetic susceptibility or dielectric constant. A sensing cell array includes such as a magnetization pair detection sensor including a MTJ (Magnetic Tunnel Junction) or GMR (Giant Magnetoresistive) device, a magnetoresistive sensor including a MTJ device and a magnetic material (current line), a dielectric constant sensor including a sensing capacitor and a switching device, a magnetization hole detection sensor including a MTJ or GMR device, a current line, a free ferromagnetic layer and a switching device, and a giant magnetoresistive sensor including a GMR device, a switching device and a magnetic material (or forcing wordline). Ingredients of adjacent materials are separated based on electrical characteristics of ingredients by sensing magnetic susceptibility and dielectric constant depending on the sizes of the ingredients.
摘要翻译：公开了一种使用生物传感器的生物传感器和感测单元阵列。分析包含多种不同成分的相邻材料，以基于它们的磁化率或介电常数确定成分。感测单元阵列包括诸如包括MTJ（磁隧道结）或GMR（巨磁阻）装置的磁化对检测传感器，包括MTJ装置和磁性材料（电流线）的磁阻传感器），介电常数传感器包括感测电容器和开关装置，包括MTJ或GMR装置的磁化空穴检测传感器，电流线，自由铁磁层和开关装置，以及包括GMR装置，开关装置和磁性材料的巨磁阻传感器或强迫字线）。根据成分的尺寸，通过感应磁化率和介电常数，根据成分的电学特性分离相邻材料的成分。

92. 发明申请

US20080018483A1 Radio frequency identification device 失效
标题翻译：射频识别装置
公开(公告)号：US20080018483A1
公开(公告)日：2008-01-24
申请号：US11812832
申请日：2007-06-22
申请人： Hee Bok Kang
发明人： Hee Bok Kang
IPC分类号： G08B21/00
CPC分类号： G01K1/024
摘要： An RFID device includes an analog block configured to receive a radio frequency signal so as to output an operation command signal, a digital block configured to output an address, a temperature address, an operation control signal, and a temperature sensor activation signal in response to the operation command signal received from the analog block and to provide a corresponding response signal into the analog block. The device further includes a memory block configured to receive the address, the temperature address, and the operation control signal so as to generate an internal control signal for controlling the internal operation, and to read/write data in a cell array including a non-volatile ferroelectric capacitor in response to the internal control signal, and a temperature sensor processing unit configured to detect a temperature change state of an RFID tag in response to the temperature sensor activation signal.
摘要翻译： RFID装置包括：模拟块，被配置为接收射频信号以输出操作命令信号;数字块，被配置为输出地址，温度地址，操作控制信号和温度传感器激活信号，以响应于所述操作命令信号从所述模拟块接收并且向所述模拟块提供相应的响应信号。该装置还包括一个存储块，被配置为接收地址，温度地址和操作控制信号，以便产生用于控制内部操作的内部控制信号，并且读取/写入包括非易失性存储器的单元阵列中的数据，响应于内部控制信号的挥发性铁电电容器;以及温度传感器处理单元，被配置为响应于温度传感器激活信号来检测RFID标签的温度变化状态。

93. 发明授权

US07310268B2 Float gate memory device 失效
标题翻译：浮动门存储器件
公开(公告)号：US07310268B2
公开(公告)日：2007-12-18
申请号：US11115301
申请日：2005-04-27
申请人： Hee Bok Kang , Jin Hong Ahn , Jae Jin Lee
发明人： Hee Bok Kang , Jin Hong Ahn , Jae Jin Lee
IPC分类号： G11C16/04
CPC分类号： G11C16/0483 , G11C16/0408 , H01L21/84 , H01L27/115 , H01L27/11521 , H01L27/1203 , H01L29/7881
摘要： A float gate memory device comprises a bottom word line, a float channel layer formed on the bottom word line and kept at a floating state, a float gate, and a top word line formed on the float gate in parallel with the bottom word line. In the float gate formed on the float channel, data are stored. Here, data are written in the float gate depending on levels of the bottom word line and the top word line, and different channel resistances are induced to the float channel depending on polarity states of charges stored in the float gate, so that data are read. As a result, in the float gate memory device, a retention characteristic is improved, and cell integrated capacity is also increased due to a plurality of float gate cell arrays deposited vertically using a plurality of cell oxide layers.
摘要翻译：浮动栅极存储器件包括底部字线，形成在底部字线上并保持在浮置状态的浮动沟道层，浮动栅极和形成在浮动栅极上的与底部字线平行的顶部字线。在浮动通道上形成的浮动门中，存储数据。这里，根据底部字线和顶部字线的电平，将数据写入浮动栅极，并且根据存储在浮动栅极中的电荷的极性状态，将不同的通道电阻感应到浮动通道，从而读取数据。结果，在浮栅存储器件中，由于使用多个单元氧化物层垂直淀积的多个浮栅单元阵列，保持特性得到改善，并且单元集成能力也增加。

94. 发明授权

US07305607B2 Nonvolatile ferroelectric memory device including failed cell correcting circuit 有权
标题翻译：非易失性铁电存储器件包括故障单元校正电路
公开(公告)号：US07305607B2
公开(公告)日：2007-12-04
申请号：US11321869
申请日：2005-12-30
申请人： Hee Bok Kang , Jin Hong Ahn
发明人： Hee Bok Kang , Jin Hong Ahn
IPC分类号： G11C29/00
CPC分类号： G06F11/1076 , G11C11/22 , G11C2029/0411
摘要： A nonvolatile ferroelectric memory device including a failed cell correcting circuit which effectively processes randomly distributed cell data. The nonvolatile ferroelectric memory device checks horizontal parity of a main memory cell array and stores the parity in a horizontal parity check cell array, and checks vertical parity of a main memory cell array and stores the parity in the vertical parity check cell array. Then, code data stored in the horizontal parity check cell array and the vertical parity check cell array are compared to sensing data of the main memory cell to correct an error datum. As a result, a 1 bit failure randomly generated within a predetermined column is corrected.
摘要翻译：包括有效处理随机分布的单元数据的故障单元校正电路的非易失性铁电存储器件。非易失性铁电存储器件检查主存储单元阵列的水平奇偶校验，并将奇偶校验存储在水平奇偶校验单元阵列中，并检查主存储单元阵列的垂直奇偶校验，并将奇偶校验存储在垂直奇偶校验单元阵列中。然后，将存储在水平奇偶校验单元阵列和垂直奇偶校验单元阵列中的代码数据与主存储单元的感测数据进行比较以校正错误数据。结果，校正了在预定列内随机产生的1位故障。

95. 发明授权

US07283383B2 Phase change resistor cell, nonvolatile memory device and control method using the same 失效
标题翻译：相变电阻单元，非易失性存储器件及使用其的控制方法
公开(公告)号：US07283383B2
公开(公告)日：2007-10-16
申请号：US10876464
申请日：2004-06-28
申请人： Hee Bok Kang
发明人： Hee Bok Kang
IPC分类号： G11C11/00
CPC分类号： G11C13/003 , G11C13/0004 , G11C2213/72 , G11C2213/74 , H01L27/2409 , H01L27/2463 , H01L45/06 , H01L45/1233 , H01L45/144
摘要： A nonvolatile memory device features a phase change resistor cell as a cross-point cell using a phase change resistor and a serial diode switch. The phase change resistor has logic data corresponding to a crystallization state changed by the amount of current supplied from a word line. The serial diode switch, connected between the phase change resistor and a bit line, comprises at least two or more diode switches serially connected, wherein each end portion of the diode switch is connected in common to the phase change resistor and the bit line and selectively switched depending on voltages applied to the word line and the bit line. The nonvolatile memory device is configured with the phase change resistor cell, and voltages applied to a word line and a bit line are controlled to read and write data. As a result, the whole size of the memory device is reduced.
摘要翻译：非易失性存储器件使用相变电阻器和串联二极管开关将相变电阻器单元作为交叉点单元。相变电阻器具有对应于由从字线提供的电流量改变的结晶状态的逻辑数据。连接在相变电阻器和位线之间的串联二极管开关包括串联连接的至少两个或更多个二极管开关，其中二极管开关的每个端部共同连接到相变电阻器和位线，并且选择性地根据施加到字线和位线的电压进行切换。非易失性存储器件配置有相变电阻单元，并且控制施加到字线和位线的电压以读取和写入数据。结果，存储器件的整体尺寸减小了。

96. 发明授权

US07212429B2 Nonvolatile ferroelectric memory device 失效
标题翻译：非易失性铁电存储器件
公开(公告)号：US07212429B2
公开(公告)日：2007-05-01
申请号：US11057192
申请日：2005-02-15
申请人： Hee Bok Kang
发明人： Hee Bok Kang
IPC分类号： G11C11/22
CPC分类号： G11C11/22 , G11C5/147 , G11C7/02 , G11C7/062 , G11C7/1048 , G11C7/1051 , G11C7/1069 , G11C7/12 , G11C7/14 , G11C7/18 , G11C2207/002
摘要： A nonvolatile ferroelectric memory device comprises a cell array block, a sense amplifier unit, a main amplifier unit and a data bus unit. The ferroelectric sense amplifier effectively senses and amplifies cell data having a small voltage difference applied to a main bit line, thereby improving operation characteristics in a low voltage. Also, a sensing voltage of the main bit line is lowered, thereby reducing a cross talk noise effect between main bit lines.
摘要翻译：非易失性铁电存储器件包括单元阵列块，读出放大器单元，主放大器单元和数据总线单元。铁电读出放大器有效地感测和放大施加到主位线的小电压差的单元数据，从而改善低电压下的操作特性。此外，主位线的感测电压降低，从而降低主位线之间的串扰噪声效应。

97. 发明授权

US07173868B2 Sense amplifier of ferroelectric memory device 失效
标题翻译：铁电存储器件的感应放大器
公开(公告)号：US07173868B2
公开(公告)日：2007-02-06
申请号：US11057191
申请日：2005-02-15
申请人： Hee Bok Kang
发明人： Hee Bok Kang
IPC分类号： G11C7/02 , G11C11/22
CPC分类号： G11C11/22 , G11C7/067
摘要： A SENSE AMPLIFIER OF FERROELECTRIC MEMORY DEVICE features improvement of the amplification degree. The SENSE AMPLIFIER OF FERROELECTRIC MEMORY DEVICE comprises a MBL sensing unit, a voltage dropping unit, a coupling regulation unit, a pull-down regulation unit, a sensing load unit, and an amplification unit. The level of the sensed voltage is double regulated, thereby improving the amplification degree on low voltage sensing data, and a small sensing voltage of a main bit line can be embodied, thereby embodying a lower voltage memory.
摘要翻译：电磁存储器件的感测放大器具有放大度的提高。电磁存储器件的SENSE放大器包括MBL感测单元，降压单元，耦合调节单元，下拉调节单元，感测负载单元和放大单元。感测电压的电平被双调节，从而提高低电压感测数据的放大度，并且可以实现主位线的小的感测电压，从而体现较低的电压存储器。

98. 发明授权

US07170773B2 Nonvolatile ferroelectric memory device having a multi-bit control function 失效
标题翻译：具有多位控制功能的非易失性铁电存储器件
公开(公告)号：US07170773B2
公开(公告)日：2007-01-30
申请号：US11291004
申请日：2005-12-01
申请人： Hee Bok Kang
发明人： Hee Bok Kang
IPC分类号： G11C11/22
CPC分类号： G11C11/22 , G11C11/5657
摘要： A nonvolatile ferroelectric memory device having a multi control function can amplify sensing voltage levels in a sensing critical voltage and determine a plurality of cell data when a plurality of reference timing strobes are applied on a basis of a time axis. In a read mode, a plurality of read data applied from a cell array block are stored in a read/write data register array unit through a common data bus unit. In a write mode, a plurality of read data stored in the read/write data register array unit or input data applied from a timing data buffer unit are stored in a cell, array block through the common data bus unit. Here, since a plurality of sensing voltage levels are set in cell data, a plurality of sensed data bits can be stored in one cell.
摘要翻译：具有多重控制功能的非易失性铁电存储器件可以放大感测临界电压中的感测电压电平，并且当基于时间轴施加多个参考定时选通时确定多个单元数据。在读取模式中，从单元阵列块施加的多个读取数据通过公共数据总线单元存储在读/写数据寄存器阵列单元中。在写入模式中，存储在读/写数据寄存器阵列单元中的多个读取数据或从定时数据缓冲器单元施加的输入数据通过公共数据总线单元存储在单元阵列块中。这里，由于在单元数据中设置多个感测电压电平，所以可以在一个单元中存储多个感测数据位。

99. 发明授权

US07120041B2 Memory device with programmable parameter controller 有权
标题翻译：带可编程参数控制器的存储器
公开(公告)号：US07120041B2
公开(公告)日：2006-10-10
申请号：US10626775
申请日：2003-07-25
申请人： Hee Bok Kang
发明人： Hee Bok Kang
IPC分类号： G11C19/00
CPC分类号： G11C7/1045
摘要： The present invention relates to a memory device having the capability of controlling a characteristic parameter including a register controller including a nonvolatile memory unit for storing data and a parameter controller for outputting a signal corresponding to a predetermined input signal. The parameter controller controls one or more characteristic parameters of the memory unit, including input voltage sensitivity, output signal delay and output signal voltage, according to a signal outputted from the register controller.
摘要翻译：本发明涉及具有控制特性参数的能力的存储器件，该特性参数包括一个寄存器控制器，该寄存器控制器包括用于存储数据的非易失性存储器单元和用于输出与预定输入信号对应的信号的参数控制器根据从寄存器控制器输出的信号，参数控制器控制存储单元的一个或多个特征参数，包括输入电压灵敏度，输出信号延迟和输出信号电压。

100. 发明授权

US07099177B2 Nonvolatile ferroelectric memory device having power control function 失效
标题翻译：具有功率控制功能的非易失性铁电存储器件
公开(公告)号：US07099177B2
公开(公告)日：2006-08-29
申请号：US10876466
申请日：2004-06-28
申请人： Hee Bok Kang
发明人： Hee Bok Kang
IPC分类号： G11C11/22 , G11C7/00
CPC分类号： G11C11/22 , G11C5/14
摘要： A nonvolatile ferroelectric memory device having a power control function improves a sensing margin by stably controlling a power applied to a cell capacitor. In the nonvolatile ferroelectric memory device, an operating voltage of the cell is controlled depending on an external supply voltage in order to apply the highest voltage to the cell capacitor, and a power voltage obtained by dropping an external power voltage is applied to adjacent circuits in order to apply a lower voltage to adjacent circuits. Additionally, different ESD (Electro Static Discharge) circuits for performing an electrostatic discharge function in an input/output unit are embodied depending on the supplied voltage level, thereby stabilizing power.
摘要翻译：具有功率控制功能的非易失性铁电存储器件通过稳定地控制施加到电池电容器的功率来改善感测裕度。在非易失性铁电存储装置中，为了向单元电容器施加最高电压，根据外部电源电压来控制电池的工作电压，通过将外部电力电压下降而获得的电力电压施加到相邻电路为了向相邻电路施加较低的电压。此外，根据所提供的电压电平实现用于在输入/输出单元中执行静电放电功能的不同的ESD（静电放电）电路，由此稳定功率。

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