会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 93. 发明专利
    • THIN FILM FORMING DEVICE
    • JPS60120515A
    • 1985-06-28
    • JP22841983
    • 1983-12-05
    • HITACHI LTD
    • KASAHARA OSAMU
    • H01L21/205H01L21/285H01L21/31
    • PURPOSE:To reduce film defects due to generation or adhesion to a substrate of foreign matters by forming a film made of metal or an insulating material on an exposed surface inside the thin film forming device of a shield plate, a substrate holding member and etc. in said device by plasma spray coating. CONSTITUTION:The surface exposed in a spattering chamber 2 is subjected to plasma spray coating with Mo to form a plasma spray coating film 15 of Mo. A substrate 11 is supported by a substrate holder 12 with facing a target 7 through a window 4a of a shield plate 4. Meanwhile, plasma is generated by a spattering electrode 5 and an anode 6 and excited ions are bombarded to a target 7. Consequently, particles of Mo and Si fly in the spattering chamber 2 and adhere to and deposit on a surface of the substrate 11 when a shutter 10 opens so as to form a thin film of MoSi2. At this time, the particles of Mo and Si adhere to the shield plate 4, the anode 6, the shutter 10, the substrate holder 12 and an inside surface of the chamber 1 for forming the film and because the plasma spray coating film 15 of Mo is formed over the surfaces of these members, the adhering films 16 are not exfoliated easily.
    • 95. 发明专利
    • SEMICONDUCTOR DEVICE
    • JPS5817637A
    • 1983-02-01
    • JP11509381
    • 1981-07-24
    • HITACHI LTD
    • FUJITA MINORUKASAHARA OSAMU
    • H01L29/78H01L21/768H01L23/522H01L23/532H01L27/00
    • PURPOSE:To obtain a semiconductor device having an interlayer insulating film which does not affect static influence and which does not thermally deform a wire by forming an insulating film which does not electrostatically affect the wire of lower layer in a VLST integrated with insulated gate type field effect transistor, and further forming an insulating film for producing compression force on the film. CONSTITUTION:An interlayer insulating film 25 formed between an aluminum wire (e.g., 14) connected to a gate electrode (e.g., G1 and a wire 5) and an aluminum wire (e.g., 15) for supplying an input signal is formed of 2-layer structure of an SOG film 26 of lower layer and a P-SixOy film 27 of upper layer. An SOG film does not charge static electricity at the forming time, and does not statically affect the influence of polysilicon wires 5 and 6 (gate electrodes G1). Further, an SiOy film 27 formed by plasma precipitation technique on the film 26 is an elaborately fabricated film, thereby preventing the occurrence of defect such as the deformation of the wire.
    • 96. 发明专利
    • SEMICONDUCTOR DEVICE
    • JPS57194549A
    • 1982-11-30
    • JP7921181
    • 1981-05-27
    • HITACHI LTD
    • MIYAZAWA HIROYUKIKASAHARA OSAMUSHIMIZU SHINJI
    • H01L27/10H01L21/3205H01L21/8242H01L23/52H01L27/108H01L29/78
    • PURPOSE:To prevent the formation of the SiO2 film for the titled device by a method wherein, when forming the gate electrode wiring of the semiconductor device consisting of the lamination of a polycrystalline Si film and an Mo film, a high melting point metal such as Ti and the like, having a higher reducibility than Si, is mixed in the Mo film, and oxygen is trapped when a heat treatment is performed. CONSTITUTION:After a field oxide film 7 and a gate oxide film 9 have been formed on an Si substrate 5, a polycrystalline Si films 11A and 12B, and Ti containing Mo films 12a and 12b are formed, and a patterning is performed. Subsequently, impurity diffusion regions 18 and 19 are formed by performing an ion implantation, a PSG film 22 is coated on the above, and then the drive-in and the like for the diffusion regions 18 and 19 are performed by heat treatments. When performing these heat treatments, the oxygen in the electrode wiring is trapped by combining with the Ti and the formation of the SiO2 film between the polycrystalline Si film and the Mo film is checked, thereby enabling to prevent the increase of the contact resistance between these two layers.