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91. 发明专利

JP2002093946A SEMICONDUCTOR DEVICE AND MOUNTING STRUCTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JP2002093946A
公开(公告)日：2002-03-29
申请号：JP2000283880
申请日：2000-09-19
申请人： HITACHI LTD
发明人： KAZAMA ATSUSHI , MIURA HIDEO , YAGUCHI AKIHIRO
IPC分类号： H01L23/29 , H01L21/56 , H01L21/60 , H01L23/12 , H01L23/31 , H01L23/48 , H01L23/485 , H05K1/11 , H05K3/34
摘要： PROBLEM TO BE SOLVED: To realize a compact semiconductor device superior in electric performance which can be manufactured on the wafer level and has a high reliability of outer terminals against strains due to thermal expansion difference between a semiconductor element and a printed circuit board and a reduced wiring capacitance. SOLUTION: A low-elasticity and thick stress-relaxing layer 5 lies among a semiconductor element 1, a wiring 7 and lands 6 to absorb the thermal expansion difference between the semiconductor element 1 and a printed circuit board 10, thereby improving the reliability of outer terminals 9. Laying the relaxing layer 5 reduces the capacitance between the wiring 7 and an inner wiring of the semiconductor element 1 to improve the electric performance. Laying an insulation film 4 between the wiring 7 and the semiconductor element 1 reduces the capacitance around element electrodes 2 where the relaxing layer 5 is formed. Lands 11 on the circuit board 10 project into the outer terminals 9 and miniaturized to more improve the reliability of the outer terminals 9 and allow narrowed pitches of the terminals 9.

92. 发明专利

JP2000315707A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JP2000315707A
公开(公告)日：2000-11-14
申请号：JP12259399
申请日：1999-04-28
申请人： HITACHI LTD
发明人： TERASAKI TAKESHI , MIURA HIDEO , KOJIMA KIYOMI , YAGUCHI AKIHIRO , TANAKA TADAYOSHI
IPC分类号： H01L21/60
摘要： PROBLEM TO BE SOLVED: To accomplish a highly reliable semiconductor device on which the fatigue life of a solder bump can be extended. SOLUTION: The diameter of the area equal to the area of the part, which comes in contact with the pad 9 or the pad 10 of a lead-free solder bump 7, is set as A size and the diameter of the sphere of the cubic volume equal to the cubic volume of the lead-free solder bump 7 is set as B size. In this case, when the A size of the solder bump 7 is formed in the size which is 0.8 to 1.1 times of the B size, the contact surface of the solder bump 7 and the pads 9 and 10 is increased, and the intensity of junction interface is increased. Also, in proportion to the A-size becoming larger, it becomes cylindrical shape, the regidity of the solder bump 7 itself becomes higher, and the amount of thermal deformation added to the solder bump 7 becomes small.

93. 发明专利

JP2000269371A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR MOUNTING STRUCTURE MEMBER 失效
公开(公告)号：JP2000269371A
公开(公告)日：2000-09-29
申请号：JP6783999
申请日：1999-03-15
申请人： HITACHI LTD
发明人： YAGUCHI AKIHIRO , MIURA HIDEO , KAZAMA ATSUSHI , NISHIMURA ASAO
IPC分类号： H01L23/12 , H01L21/60 , H01L23/31 , H01L23/485
摘要： PROBLEM TO BE SOLVED: To prevent and restrain break of external terminals and improve reliability by forming protrusions on lands to which the external terminals to be bonded, bonding the external terminals composed of solder material or the like and interposing a protective film between a passivation film and the lands. SOLUTION: This semiconductor device is provided with a semiconductor element 1, a passivation film 3 which is so formed that the surfaces of pads 2 on the surface 1a of the semiconductor device are exposed, a conductive wiring 4 connected with the pads 2, lands 5 continuously connected with the conductive wiring 4, a protective film 7, protrusions 6 formed on the lands 5, and external terminals 8. The external terminals 8 are bonded to protruding parts 6a of the protrusions 6 formed on the lands 5. An interposing part 7a of the protective film 7 is arranged between the lands 5 and the passivation film 3 on the surface 1a of the semiconductor element. As a result, in the vicinity of bonding parts of the protrusions 6 on the semiconductor device side and the external terminals 8, deformation of the external terminals 8 can be restricted by the protrusions 6, and the quantity of deformation can be reduced.

94. 发明专利

JPH11354678A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH11354678A
公开(公告)日：1999-12-24
申请号：JP16178298
申请日：1998-06-10
申请人： HITACHI LTD
发明人： YONEDA NAE , KITANO MAKOTO , YAGUCHI AKIHIRO , TANAKA TADAYOSHI
IPC分类号： H01L23/12 , H01L21/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device having enhanced heat dissipation performance in which a metal plate to be used is produced by a method suitable for mass production at low cost. SOLUTION: An insulating tape 6 bonded to a metal plate 3 of deformed cross-section having a cavity, and a wiring 7 formed on one side of the insulating tape 6 are connected electrically with the electrode of a semiconductor element having one end connected with a bump land 10 which is connected with a spherical electrode 12 and the other end bonded to the cavity 21. The joint is resin sealed and the spherical electrodes 12 are arranged in grid.

95. 发明专利

JPH11260962A BALL GRID ARRAY TYPE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH11260962A
公开(公告)日：1999-09-24
申请号：JP6084698
申请日：1998-03-12
申请人： HITACHI LTD
发明人： YAGUCHI AKIHIRO , HARUTA AKIRA , ICHITANI MASAHIRO , TANAKA TADAYOSHI
IPC分类号： H01L23/12
摘要： PROBLEM TO BE SOLVED: To materialize a highly, reliable BGA(ball grid array)-type semiconductor device, by suppressing disconnection of conductive wiring and the breakage of an external terminal. SOLUTION: Individual insulating films 3 which cover individual lands 2b are separated from one another, and besides dummy wiring 10 is projected, in addition to conductive wiring 2 connected to the land 2b, from the flank 3b of the insulating film 3 covering the land 2b. Hereby, the rate of occupation of the wiring material large in rigidity inside the insulating film 3 can be enlarged, and the restriction of thermal transformation of the insulating film 3 itself can be reinforced by the dummy wiring 10. Moreover, the peeling of the flank 3b of the insulating film can be suppressed by the conductive wiring 2 and the dummy wiring 10, and the increase of the quantity of thermal transformation of the insulating film 3 by the occurrence of the peeling of the flank 3b can be suppressed.

96. 发明专利

JPH1154564A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH1154564A
公开(公告)日：1999-02-26
申请号：JP21291397
申请日：1997-08-07
申请人： HITACHI LTD
发明人： YAGUCHI AKIHIRO , KITANO MAKOTO , NAGAI AKIRA , ANJO ICHIRO , NISHIMURA ASAO
IPC分类号： H01L23/12 , H01L21/60
摘要： PROBLEM TO BE SOLVED: To deform a sealing member in response to the deformation of an adhesive member and to prevent an interface of the adhesive member and the sealing member from being stripped, by using soft material whose elastic modulus is equal to or smaller than that of the adhesive member for the sealing member for covering the electrode-forming surface, the side of the adhesive member and the side of a sheet-like member of a semiconductor device. SOLUTION: An electrode 2 of a semiconductor device 1 is formed on the outer peripheral part of an electrode-forming surface la of the semiconductor device 1, and an adhesive member 3 is not provided in the region where the electrode 2 is formed. The part where the electrode 2 of the semiconductor device 1 is formed is sealed with a sealing member 7 made of soft material such that the sealing member 7 covers the electrode-forming surface la of the semiconductor device 1, the side 3a of the adhesive member 3 and the side 4a of a sheet-like member. The sealing member 7 is made of material whose Young' s modulus is equal to or smaller than that of the adhesive member 3. Therefore, when the semiconductor device is heated and cooled, the sealing member 7 is deformed in response to the thermal deformation of the adhesive member 3.

97. 发明专利

JPH09330961A SEMICONDUCTOR DEVICE AND ITS MANUFACTURE 失效
公开(公告)号：JPH09330961A
公开(公告)日：1997-12-22
申请号：JP14727496
申请日：1996-06-10
申请人： HITACHI LTD
发明人： KITANO MAKOTO , ANJO ICHIRO , TANAKA HIDEKI , NISHIMURA ASAO , YAGUCHI AKIHIRO , TANAKA TADAYOSHI
IPC分类号： G01R1/06 , H01L21/66 , H01L23/12
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which can be inspected accurately for characteristics or reliability even when the arranging pitch of external terminals becomes narrower, can be increased in degree of integration and number of pins, and can be reduced in size and a method for manufacturing the device and, in addition, to prevent the deterioration of the connection reliability of the external terminals even when the device is inspected at a high temperature. SOLUTION: External terminals 6 connected to the electrodes of a semiconductor element 1 are electrically connected with terminals 5 for inspection which are provided in the periphery section of an insulating member 2 at a pitch larger than that of the terminals 6. When the inspection of a semiconductor device for characteristics or reliability is completed, the terminals 5 and part (peripheral section) of the member 2 mounting the terminals 5 are cut off. It is also possible, alternatively, to provide the terminals 6 to a wiring pattern 3 after the inspection performed by using the terminals 5 is completed.

98. 发明专利

JPH08250537A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH08250537A
公开(公告)日：1996-09-27
申请号：JP6397096
申请日：1996-03-21
申请人： HITACHI LTD
发明人： MURAKAMI HAJIME , TSUBOSAKI KUNIHIRO , ICHITANI MASAHIRO , NISHI KUNIHIKO , ANJO ICHIRO , NISHIMURA ASAO , KITANO MAKOTO , YAGUCHI AKIHIRO , KAWAI SUEO , OGATA MASAJI , EGUCHI KUNIYUKI , KOKADO HIROYOSHI , SEGAWA MASANORI , HOZOJI HIROYUKI , YOKOYAMA TAKASHI , KANESHIRO TOKUYUKI , KANEDA AIZO , SAEKI JUNICHI , NAKAMURA SHOZO , HASEBE AKIO , KIKUCHI HIROSHI , YOSHIDA ISAMU
IPC分类号： H01L23/28 , H01L21/60 , H01L23/50
摘要： PURPOSE: To increase a signal transmission speed and lessen an electric noise due to a stray capacitance between a semiconductor chip and leads by locating outer terminals for signals and inner leads in the same direction against a common inner lead section. CONSTITUTION: Inner leads 3A have their one ends being integrated with outer leads 3B. The other ends of the inner leads 3A are extended to the center of a DRAM 1. Tips of the other ends of the inner leads 3A are connected to BP's (bonding pad) arranged in the center of the DRAM1 through bonding wires 5. By this method, a signal transmission speed can be increased and an electric noise can be lessened due to a stray capacitance between a semiconductor chip and the leads. At the same time, shorts between the bonding wires of the inner leads for signals and the common inner leads can be prevented.

99. 发明专利

JPH08241953A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH08241953A
公开(公告)日：1996-09-17
申请号：JP6397196
申请日：1996-03-21
申请人： HITACHI LTD
发明人： MURAKAMI HAJIME , TSUBOSAKI KUNIHIRO , ICHITANI MASAHIRO , NISHI KUNIHIKO , ANJO ICHIRO , NISHIMURA ASAO , KITANO MAKOTO , YAGUCHI AKIHIRO , KAWAI SUEO , OGATA MASAJI , EGUCHI KUNIYUKI , KOKADO HIROYOSHI , SEGAWA MASANORI , HOZOJI HIROYUKI , YOKOYAMA TAKASHI , KANESHIRO TOKUYUKI , KANEDA AIZO , SAEKI JUNICHI , NAKAMURA SHOZO , HASEBE AKIO , KIKUCHI HIROSHI , YOSHIDA ISAMU
IPC分类号： H01L21/60 , H01L23/50
摘要： PURPOSE: To obtain a semiconductor device which enhances a signal transmission rate by a stray capacitance between a semiconductor chip and a lead, which reduces an electric noise and which reduces a leak between inner leads. CONSTITUTION: In a semiconductor device, a plurality of inner leads are bonded, by an adhesive, onto the circuit formation face of a semiconductor chip via an insulator, and the inner leads and the semiconductor chip are connected electrically by respective bonding wires 5 so as to be sealed with a resin. In the semiconductor device, a resin molded body 6 which covers a part or the whole of the circuit formation face of the semiconductor chip is formed, at least a part of the inner leads is covered with the resin molded body 6, and the resin molded body 6, the inner leads, the bonding wires 5 and the semiconductor chip are sealed with a resin.

100. 发明专利

JPH08241905A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH08241905A
公开(公告)日：1996-09-17
申请号：JP6396996
申请日：1996-03-21
申请人： HITACHI LTD
发明人： MURAKAMI HAJIME , TSUBOSAKI KUNIHIRO , ICHITANI MASAHIRO , NISHI KUNIHIKO , ANJO ICHIRO , NISHIMURA ASAO , KITANO MAKOTO , YAGUCHI AKIHIRO , KAWAI SUEO , OGATA MASAJI , EGUCHI KUNIYUKI , KOKADO HIROYOSHI , SEGAWA MASANORI , HOZOJI HIROYUKI , YOKOYAMA TAKASHI , KANESHIRO TOKUYUKI , KANEDA AIZO , SAEKI JUNICHI , NAKAMURA SHOZO , HASEBE AKIO , KIKUCHI HIROSHI , YOSHIDA ISAMU
IPC分类号： H01L21/60 , H01L23/50
摘要： PURPOSE: To improve a signal transmission rate due to the floating capacitance between a semiconductor chip and a lead and to reduce electrical noise by partially forming an insulator along a part where a circuit formation surface faces an inner lead part. CONSTITUTION: An insulation film 4A is provided in advance at the total or one portion of a face which mostly closely contacts the semiconductor chip of a surface opposing the main surface of a semiconductor chip 1 of an inner lead 3A1 for signal and a shared inner lead 3A2 , for example, in the state of a lead frame 3 and the insulation film 4A and the semiconductor chip 1 are adhered and fixed by an adhesive on assembly, thus reducing the area of the film 4A. Also, the inner lead 3A1 for signal/shared inner lead 3A2 and the film 4A can be properly aligned.

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