专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

91. 发明申请

US20090268848A1 Systems and Methods for Filter Based Media Defect Detection 有权
标题翻译：基于滤波器的介质缺陷检测系统与方法
公开(公告)号：US20090268848A1
公开(公告)日：2009-10-29
申请号：US12111268
申请日：2008-04-29
申请人： Weijun Tan , Shaohua Yang , George Mathew , Du Li
发明人： Weijun Tan , Shaohua Yang , George Mathew , Du Li
IPC分类号： H04L27/00
CPC分类号： H04L25/067 , G01R31/31932
摘要： Various embodiments of the present invention provide systems and methods for media defect detection. For example, a data receiving system is disclosed that includes a data signal provided from a medium that may include a defective portion. An absolute value circuit receives the data signal and provides an output corresponding to an absolute value of the data signal. The output corresponding to the absolute value of the data signal is input to a filter that filters it and provides a filtered output. In some cases, the filter is a digital filter operable to integrate the absolute value of the data signal. A comparator receives the output from the filter and compares it with a threshold value. The result of the comparison indicates a defect status of the medium.
摘要翻译：本发明的各种实施例提供了用于介质缺陷检测的系统和方法。例如，公开了一种数据接收系统，其包括从可能包括缺陷部分的介质提供的数据信号。绝对值电路接收数据信号并提供对应于数据信号的绝对值的输出。与数据信号的绝对值相对应的输出被输入到过滤器并提供滤波输出的滤波器。在某些情况下，滤波器是可以对数据信号的绝对值进行积分的数字滤波器。比较器从滤波器接收输出并将其与阈值进行比较。比较结果表明介质的缺陷状态。

92. 发明授权

US08773794B2 Systems and methods for block-wise inter-track interference compensation 有权
标题翻译：用于块式轨道间干扰补偿的系统和方法
公开(公告)号：US08773794B2
公开(公告)日：2014-07-08
申请号：US13186213
申请日：2011-07-19
申请人： George Mathew , Jongseung Park , Shaohua Yang , Erich F. Haratsch
发明人： George Mathew , Jongseung Park , Shaohua Yang , Erich F. Haratsch
IPC分类号： G11B5/09
CPC分类号： G11B20/10046 , G11B5/012 , G11B5/09 , G11B19/045 , G11B20/10398 , G11B20/1217 , G11B2020/10759 , G11B2020/1232 , G11B2020/1298 , G11B2220/2516
摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a block-wise data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, and an inter-track interference signal estimator circuit. The data buffer is operable to store a previous track data set corresponding to a block. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set across the block based at least in part on the previous track data set and a current track data set. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set across the block based at least in part on the previous track data set and the inter-track interference response from the previous track data set.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。作为示例，讨论了包括数据缓冲器，轨道间干扰响应电路和轨道间干扰信号估计器电路的块状数据处理电路。数据缓冲器可操作以存储对应于块的先前轨道数据集。轨道间干扰响应电路可操作以至少部分地基于先前的轨道数据集和当前轨道数据集来估计来自块的前一轨道数据集的轨道间干扰响应。轨道间干扰信号估计器电路可操作以至少部分地基于先前的轨道数据集和来自前一轨道数据集的轨道间干扰响应来计算跨越块的先前轨道数据集的轨道间干扰。

93. 发明授权

US08749908B2 Systems and methods for sync mark detection 有权
标题翻译：用于同步标记检测的系统和方法
公开(公告)号：US08749908B2
公开(公告)日：2014-06-10
申请号：US13050048
申请日：2011-03-17
申请人： Haitao Xia , Shaohua Yang , George Mathew
发明人： Haitao Xia , Shaohua Yang , George Mathew
IPC分类号： G11B5/09
CPC分类号： G11B5/59616
摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is disclosed that includes an equalizer circuit and a data detection circuit. The equalizer circuit is operable to filter a series of samples based at least in part on a filter coefficient and to provide a corresponding series of filtered samples. The data detection circuit includes: a core data detector circuit and a coefficient determination circuit. The core data detector circuit is operable to perform a data detection process on the series of filtered samples and to provide a most likely path and a next most likely path. The coefficient determination circuit operable to update the filter coefficient based at least in part on the most likely path and the next most likely path.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。作为示例，公开了包括均衡器电路和数据检测电路的数据处理电路。均衡器电路可操作以至少部分地基于滤波器系数对一系列样本进行滤波，并提供相应的一系列滤波样本。数据检测电路包括：核心数据检测器电路和系数确定电路。核心数据检测器电路可操作以对一系列经滤波的样本执行数据检测处理，并提供最可能的路径和下一个最可能的路径。系数确定电路可操作以至少部分地基于最可能的路径和下一个最可能的路径来更新滤波器系数。

94. 发明授权

US08526133B2 Systems and methods for user data based fly height calculation 有权
标题翻译：基于用户数据的飞行高度计算的系统和方法
公开(公告)号：US08526133B2
公开(公告)日：2013-09-03
申请号：US13185562
申请日：2011-07-19
申请人： Haitao Xia , George Mathew , Ming Jin , Shaohua Yang
发明人： Haitao Xia , George Mathew , Ming Jin , Shaohua Yang
IPC分类号： G11B21/02
CPC分类号： G11B5/6029
摘要： Various embodiments of the present invention provide systems and methods for calculating and/or modifying fly height. For example, a circuit for calculating fly height is disclosed that includes: a first pattern detector circuit, a second pattern detector circuit, a first pattern fly height calculation circuit, a second pattern fly height calculation circuit, a first averaging circuit, a second averaging circuit, and a combining circuit.
摘要翻译：本发明的各种实施例提供了用于计算和/或修改飞行高度的系统和方法。例如，公开了一种用于计算飞行高度的电路，其包括：第一模式检测器电路，第二模式检测器电路，第一模式飞行高度计算电路，第二模式飞行高度计算电路，第一平均电路，第二平均电路和组合电路。

95. 发明授权

US08379498B2 Systems and methods for track to track phase alignment 有权
标题翻译：轨道跟踪相位对准的系统和方法
公开(公告)号：US08379498B2
公开(公告)日：2013-02-19
申请号：US13186146
申请日：2011-07-19
申请人： George Mathew , Ming Jin , Shaohua Yang , Erich F. Haratsch
发明人： George Mathew , Ming Jin , Shaohua Yang , Erich F. Haratsch
IPC分类号： G11B5/09
CPC分类号： G11B20/10046 , G11B5/012 , G11B5/09 , G11B19/045 , G11B20/10398 , G11B20/1217 , G11B2020/10759 , G11B2020/1232 , G11B2020/1298 , G11B2220/2516
摘要： Various embodiments of the present invention provide systems and methods for data processing. As an example, a data processing circuit is discussed that includes: a data buffer, an inter-track interference response circuit, an inter-track interference signal estimator circuit, and a sync mark detector circuit. The data buffer is operable to store a previous track data set that includes a first sync pattern. The inter-track interference response circuit is operable to estimate an inter-track interference response from the previous track data set based at least in part on the previous track data set and a current track data set. The current track data set includes a second sync pattern. The inter-track interference signal estimator circuit is operable to calculate an inter-track interference from the previous track data set based at least in part on the previous track data set and the inter-track interference response from the previous track data set. The sync mark detector circuit operable to identify the first sync pattern in the inter-track interference from the previous track data set in the current track data set.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。作为示例，讨论了包括数据缓冲器，轨道间干扰响应电路，轨道间干扰信号估计器电路和同步标记检测器电路的数据处理电路。数据缓冲器可操作以存储包括第一同步模式的先前轨迹数据集。轨道间干扰响应电路可用于至少部分地基于先前的轨道数据集和当前轨道数据集来估计来自先前轨道数据集的轨道间干扰响应。当前轨道数据集包括第二同步模式。轨道间干扰信号估计器电路可用于至少部分地基于先前的轨道数据集和来自前一轨道数据集的轨道间干扰响应来计算来自先前轨道数据集的轨道间干扰。同步标记检测器电路可用于识别来自当前轨道数据集中的先前轨道数据集的轨道间干扰中的第一同步模式。

96. 发明授权

US09019647B2 Systems and methods for conditional positive feedback data decoding 有权
标题翻译：条件正反馈数据解码的系统和方法
公开(公告)号：US09019647B2
公开(公告)日：2015-04-28
申请号：US13596947
申请日：2012-08-28
申请人： Fan Zhang , Shaohua Yang
发明人： Fan Zhang , Shaohua Yang
IPC分类号： G11B5/09 , G11B20/10 , H03M7/00 , H04L27/06 , H03M13/11 , H03M13/37 , H03M13/00 , G11B5/012 , H03M13/15 , H03M13/41
CPC分类号： G11B5/09 , G11B5/012 , G11B20/10268 , G11B20/10509 , H03M7/00 , H03M13/1128 , H03M13/1515 , H03M13/3753 , H03M13/41 , H03M13/6331 , H03M13/6343 , H04L25/03286 , H04L25/03318 , H04L27/06
摘要： The present inventions are related to systems and methods for information data processing included selective decoder message determination. In one example, a data processing system is disclosed that includes a data decoder circuit operable to apply a conditional data decoding algorithm to a data set to yield a decoded output. The conditional decoding algorithm is operable to calculate node messages using an approach selected from a group consisting of: a first message determination mechanism, and a second message determination mechanism; where one of the first message determination mechanism and the second message determination mechanism is selected based upon a condition that includes a global iteration count applied to the data set.
摘要翻译：本发明涉及包括选择性解码器消息确定的信息数据处理的系统和方法。在一个示例中，公开了一种数据处理系统，其包括数据解码器电路，其可操作以将条件数据解码算法应用于数据集以产生解码输出。条件解码算法可操作以使用从由以下组成的组中选择的方法来计算节点消息：第一消息确定机制和第二消息确定机制; 其中基于包括应用于数据集的全局迭代计数的条件来选择第一消息确定机制和第二消息确定机制中的一个。

97. 发明授权

US08972761B2 Systems and methods for idle clock insertion based power control 有权
标题翻译：基于空闲时钟插入的功率控制系统和方法
公开(公告)号：US08972761B2
公开(公告)日：2015-03-03
申请号：US13364217
申请日：2012-02-01
申请人： Shaohua Yang , Changyou Xu , Fan Zhang
发明人： Shaohua Yang , Changyou Xu , Fan Zhang
IPC分类号： G06F1/32
CPC分类号： G06F1/324 , G06F1/3268 , G11B19/02 , G11B19/209 , Y02D10/126 , Y02D10/154
摘要： The present inventions are related to systems and methods for data processing, and more particularly to systems and methods for power governance in a data processing system. In one particular case, a system is disclosed that includes a first data processing circuit operable to apply a data detection algorithm to a data input synchronous to a first clock, and a second data processing circuit operable to apply a subsequent data processing algorithm to an output derived from the first data processing circuit synchronous to a second clock, and an idle time enforcement circuit operable to modify an average frequency of at least one of the first clock and the second clock.
摘要翻译：本发明涉及用于数据处理的系统和方法，更具体地涉及用于数据处理系统中的功率治理的系统和方法。在一个具体情况下，公开了一种系统，其包括可操作以将数据检测算法应用于与第一时钟同步的数据输入的第一数据处理电路，以及可操作以将后续数据处理算法应用于输出的第二数据处理电路来自与第二时钟同步的第一数据处理电路，以及空闲时间执行电路，其可操作以修改第一时钟和第二时钟中的至少一个的平均频率。

98. 发明授权

US08947804B2 Systems and methods for combined binary and non-binary data processing 有权
标题翻译：用于组合二进制和非二进制数据处理的系统和方法
公开(公告)号：US08947804B2
公开(公告)日：2015-02-03
申请号：US13316758
申请日：2011-12-12
申请人： Zongwang Li , Chung-Li Wang , Shaohua Yang , Changyou Xu , Lei Chen , Yang Han
发明人： Zongwang Li , Chung-Li Wang , Shaohua Yang , Changyou Xu , Lei Chen , Yang Han
IPC分类号： G11B5/02 , H03M13/11
CPC分类号： G11B5/02 , H03M13/1171
摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes a combination data decoder circuit. The combination data decoder circuit includes: a non-binary data decoder circuit and a binary data decoder circuit.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。例如，公开了一种包括组合数据解码器电路的数据处理系统。组合数据解码器电路包括：非二进制数据解码器电路和二进制数据解码器电路。

99. 发明授权

US08929017B2 Systems and methods for SNR measurement using equalized data 有权
标题翻译：使用均衡数据进行SNR测量的系统和方法
公开(公告)号：US08929017B2
公开(公告)日：2015-01-06
申请号：US13316953
申请日：2011-12-12
申请人： Haitao Xia , Ming Jin , Dahua Qin , Shaohua Yang
发明人： Haitao Xia , Ming Jin , Dahua Qin , Shaohua Yang
IPC分类号： G11B5/035 , G11B5/596 , G11B20/10
CPC分类号： G11B5/59605 , G11B5/035 , G11B5/09 , G11B5/59622 , G11B20/10046 , G11B2220/415
摘要： Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is discussed that includes: an equalizer circuit, a signal to noise ratio calculation circuit, and a parameter adjustment circuit. The equalizer circuit is operable to equalize a data input to yield an equalized output. The signal to noise ratio calculation circuit is operable to calculate a signal to noise ratio of the equalized output based at least in part on a noise power derived from the equalized output. The parameter adjustment circuit is operable to adjust a parameter based at least in part on the signal to noise ratio.
摘要翻译：本发明的各种实施例提供了用于数据处理的系统和方法。例如，讨论了包括均衡器电路，信噪比计算电路和参数调整电路的数据处理系统。均衡器电路可操作以均衡数据输入以产生均衡的输出。信噪比计算电路可用于至少部分地基于从均衡输出得到的噪声功率来计算均衡输出的信噪比。参数调整电路可操作以至少部分地基于信噪比来调整参数。

100. 发明授权

US08887034B2 Systems and methods for short media defect detection 有权
标题翻译：用于短介质缺陷检测的系统和方法
公开(公告)号：US08887034B2
公开(公告)日：2014-11-11
申请号：US13088119
申请日：2011-04-15
申请人： Fan Zhang , Shaohua Yang
发明人： Fan Zhang , Shaohua Yang
IPC分类号： G06F7/02 , H03M13/00 , G06F11/07
CPC分类号： G06F11/0754
摘要： Various embodiments of the present invention provide systems and methods for media defect detection. As an example, a data processing circuit is disclosed that includes a defect detector circuit and a comparator circuit. The defect detector circuit is operable to calculate a correlation value combining at least three of a data input derived from a medium, a detector extrinsic output, a detector intrinsic output and a decoder output. The comparator circuit is operable to compare the correlation value to a threshold value and to assert a media defect indicator when the correlation value is less than the threshold value.
摘要翻译：本发明的各种实施例提供了用于介质缺陷检测的系统和方法。作为示例，公开了包括缺陷检测器电路和比较器电路的数据处理电路。缺陷检测器电路可操作以计算组合从介质导出的数据输入，检测器外在输出，检测器本征输出和解码器输出中的至少三个的相关值。比较器电路可操作以将相关值与阈值进行比较，并且当相关值小于阈值时断言介质缺陷指示符。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式