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    • 93. 发明授权
    • Microresonantor systems and methods of fabricating the same
    • 微谐振器系统及其制造方法
    • US07764852B2
    • 2010-07-27
    • US11888015
    • 2007-07-30
    • Michael Renne Ty TanShih-Yuan WangDuncan StewartDavid A. Fattal
    • Michael Renne Ty TanShih-Yuan WangDuncan StewartDavid A. Fattal
    • G02B6/26
    • H01S5/1075B82Y20/00G02B6/12007H01S5/026H01S5/0424H01S5/1032H01S5/1042H01S5/34306
    • Various embodiments of the present invention are related to microresonator systems and to methods of fabricating the microresonator systems. In one embodiment, a microresonator system comprises a substrate having a top surface layer and at least one waveguide embedded in the substrate and positioned adjacent to the top surface layer of the substrate. The microresonator system also includes a microresonator having a top layer, an intermediate layer, a bottom layer, a peripheral region, and a peripheral coating. The bottom layer of the microresonator is attached to and in electrical communication with the top surface layer of the substrate. The microresonator is positioned so that at least a portion of the peripheral region is located above the at least one waveguide. The peripheral coating covers at least a portion of the peripheral surface and has a relatively lower index of refraction than the top, intermediate, and bottom layers of the microresonator.
    • 本发明的各种实施例涉及微谐振器系统和制造微谐振器系统的方法。 在一个实施例中,微谐振器系统包括具有顶表面层和嵌入在衬底中的至少一个波导并且邻近衬底的顶表面层定位的衬底的衬底。 微谐振器系统还包括具有顶层,中间层,底层,周边区域和外围涂层的微谐振器。 微谐振器的底层附着到衬底的顶表面层并与其电连通。 定位微谐振器使得周边区域的至少一部分位于至少一个波导的上方。 周边涂层覆盖周边表面的至少一部分,并且具有比微谐振器的顶层,中间层和底层更低的折射率。
    • 95. 发明授权
    • Mixed-scale electronic interface
    • 混合电子接口
    • US07692215B2
    • 2010-04-06
    • US11701086
    • 2007-01-31
    • R. Stanley WilliamsGregory S. SniderDuncan Stewart
    • R. Stanley WilliamsGregory S. SniderDuncan Stewart
    • H01L27/10H01L29/73
    • H01L29/0665B82Y10/00G11C2213/81H01H1/0094H01L27/285H01L29/0673H01L29/0676H01L51/0591H01L51/0595
    • Embodiments of the present invention are directed to mixed-scale electronic interfaces, included in integrated circuits and other electronic devices, that provide for dense electrical interconnection between microscale features of a predominantly microscale or submicroscale layer and nanoscale features of a predominantly nanoscale layer. The predominantly nanoscale layer, in one embodiment of the present invention, comprises a tessellated pattern of submicroscale or microscale pads densely interconnected by nanowire junctions between sets of parallel, closely spaced nanowire bundles. The predominantly submicroscale or microscale layer includes pins positioned complementarily to the submicroscale or microscale pads in the predominantly nanoscale layer. Pins can be configured according to any periodic tiling of the microscale layer.
    • 本发明的实施例涉及包括在集成电路和其他电子设备中的混合比例电子接口,其提供主要是微米级或亚微米级的微尺度特征之间的密集电互连以及主要为纳米尺度层的纳米尺度特征。 在本发明的一个实施方案中,主要是纳米尺度层包括通过平行的,紧密间隔的纳米线束组之间的纳米线结密合地互连的亚微米级或微米级的镶嵌图案。 主要是亚微米级或微尺度层包括与主要是纳米级层中的亚微米级或微尺度焊盘互补定位的引脚。 引脚可以根据微层的任何周期性平铺进行配置。