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91. 外观设计

USD694290S1 Freezer shelf 有权
标题翻译：冷冻架
公开(公告)号：USD694290S1
公开(公告)日：2013-11-26
申请号：US29425621
申请日：2012-06-25
申请人： Philip F. Hottmann , Alan Wood
设计人： Philip F. Hottmann , Alan Wood

92. 发明申请

US20130056108A1 Method of Producing a Composite Pipe and Such a Composite Pipe 有权
标题翻译：复合管和这种复合管的生产方法
公开(公告)号：US20130056108A1
公开(公告)日：2013-03-07
申请号：US13636920
申请日：2011-03-17
申请人： Alan Wood , Horst Sandner
发明人： Alan Wood , Horst Sandner
IPC分类号： B32B37/14 , B32B37/06 , F16L9/14
CPC分类号： F16L9/14 , B29C47/0023 , B29C47/0026 , B29C47/8835 , B29C47/8895 , B29C47/903 , B29C47/905 , B29C63/10 , B29C71/0063 , B29C2071/022 , B29C2791/006 , B29K2071/00 , B29K2081/00 , B29K2995/0041 , B29L2023/22 , B32B1/08 , B32B5/02 , B32B27/12 , B32B27/285 , B32B27/288 , B32B2260/021 , B32B2260/046 , B32B2262/0269 , B32B2262/101 , B32B2262/106 , B32B2307/50 , B32B2307/546 , B32B2307/552 , B32B2597/00 , F16L9/121 , F16L9/133 , F16L11/081 , F16L11/085 , Y10T156/10
摘要： A composite pipe comprises a polyetheretherketone innermost pipe around which a reinforcing overwrap is arranged. A protective sheath surrounds the overwrap. Such a composite pipe may be made by selecting a polyetheretherketone pipe having an outer region having a crystallinity of less than 25%; overlaying the selected pipe with overwrap; and subjecting the combination to heat, thereby causing the crystallinity of the outer region of the polyetheretherketone pipe to increase. The method reduces the risk of pipe failure.
摘要翻译：复合管包括聚醚醚酮最内管，其上布置有加强外包裹物。护套围绕外包裹物。这种复合管可以通过选择具有小于25％的结晶度的外部区域的聚醚醚酮管制成; 用外包装覆盖所选择的管道; 并使组合物加热，从而使聚醚醚酮管的外部区域的结晶度增加。该方法降低了管道故障的风险。

93. 发明申请

US20100171217A1 THROUGH-WAFER INTERCONNECTS FOR PHOTOIMAGER AND MEMORY WAFERS 有权
标题翻译：用于光电子和存储器波形的通过波形互连
公开(公告)号：US20100171217A1
公开(公告)日：2010-07-08
申请号：US12725724
申请日：2010-03-17
申请人： Salman Akram , Charles Watkins , Mark Hiatt , David Hembree , James Wark , Warren Farnworth , Mark Tuttle , Sidney Rigg , Steven Oliver , Kyle Kirby , Alan Wood , Lu Velicky
发明人： Salman Akram , Charles Watkins , Mark Hiatt , David Hembree , James Wark , Warren Farnworth , Mark Tuttle , Sidney Rigg , Steven Oliver , Kyle Kirby , Alan Wood , Lu Velicky
IPC分类号： H01L23/498
CPC分类号： H01L21/76877 , H01L21/6835 , H01L21/76898 , H01L23/481 , H01L24/45 , H01L27/14634 , H01L27/14636 , H01L2221/6834 , H01L2224/02166 , H01L2224/0554 , H01L2224/05567 , H01L2224/05573 , H01L2224/16 , H01L2224/45144 , H01L2224/48463 , H01L2924/00014 , H01L2924/01013 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.
摘要翻译：公开了一种用于成像器，存储器和其他集成电路应用的透晶片互连，从而消除了对引线接合的需要，使得结合这种互连的器件可堆叠并且实现成像器件的晶片级封装。此外，实现了更小且更可靠的管芯封装，并且由于信号路径长度的减小，电路寄生（例如，L和R）被减小。

94. 发明申请

US20080111213A1 THROUGH-WAFER INTERCONNECTS FOR PHOTOIMAGER AND MEMORY WAFERS 失效
标题翻译：用于光电子和存储器波形的通过波形互连
公开(公告)号：US20080111213A1
公开(公告)日：2008-05-15
申请号：US11924781
申请日：2007-10-26
申请人： Salman Akram , Charles Watkins , Mark Hiatt , David Hembree , James Wark , Warren Farnworth , Mark Tuttle , Sidney Rigg , Steven Oliver , Kyle Kirby , Alan Wood , Lu Velicky
发明人： Salman Akram , Charles Watkins , Mark Hiatt , David Hembree , James Wark , Warren Farnworth , Mark Tuttle , Sidney Rigg , Steven Oliver , Kyle Kirby , Alan Wood , Lu Velicky
IPC分类号： H01L23/488
CPC分类号： H01L21/76877 , H01L21/6835 , H01L21/76898 , H01L23/481 , H01L24/45 , H01L27/14634 , H01L27/14636 , H01L2221/6834 , H01L2224/02166 , H01L2224/0554 , H01L2224/05567 , H01L2224/05573 , H01L2224/16 , H01L2224/45144 , H01L2224/48463 , H01L2924/00014 , H01L2924/01013 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.
摘要翻译：公开了一种用于成像器，存储器和其他集成电路应用的透晶片互连，从而消除了对引线接合的需要，使得结合这种互连的器件可堆叠并且实现成像器件的晶片级封装。此外，实现了更小且更可靠的管芯封装，并且由于信号路径长度的减小，电路寄生（例如，L和R）被减小。

95. 发明申请

US20080005191A1 System And Method For Implementing A Partial-Blocking Consistency Point In A Database 失效
标题翻译：在数据库中实现部分阻塞一致性点的系统和方法
公开(公告)号：US20080005191A1
公开(公告)日：2008-01-03
申请号：US11427203
申请日：2006-06-28
申请人： Scott David Lashley , John Frederic Miller , Clarence Madison Pruet , Daniel Alan Wood
发明人： Scott David Lashley , John Frederic Miller , Clarence Madison Pruet , Daniel Alan Wood
IPC分类号： G06F17/30
CPC分类号： G06F17/30306 , Y10S707/99942 , Y10S707/99954
摘要： A partial-blocking consistency point system identifies transaction updates with a consistency point ID associated with a consistency point sequence number, records consistency point data that identify a location of the partial-blocking consistency point, flushes to a non-volatile storage the transaction updates identified with the consistency point sequence number without blocking transaction activity, and hardens to the non-volatile storage the recorded partial-blocking consistency point so that data associated with the recorded partial-blocking consistency point can be recovered. The consistency point sequence number is incremented each time the partial-blocking consistency point is recorded to uniquely identify the partial-blocking consistency point and transaction updates associated with the partial-blocking consistency point. The transaction updates identified with the consistency point sequence number are processed to improve efficiency of the flushing of the transaction updates.
摘要翻译：部分阻塞一致性点系统使用与一致性点序列号相关联的一致性点ID来识别事务更新，记录标识部分阻塞一致性点的位置的一致性点数据，刷新事件更新识别的非易失性存储具有一致性点序列号而不阻塞事务活动，并且硬化到非易失性存储器记录的部分阻塞一致性点，使得可以恢复与记录的部分阻塞一致性点相关联的数据。每次记录部分阻塞一致性点时，一致性点序列号增加，以唯一地标识部分阻塞一致性点和与部分阻塞一致性点相关联的事务更新。处理以一致性点序列号标识的事务更新，以提高事务更新刷新的效率。

96. 发明授权

US07300857B2 Through-wafer interconnects for photoimager and memory wafers 有权
标题翻译：用于光刻机和存储晶圆的透晶片互连
公开(公告)号：US07300857B2
公开(公告)日：2007-11-27
申请号：US10932296
申请日：2004-09-02
申请人： Salman Akram , Charles Watkins , Mark Hiatt , David Hembree , James Wark , Warren Farnworth , Mark Tuttle , Sidney Rigg , Steven Oliver , Kyle Kirby , Alan Wood , Lu Velicky
发明人： Salman Akram , Charles Watkins , Mark Hiatt , David Hembree , James Wark , Warren Farnworth , Mark Tuttle , Sidney Rigg , Steven Oliver , Kyle Kirby , Alan Wood , Lu Velicky
IPC分类号： H01L21/441
CPC分类号： H01L21/76877 , H01L21/6835 , H01L21/76898 , H01L23/481 , H01L24/45 , H01L27/14634 , H01L27/14636 , H01L2221/6834 , H01L2224/02166 , H01L2224/0554 , H01L2224/05567 , H01L2224/05573 , H01L2224/16 , H01L2224/45144 , H01L2224/48463 , H01L2924/00014 , H01L2924/01013 , H01L2924/01014 , H01L2924/01028 , H01L2924/01029 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/00 , H01L2224/05599 , H01L2224/0555 , H01L2224/0556
摘要： A through-wafer interconnect for imager, memory and other integrated circuit applications is disclosed, thereby eliminating the need for wire bonding, making devices incorporating such interconnects stackable and enabling wafer level packaging for imager devices. Further, a smaller and more reliable die package is achieved and circuit parasitics (e.g., L and R) are reduced due to the reduced signal path lengths.
摘要翻译：公开了一种用于成像器，存储器和其他集成电路应用的透晶片互连，从而消除了对引线接合的需要，使得结合这种互连的器件可堆叠并且实现成像器件的晶片级封装。此外，实现了更小且更可靠的管芯封装，并且由于信号路径长度的减小，电路寄生（例如，L和R）被减小。

97. 发明申请

US20070167572A1 Curable dielectric polynorbornene composition and circuit boards made therefrom 审中-公开
标题翻译：可固化的介电聚降冰片烯组合物和由其制成的电路板
公开(公告)号：US20070167572A1
公开(公告)日：2007-07-19
申请号：US10549238
申请日：2004-03-15
申请人： Alan Wood , Richard Day , Martin Williams , David Hall , Cyril Stockil
发明人： Alan Wood , Richard Day , Martin Williams , David Hall , Cyril Stockil
IPC分类号： C08F8/00
CPC分类号： H01B3/441 , C08G61/08 , C08K5/54 , C08L23/16 , C08L65/00 , H05K1/0353 , C08L2666/06
摘要： The present invention relates to a curable dielectric composition comprising polynorbomene, a polymeric diluent that plasticises the composition, a particulate material and a curing agent for the composition. The present invention also relates to a cured form of the curable composition and an electronic circuit board including a cured form of the composition upon which is mounted an electronic circuit.
摘要翻译：本发明涉及可固化的电介质组合物，其包含聚异戊烯，使组合物增塑的聚合物稀释剂，组合物的颗粒材料和固化剂。本发明还涉及可固化组合物的固化形式和包括组合物的固化形式的电子电路板，其上安装有电子电路。

98. 发明申请

US20070124012A1 Programmed material consolidation methods employing machine vision 审中-公开
标题翻译：采用机器视觉的程序化材料整合方法
公开(公告)号：US20070124012A1
公开(公告)日：2007-05-31
申请号：US11699165
申请日：2007-01-29
申请人： Warren Farnworth , Alan Wood
发明人： Warren Farnworth , Alan Wood
IPC分类号： G06F19/00
CPC分类号： H01L24/76 , B29C64/112 , B29C64/129 , B33Y40/00 , G03F7/70416 , H01L24/82 , H01L51/0005 , H01L2924/01033 , H01L2924/01049 , H01L2924/0106 , H01L2924/01077 , H01L2924/09701 , H01L2924/12042 , H01L2924/14 , H01L2924/00
摘要： Programmed material consolidation methods include the use of electronic viewing or machine vision. A feature or location of a support or substrate is recognized or identified and material dispersed relative to the recognized or identified feature or location. The material may be selectively dispensed and at least partially consolidated either actively or passively. By use of the machine vision system, the precise location on a substrate or support element may be determined and communicated to the dispense element of programmed material consolidation system such that a flowable material may be deposited and consolidated at a desired location to form a structural feature.
摘要翻译：程序化材料整合方法包括使用电子观察或机器视觉。识别或识别支撑体或基底的特征或位置，并且相对于识别或识别的特征或位置材料分散。可以选择性地分配材料并且至少部分地被积极地或被动地固结。通过使用机器视觉系统，可以确定衬底或支撑元件上的精确位置并将其传送到编程材料固结系统的分配元件，使得可流动材料可以在期望的位置沉积并固结以形成结构特征。

99. 发明申请

US20070032061A1 Methods of forming through-wafer interconnects and structures resulting therefrom 有权
标题翻译：形成贯穿晶片互连和由此产生的结构的方法
公开(公告)号：US20070032061A1
公开(公告)日：2007-02-08
申请号：US11198338
申请日：2005-08-05
申请人： Warren Farnworth , Alan Wood
发明人： Warren Farnworth , Alan Wood
IPC分类号： H01L21/44
CPC分类号： H01L21/76898 , B33Y80/00 , H01L23/481 , H01L2924/0002 , H01L2924/09701 , H01L2924/12044 , H01L2924/00
摘要： Methods for forming conductive vias or through-wafer interconnects in semiconductor substrates and resulting through wafer interconnect structures are disclosed. In one embodiment of the present invention, a method of forming a through wafer interconnect structure includes the acts of forming an aperture in a first surface of a substrate, depositing a first insulative or dielectric layer on an inner surface of the aperture, depositing an electrically conductive layer over the first dielectric layer, depositing a second insulative or dielectric layer on the inner surface of the aperture over the electrically conductive material, and exposing a portion of the electrically conductive layer through the second, opposing surface of the substrate. Semiconductor devices including through-wafer interconnects produced with the methods of the instant invention are also described.
摘要翻译：公开了用于在半导体衬底中形成导电通孔或贯穿晶片互连以及通过晶片互连结构形成的方法。在本发明的一个实施例中，形成贯穿晶片互连结构的方法包括在衬底的第一表面中形成孔的动作，在孔的内表面上沉积第一绝缘或电介质层，导电层，在所述导电材料的所述孔的内表面上沉积第二绝缘或电介质层，以及将所述导电层的一部分暴露于所述衬底的所述第二相对表面。还描述了包括用本发明的方法生产的晶片间互连的半导体器件。

100. 发明申请

US20060270108A1 Method for fabricating semiconductor components with thinned substrate, circuit side contacts, conductive vias and backside contacts 有权
标题翻译：用薄化衬底制造半导体元件的方法，电路侧触点，导电通孔和背面触点
公开(公告)号：US20060270108A1
公开(公告)日：2006-11-30
申请号：US11497699
申请日：2006-08-02
申请人： Warren Farnworth , Alan Wood , William Hiatt , James Wark , David Hembree , Kyle Kirby , Pete Benson
发明人： Warren Farnworth , Alan Wood , William Hiatt , James Wark , David Hembree , Kyle Kirby , Pete Benson
IPC分类号： H01L21/00
CPC分类号： H01L21/561 , B33Y70/00 , B33Y80/00 , H01L21/563 , H01L21/76898 , H01L23/3114 , H01L23/481 , H01L24/11 , H01L24/13 , H01L24/16 , H01L24/97 , H01L25/0652 , H01L25/0657 , H01L25/50 , H01L2221/68331 , H01L2224/02372 , H01L2224/0401 , H01L2224/05111 , H01L2224/05118 , H01L2224/05124 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05164 , H01L2224/05166 , H01L2224/05169 , H01L2224/05171 , H01L2224/05178 , H01L2224/0518 , H01L2224/05181 , H01L2224/05184 , H01L2224/05559 , H01L2224/05569 , H01L2224/05572 , H01L2224/05624 , H01L2224/05644 , H01L2224/05664 , H01L2224/05666 , H01L2224/13005 , H01L2224/13006 , H01L2224/13009 , H01L2224/13024 , H01L2224/13099 , H01L2224/16145 , H01L2224/73204 , H01L2224/97 , H01L2225/06513 , H01L2225/06524 , H01L2225/06541 , H01L2225/06582 , H01L2225/06596 , H01L2924/0002 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01046 , H01L2924/01047 , H01L2924/01073 , H01L2924/01074 , H01L2924/01075 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/1433 , H01L2924/15311 , H01L2924/15312 , H01L2924/18161 , H01L2924/19015 , H01L2924/19041 , H01L2924/351 , H01L2924/207 , H01L2224/05552 , H01L2924/00 , H01L2924/00014 , H01L2924/013
摘要： A method for fabricating a semiconductor component includes the steps of providing a substrate having a contact on a circuit side thereof, forming an opening from a backside of the substrate to the contact, forming a conductive via in the opening in electrical contact with a surface of the contact, and forming a second contact on the back side in electrical communication with the conductive via. The method can also include the steps of thinning the substrate from the backside, forming insulating layers on the circuit side and the backside, and forming a conductor and terminal contact on the circuit side in electrical communication with the conductive via. A semiconductor component includes the contact on the circuit side, the conductive via in electrical contact with the contact, and the second contact on the backside in electrical communication with the conductive via. The semiconductor component can also include the insulating layers, the conductor and the terminal contact.
摘要翻译：一种制造半导体部件的方法包括以下步骤：提供在其电路侧具有接触的基板，从基板的背面形成开口到触点，在开口中形成导电通孔，该导电通孔与接触，并且在背面形成与导电通孔电连通的第二接触。该方法还可以包括从背面减薄衬底的步骤，在电路侧和背面形成绝缘层，以及在电路侧上形成与导电通孔电连通的导体和端子触点。半导体部件包括电路侧的触点，与触点电接触的导电通孔以及与导电通路电气连通的背侧的第二触点。半导体部件还可以包括绝缘层，导体和端子触头。

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