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1. 发明授权

US06870400B1 Supply voltage detection circuit 有权
标题翻译：电源电压检测电路
公开(公告)号：US06870400B1
公开(公告)日：2005-03-22
申请号：US10678498
申请日：2003-10-03
申请人： Yan Chong , Chiakang Sung , Bonnie Wang , Khai Nguyen , Joseph Huang , Xiaobao Wang , Philip Pan , In Whan Kim , Gopi Rangan , Tzung-Chin Chang , Surgey Y. Shumarayev , Thomas H. White
发明人： Yan Chong , Chiakang Sung , Bonnie Wang , Khai Nguyen , Joseph Huang , Xiaobao Wang , Philip Pan , In Whan Kim , Gopi Rangan , Tzung-Chin Chang , Surgey Y. Shumarayev , Thomas H. White
IPC分类号： G01R19/155 , G06F1/24 , G06F1/28 , G06F1/32 , H03K3/356 , H03K17/22 , H03K19/0175
CPC分类号： H03K3/356008 , G01R19/155 , G06F1/24 , G06F1/28 , G06F1/3203 , H03K17/223
摘要： A supply voltage detection circuit determines when the voltage for any one of the power supply signals received by an integrated circuit device is below its steady state level, as may occur during a hot socket condition when the device is inserted in or removed from a powered-on system. A first detection circuit determines when the first supply voltage level is below its steady state level, and a second detection circuit determines when the second supply voltage level is below its steady state level. A logic circuit provides a detected condition signal that disables current flow through an input/output terminal associated with the supply voltage detection circuit. The circuit is able to rapidly detect hot socket conditions for a wide range of power supply signal levels, including low supply signal levels, while limiting leakage current effects.
摘要翻译：电源电压检测电路确定由集成电路装置接收的任何一个电源信号的电压何时低于其稳定状态电平，这可能是在插座状态期间可能发生的，在系统上。第一检测电路确定第一电源电压何时低于其稳态电平，第二检测电路确定第二电源电压何时低于其稳态电平。逻辑电路提供检测条件信号，其禁止通过与电源电压检测电路相关联的输入/输出端子的电流流动。该电路能够快速检测广泛范围的电源信号电平（包括低电源信号电平）的热插座状况，同时限制漏电流效应。

2. 发明授权

US06630844B1 Supply voltage detection circuit 有权
标题翻译：电源电压检测电路
公开(公告)号：US06630844B1
公开(公告)日：2003-10-07
申请号：US09887686
申请日：2001-08-22
申请人： Yan Chong , Chiakang Sung , Bonnie Wang , Khai Nguyen , Joseph Huang , Xiaobao Wang , Philip Pan , In Whan Kim , Gopi Rangan , Tzung-Chin Chang , Surgey Y. Shumarayev , Thomas H. White
发明人： Yan Chong , Chiakang Sung , Bonnie Wang , Khai Nguyen , Joseph Huang , Xiaobao Wang , Philip Pan , In Whan Kim , Gopi Rangan , Tzung-Chin Chang , Surgey Y. Shumarayev , Thomas H. White
IPC分类号： H03K190175
CPC分类号： H03K3/356008 , G01R19/155 , G06F1/24 , G06F1/28 , G06F1/3203 , H03K17/223
摘要： A supply voltage detection circuit determines when the voltage for any one of the power supply signals received by an integrated circuit device is below its steady state level, as may occur during a hot socket condition when the device is inserted in or removed from a powered-on system. A first detection circuit determines when the first supply voltage level is below its steady state level, and a second detection circuit determines when the second supply voltage level is below its steady state level. A logic circuit provides a detected condition signal that disables current flow through an input/output terminal associated with the supply voltage detection circuit. The circuit is able to rapidly detect hot socket conditions for a wide range of power supply signal; levels, including low supply signal levels, while limiting leakage current effects.
摘要翻译：电源电压检测电路确定由集成电路装置接收的任何一个电源信号的电压何时低于其稳定状态电平，这可能是在插座状态期间可能发生的，在系统上。第一检测电路确定第一电源电压何时低于其稳态电平，第二检测电路确定第二电源电压何时低于其稳态电平。逻辑电路提供检测条件信号，其禁止通过与电源电压检测电路相关联的输入/输出端子的电流流动。该电路能够快速检测广泛的电源信号的热插座状况; 电平，包括低电平信号电平，同时限制漏电流效应。

3. 发明授权

US07119579B2 Supply voltage detection circuit 有权
标题翻译：电源电压检测电路
公开(公告)号：US07119579B2
公开(公告)日：2006-10-10
申请号：US11005890
申请日：2004-12-06
申请人： Yan Chong , Chiakang Sung , Bonnie Wang , Khai Nguyen , Joseph Huang , Xiaobao Wang , Philip Pan , In Whan Kim , Gopi Rangan , Tzung-Chin Chang , Surgey Y. Shumarayev , Thomas H. White
发明人： Yan Chong , Chiakang Sung , Bonnie Wang , Khai Nguyen , Joseph Huang , Xiaobao Wang , Philip Pan , In Whan Kim , Gopi Rangan , Tzung-Chin Chang , Surgey Y. Shumarayev , Thomas H. White
IPC分类号： H03K19/0175
CPC分类号： H03K3/356008 , G01R19/155 , G06F1/24 , G06F1/28 , G06F1/3203 , H03K17/223
摘要： A supply voltage detection circuit determines when the voltage for any one of the power supply signals received by an integrated circuit device is below its steady state level, as may occur during a hot socket condition when the device is inserted in or removed from a powered-on system. A first detection circuit determines when the first supply voltage level is below its steady state level, and a second detection circuit determines when the second supply voltage level is below its steady state level. A logic circuit provides a detected condition signal that disables current flow through an input/output terminal associated with the supply voltage detection circuit. The circuit is able to rapidly detect hot socket conditions for a wide range of power supply signal levels, including low supply signal levels, while limiting leakage current effects.
摘要翻译：电源电压检测电路确定由集成电路装置接收的任何一个电源信号的电压何时低于其稳定状态电平，这可能是在插座状态期间可能发生的，在系统上。第一检测电路确定第一电源电压何时低于其稳态电平，第二检测电路确定第二电源电压何时低于其稳态电平。逻辑电路提供检测条件信号，其禁止通过与电源电压检测电路相关联的输入/输出端子的电流流动。该电路能够快速检测广泛范围的电源信号电平（包括低电源信号电平）的热插座状况，同时限制漏电流效应。

4. 发明授权

US08432724B2 Memory elements with soft error upset immunity 有权
标题翻译：内存元件具有软错误的不安定性
公开(公告)号：US08432724B2
公开(公告)日：2013-04-30
申请号：US12753809
申请日：2010-04-02
申请人： Thomas H. White
发明人： Thomas H. White
IPC分类号： G11C11/00
CPC分类号： G11C7/02 , G11C11/4125 , G11C11/419
摘要： Integrated circuits with memory cells are provided. A memory cell may have four inverter-like circuits connected in a ring configuration and four corresponding storage nodes. The four inverter-like circuits may form a storage portion of the memory cell. Some of the inverter-like circuits may have tri-state transistors in pull-up and pull-down paths. The tri-state transistors may be controlled by address signals. Address and access transistors may be coupled between some of the storages nodes and a data line. The address and access transistors may be used to read and write into the memory cell. During write operations, the address signals may be asserted to turn off the tri-state transistors and eliminate contention current from the cell. During read and normal operations, the address signals may be deasserted to allow the inverter-like circuits to hold the current state of the cell while providing soft error upset immunity.
摘要翻译：提供具有存储单元的集成电路。存储单元可以具有以环形配置连接的四个逆变器状电路和四个对应的存储节点。四个逆变器状电路可以形成存储单元的存储部分。一些逆变器状电路可以在上拉和下拉路径中具有三态晶体管。三态晶体管可以由地址信号控制。地址和存取晶体管可以耦合在一些存储节点和数据线之间。地址和存取晶体管可用于读写存储单元。在写操作期间，可以断言地址信号以关闭三态晶体管并消除来自该单元的竞争电流。在读取和正常操作期间，可以将地址信号置为无效，以允许类似逆变器的电路保持电池的当前状态，同时提供软错误不耐受性。

5. 发明申请

US20120032276A1 N-WELL/P-WELL STRAP STRUCTURES 有权
标题翻译： N-WELL / P-WELL STRAP STRUCTURES
公开(公告)号：US20120032276A1
公开(公告)日：2012-02-09
申请号：US12851805
申请日：2010-08-06
申请人： Dustin Do , Andy Lee , Giles V. Powell , Bradley Jensen , Swee Aun Lau , Wuu-Cherng Lin , Thomas H. White
发明人： Dustin Do , Andy Lee , Giles V. Powell , Bradley Jensen , Swee Aun Lau , Wuu-Cherng Lin , Thomas H. White
IPC分类号： H01L29/06 , H01L29/78
CPC分类号： H01L21/823493 , H01L21/32055 , H01L21/76224 , H01L21/823475 , H01L21/823481 , H01L21/823871 , H01L21/823892 , H01L27/0207 , H01L29/7833
摘要： Embodiments of N-well or P-well strap structures are disclosed with lower space requirements achieved by forming the strap on both sides of one or more floating polysilicon gate fingers.
摘要翻译：公开了N阱或P阱带结构的实施例，其通过在一个或多个浮动多晶硅栅极指的两侧形成带而获得较低的空间要求。

6. 发明授权

US06515507B1 Control pin for specifying integrated circuit voltage levels 有权
标题翻译：用于指定集成电路电压电平的控制引脚
公开(公告)号：US06515507B1
公开(公告)日：2003-02-04
申请号：US09607569
申请日：2000-06-29
申请人： Rakesh H. Patel , Thomas H. White
发明人： Rakesh H. Patel , Thomas H. White
IPC分类号： G06F738
CPC分类号： G11C16/30 , G11C5/147 , G11C16/20 , H03K3/011 , H03K3/0315
摘要： An integrated circuit has one or more external control pins to control and indicate which of two or more different VCC or other voltage levels will be used. The control pin receives a logic signal, high or low, and draws zero static power. A user can use the integrated circuit with two or more VCC voltage levels by indicating which voltage level at the control pins. In a specific embodiment, the integrated circuit has nonvolatile memory cells such as EEPROM or Flash cells that a configurable and reconfigurable using on-chip programming circuitry. The programming circuitry may generate and use superhigh or high voltages, higher than the VCC voltage.
摘要翻译：集成电路具有一个或多个外部控制引脚，用于控制并指示将使用两个或多个不同VCC或其他电压电平中的哪一个。控制引脚接收高或低的逻辑信号，并绘制零静态功率。用户可以通过指示控制引脚上的哪个电压电平，使用具有两个或多个VCC电压电平的集成电路。在具体实施例中，集成电路具有非易失性存储单元，例如EEPROM或闪存单元，其是使用片上编程电路的可配置和可重新配置的。编程电路可以产生和使用高于VCC电压的超高电压或高电压。

7. 发明授权

US06168516A Device and method for an automobile air vent intake system 失效
标题翻译：汽车空气进气系统的装置和方法
公开(公告)号：US06168516A
公开(公告)日：2001-01-02
申请号：US08655649
申请日：1996-05-30
申请人： Thomas H. White
发明人： Thomas H. White
IPC分类号： B60H128
CPC分类号： B60H1/28
摘要： A method of preventing clogging and leaking in an automobile air vent system where there is an upwardly facing air vent grill which is made of a magnetically permeable material and is positioned at an upper portion of the body surface of the automobile forwardly of the windshield. This air vent is covered by a generally planar intake cover having a perimeter configuration substantially the same as the vent intake opening. This cover is made of a magnetic material which when placed over the vent cover remains securely in place and prevents the clogging (and thus leaking) of the air vent system.
摘要翻译：一种防止汽车排气系统堵塞和泄漏的方法，其中存在由导磁材料制成并且位于汽车前表面的汽车车身表面的上部的面向上的通风格栅。该通风口由具有与排气口开口基本相同的周边构造的大致平面的进气盖覆盖。该盖由磁性材料制成，当放置在通风盖上时，磁性材料牢固地保持在适当位置，并防止排气系统的堵塞（从而泄漏）。

8. 发明授权

US6158806A Bicycle seat assembly 有权
标题翻译：自行车座椅总成
公开(公告)号：US6158806A
公开(公告)日：2000-12-12
申请号：US360860
申请日：1999-07-23
申请人： Thomas H. White
发明人： Thomas H. White
IPC分类号： B62J1/00 , B60N2/38
CPC分类号： B62J1/007
摘要： A bicycle seat assembly having a functional surface area comprising a main support surface region and a center tactile surface region. At the center tactile surface region there is a raised center surface portion and outwardly facing side tactile surface portions to engage upper rear and side thigh surface portions of the person. There are right and left and primary support zones spaced on opposite sides of the longitudinal axis to support the right and left ischial-tuberosities of the person who is in a seated pedaling position. The forward support surface portions on opposite sides of the center tactile surface region are contoured so that the leading edge thereof has an upward and rearward slope. The seat is arranged to accommodate 95% of the adult population in the U.S., and enables the cyclist to operate effectively in the seated pedaling mode, the seated non-pedaling mode and the stand-up pedaling mode. The seat provides proper support and hygienic safety by alleviating a load bearing relationship between the lower center body portion with the seat and yet providing for clearance, mobility, and comfort for the person.
摘要翻译：一种具有包括主支撑表面区域和中心触觉表面区域的功能表面区域的自行车座椅组件。在中心触觉表面区域处具有凸起的中心表面部分和面向外侧的触觉表面部分，以接合人的上后侧和大腿侧表面部分。在纵轴的相对侧上有左右主支撑区域，以支撑坐在踩踏位置的人的右侧和左侧坐骨结节。在中心触觉表面区域的相对侧上的前支撑表面部分成形为使其前缘具有向上和向后的斜面。该座位被安排为容纳美国95％的成年人口，并且使座位骑乘者能够在坐着的踏板模式，坐着的非踏板模式和站立踏板模式下有效地操作。该座椅通过减轻下部中心体部分与座椅之间的承载关系并且为人员提供间隙，移动性和舒适性而提供适当的支撑和卫生安全。

9. 外观设计

USD429905S Bicycle seat unit 失效
公开(公告)号：USD429905S
公开(公告)日：2000-08-29
申请号：US108319
申请日：1999-07-23
申请人： Thomas H. White
设计人： Thomas H. White

10. 发明授权

US4239282A Pilot seat 失效
标题翻译：驾驶座
公开(公告)号：US4239282A
公开(公告)日：1980-12-16
申请号：US970725
申请日：1978-12-18
申请人： Thomas H. White
发明人： Thomas H. White
IPC分类号： A47C1/031 , A47C7/46 , A47C7/54 , B64D11/06
CPC分类号： B64D11/0689 , B60N2/464 , B60N2/66 , B60N2/68 , B64D11/06 , B64D11/064 , B64D11/0644 , B64D11/0646 , B64D11/0649 , Y02T50/46
摘要： A pilot seat or the like provided with lumbar support and armrests. Research into the anthropometry has revealed that the height of the armrest and the center of the lumbar support of people between 5'2" and 6'3" are practically the same. Accordingly, a unitary adjustment means is provided for simultaneously raising or lowering the armrests and the lumbar support.
摘要翻译：提供腰椎支撑和扶手的飞行员座椅等。人体测量学的研究表明，在“2”和6“3”之间的扶手高度和腰部支撑的中心实际上是相同的。因此，提供了一体式调整装置，用于同时升高或降低扶手和腰部支撑。

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