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1. 发明授权

US07948820B2 Circuit pre-charge to sense a memory line 有权
标题翻译：电路预充电以感测存储线
公开(公告)号：US07948820B2
公开(公告)日：2011-05-24
申请号：US11951262
申请日：2007-12-05
申请人： Tien-Chun Yang , Yonggang Wu , Nian Yang
发明人： Tien-Chun Yang , Yonggang Wu , Nian Yang
IPC分类号： G11C7/00
CPC分类号： G11C16/30 , G11C7/12 , G11C16/24
摘要： Commonly, read times of a memory line are slowed due to voltage overshoot and/or voltage undershoot. To eliminate these problems, a control component can manage voltage while a leakage component manages timing of voltage. This allows for a line pre-charge that produces increase read times. The control component can implement as a variable resistor that modifies value to compensate for temperature. The leakage component can include a capacitor configuration that allows voltage to pass.
摘要翻译：通常，存储线的读取时间由于电压过冲和/或电压下冲而变慢。为了消除这些问题，控制部件可以管理电压，同时泄漏部件管理电压的时序。这允许产生增加读取时间的线路预充电。控制组件可以实现一个可变电阻器来修改值来补偿温度。泄漏部件可以包括允许电压通过的电容器配置。

2. 发明申请

US20080266926A1 TRANSFER OF NON-ASSOCIATED INFORMATION ON FLASH MEMORY DEVICES 有权
标题翻译：在闪存存储器件上传输非相关信息
公开(公告)号：US20080266926A1
公开(公告)日：2008-10-30
申请号：US11741996
申请日：2007-04-30
申请人： Nian Yang , Yonggang Wu , Tien-Chun Yang
发明人： Nian Yang , Yonggang Wu , Tien-Chun Yang
IPC分类号： G11C5/06
CPC分类号： G11C8/12 , G11C7/12 , G11C7/18 , G11C16/24 , G11C2207/002
摘要： Manners for transferring information within a flash memory device across a memory array are described. A controller retrieves information from a storage unit and then a decoder decodes the information. The information is set across a series of bitlines through a pass gate to a second controller. The bitlines are both associated with the storage unit as well as bitlines associated with other storage units. A series of transistors is associated with each bitline. Different transistors are active based on if the bitlines are associated with the currently used storage unit.
摘要翻译：描述了通过存储器阵列在闪速存储器件内传送信息的方式。控制器从存储单元检索信息，然后解码器解码该信息。信息通过一个通过门到一个第二个控制器的一系列位线设置。位线都与存储单元相关联，以及与其他存储单元相关联的位线。一系列晶体管与每个位线相关联。基于如果位线与当前使用的存储单元相关联，不同的晶体管是有效的。

3. 发明申请

US20080144390A1 Drain voltage regulator 有权
公开(公告)号：US20080144390A1
公开(公告)日：2008-06-19
申请号：US11639936
申请日：2006-12-15
申请人： Yonggang Wu , Nian Yang , Tien-Chun Yang
发明人： Yonggang Wu , Nian Yang , Tien-Chun Yang
IPC分类号： G11C16/12 , G11C7/12
CPC分类号： G11C7/16 , G11C5/147 , G11C7/12
摘要： A voltage regulator comprises resistor elements that mitigate variations in a program voltage (VPROG). In particular, the resistors allow copies of the voltage regulator to be fabricated more consistently across a semiconductor substrate. As such, variations in respective program voltages applied to different bitlines of a memory arrangement are mitigated. This mitigates yield loss as more devices perform as desired, thus necessitating fewer discards.

4. 发明授权

US07505298B2 Transfer of non-associated information on flash memory devices 有权
标题翻译：在闪存设备上传送非相关信息
公开(公告)号：US07505298B2
公开(公告)日：2009-03-17
申请号：US11741996
申请日：2007-04-30
申请人： Nian Yang , Yonggang Wu , Tien-Chun Yang
发明人： Nian Yang , Yonggang Wu , Tien-Chun Yang
IPC分类号： G11C5/06 , G11C7/10
CPC分类号： G11C8/12 , G11C7/12 , G11C7/18 , G11C16/24 , G11C2207/002
摘要： Manners for transferring information within a flash memory device across a memory array are described. A controller retrieves information from a storage unit and then a decoder decodes the information. The information is set across a series of bitlines through a pass gate to a second controller. The bitlines are both associated with the storage unit as well as bitlines associated with other storage units. A series of transistors is associated with each bitline. Different transistors are active based on if the bitlines are associated with the currently used storage unit.
摘要翻译：描述了通过存储器阵列在闪速存储器件内传送信息的方式。控制器从存储单元检索信息，然后解码器解码该信息。信息通过一个通过门到一个第二个控制器的一系列位线设置。位线都与存储单元相关联，以及与其他存储单元相关联的位线。一系列晶体管与每个位线相关联。基于如果位线与当前使用的存储单元相关联，不同的晶体管是有效的。

5. 发明申请

US20080136381A1 Method to provide a higher reference voltage at a lower power supply in flash memory devices 有权
标题翻译：在闪存器件中的较低电源处提供较高参考电压的方法
公开(公告)号：US20080136381A1
公开(公告)日：2008-06-12
申请号：US11634776
申请日：2006-12-06
申请人： Tien-Chun Yang , Yonggang Wu , Nian Yang
发明人： Tien-Chun Yang , Yonggang Wu , Nian Yang
IPC分类号： G05F1/10 , G11C5/14
CPC分类号： G11C5/147 , G05F3/08 , G11C16/30
摘要： A fast reference circuit having active feedback includes a bias supply circuit and a variable divider circuit connected by an active feedback path to the bias supply circuit, and a comparator circuit connected to the variable divider circuit, the bias supply circuit, and a reference node of the variable divider circuit. In one embodiment, a start-up circuit initially discharges a potential at the bias supply and comparator circuits, then initializes a reference voltage at the reference node at about zero volts to improve repeatability. In one embodiment, the variable voltage divider comprises an impendence that is trimmed based on a sheet resistance of a process used to fabricate the fast reference circuit, and further comprises a variable reference current circuit coupled to the impedance and configured to generate a current having a value based on a desired reference voltage and to conduct the current through the impedance, thereby generating the reference voltage associated therewith. The comparator circuit is configured to compare the bias supply voltage to the reference voltage, and drive the bias supply and the variable divider circuit in response to the comparison, thereby quickly stabilizing the reference voltage.
摘要翻译：具有有源反馈的快速参考电路包括偏置电源电路和通过有源反馈路径连接到偏置电源电路的可变分频器电路，以及连接到可变分频器电路，偏置电源电路和参考节点的参考节点可变分频电路。在一个实施例中，启动电路首先在偏置电源和比较器电路处放电，然后在约零伏特的参考节点初始化参考电压，以提高可重复性。在一个实施例中，可变分压器包括基于用于制造快速参考电路的工艺的薄层电阻而修整的阻抗，并且还包括耦合到阻抗的可变参考电流电路，并且被配置为产生具有基于所需参考电压的值，并且将电流传导通过阻抗，由此产生与其相关联的参考电压。比较器电路被配置为将偏置电源电压与参考电压进行比较，并且响应于比较来驱动偏置电源和可变分频器电路，由此快速稳定参考电压。

6. 发明授权

US07746706B2 Methods and systems for memory devices 有权
标题翻译：存储器件的方法和系统
公开(公告)号：US07746706B2
公开(公告)日：2010-06-29
申请号：US11639935
申请日：2006-12-15
申请人： Nian Yang , Yonggang Wu , Tien-Chun Yang
发明人： Nian Yang , Yonggang Wu , Tien-Chun Yang
IPC分类号： G11C16/04
CPC分类号： G11C16/3404 , G11C16/0475
摘要： One embodiment of the invention relates to a method for accessing a memory cell. In this method, at least one bit of the memory cell is erased. After erasing the at least one bit, a soft program operation is performed to bias the memory cell thereby improving the reliability of data stored in the memory cell.Other methods and systems are also disclosed.
摘要翻译：本发明的一个实施例涉及访问存储器单元的方法。在该方法中，擦除存储单元的至少一位。在擦除至少一个位之后，执行软编程操作以偏置存储器单元，从而提高存储在存储单元中的数据的可靠性。还公开了其它方法和系统。

7. 发明申请

US20080144391A1 Methods and systems for memory devices 有权
标题翻译：存储器件的方法和系统
公开(公告)号：US20080144391A1
公开(公告)日：2008-06-19
申请号：US11639935
申请日：2006-12-15
申请人： Nian Yang , Yonggang Wu , Tien-Chun Yang
发明人： Nian Yang , Yonggang Wu , Tien-Chun Yang
IPC分类号： G11C16/10
CPC分类号： G11C16/3404 , G11C16/0475
摘要： One embodiment of the invention relates to a method for accessing a memory cell. In this method, at least one bit of the memory cell is erased. After erasing the at least one bit, a soft program operation is performed to bias the memory cell thereby improving the reliability of data stored in the memory cell.Other methods and systems are also disclosed.
摘要翻译：本发明的一个实施例涉及访问存储器单元的方法。在该方法中，擦除存储单元的至少一位。在擦除至少一个位之后，执行软编程操作以偏置存储器单元，从而提高存储在存储单元中的数据的可靠性。还公开了其它方法和系统。

8. 发明授权

US07724075B2 Method to provide a higher reference voltage at a lower power supply in flash memory devices 有权
标题翻译：在闪存器件中的较低电源处提供较高参考电压的方法
公开(公告)号：US07724075B2
公开(公告)日：2010-05-25
申请号：US11634776
申请日：2006-12-06
申请人： Tien-Chun Yang , Yonggang Wu , Nian Yang
发明人： Tien-Chun Yang , Yonggang Wu , Nian Yang
IPC分类号： G05F1/575
CPC分类号： G11C5/147 , G05F3/08 , G11C16/30
摘要： A fast reference circuit having active feedback includes a bias supply circuit and a variable divider circuit connected by an active feedback path to the bias supply circuit, and a comparator circuit connected to the variable divider circuit, the bias supply circuit, and a reference node of the variable divider circuit. In one embodiment, a start-up circuit initially discharges a potential at the bias supply and comparator circuits, then initializes a reference voltage at the reference node at about zero volts to improve repeatability. In one embodiment, the variable voltage divider comprises an impendence that is trimmed based on a sheet resistance of a process used to fabricate the fast reference circuit, and further comprises a variable reference current circuit coupled to the impedance and configured to generate a current having a value based on a desired reference voltage and to conduct the current through the impedance, thereby generating the reference voltage associated therewith. The comparator circuit is configured to compare the bias supply voltage to the reference voltage, and drive the bias supply and the variable divider circuit in response to the comparison, thereby quickly stabilizing the reference voltage.
摘要翻译：具有有源反馈的快速参考电路包括偏置电源电路和通过有源反馈路径连接到偏置电源电路的可变分频器电路，以及连接到可变分频器电路，偏置电源电路和参考节点的参考节点可变分频电路。在一个实施例中，启动电路首先在偏置电源和比较器电路处放电，然后在约零伏特的参考节点初始化参考电压，以提高可重复性。在一个实施例中，可变分压器包括基于用于制造快速参考电路的工艺的薄层电阻而修整的阻抗，并且还包括耦合到阻抗的可变参考电流电路，并且被配置为产生具有基于所需参考电压的值，并且将电流传导通过阻抗，由此产生与其相关联的参考电压。比较器电路被配置为将偏置电源电压与参考电压进行比较，并且响应于比较来驱动偏置电源和可变分频器电路，由此快速稳定参考电压。

9. 发明申请

US20090147587A1 CIRCUIT PRE-CHARGE TO SENSE A MEMORY LINE 有权
标题翻译：电路预先感知记忆线
公开(公告)号：US20090147587A1
公开(公告)日：2009-06-11
申请号：US11951262
申请日：2007-12-05
申请人： Tien-Chun Yang , Yonggang Wu , Nian Yang
发明人： Tien-Chun Yang , Yonggang Wu , Nian Yang
IPC分类号： G11C16/00
CPC分类号： G11C16/30 , G11C7/12 , G11C16/24
摘要： Commonly, read times of a memory line are slowed due to voltage overshoot and/or voltage undershoot. To eliminate these problems, a control component can manage voltage while a leakage component manages timing of voltage. This allows for a line pre-charge that produces increase read times. The control component can implement as a variable resistor that modifies value to compensate for temperature. The leakage component can include a capacitor configuration that allows voltage to pass.
摘要翻译：通常，存储线的读取时间由于电压过冲和/或电压下冲而变慢。为了消除这些问题，控制部件可以管理电压，同时泄漏部件管理电压的时序。这允许产生增加读取时间的线路预充电。控制组件可以实现一个可变电阻器来修改值来补偿温度。泄漏部件可以包括允许电压通过的电容器配置。

10. 发明授权

US07460415B2 Drain voltage regulator 有权
标题翻译：漏电压调节器
公开(公告)号：US07460415B2
公开(公告)日：2008-12-02
申请号：US11639936
申请日：2006-12-15
申请人： Yonggang Wu , Nian Yang , Tien-Chun Yang
发明人： Yonggang Wu , Nian Yang , Tien-Chun Yang
IPC分类号： G11C5/14
CPC分类号： G11C7/16 , G11C5/147 , G11C7/12
摘要： A voltage regulator comprises resistor elements that mitigate variations in a program voltage (VPROG). In particular, the resistors allow copies of the voltage regulator to be fabricated more consistently across a semiconductor substrate. As such, variations in respective program voltages applied to different bitlines of a memory arrangement are mitigated. This mitigates yield loss as more devices perform as desired, thus necessitating fewer discards.
摘要翻译：电压调节器包括减轻编程电压（VPROG）变化的电阻元件。特别地，电阻允许电压调节器的副本在半导体衬底上更一致地制造。因此，减轻了施加到存储器装置的不同位线的各个编程电压的变化。随着越来越多的设备按需要执行，这减轻了产量损失，因此需要更少的丢弃物。

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