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1. 发明授权

US08723222B2 Nitride electronic device and method for manufacturing the same 有权
标题翻译：氮化物电子器件及其制造方法
公开(公告)号：US08723222B2
公开(公告)日：2014-05-13
申请号：US13548522
申请日：2012-07-13
申请人： Sung Bum Bae , Eun Soo Nam , Jae Kyoung Mun , Sung Bock Kim , Hae Cheon Kim , Chull Won Ju , Sang Choon Ko , Jong-Won Lim , Ho Kyun Ahn , Woo Jin Chang , Young Rak Park
发明人： Sung Bum Bae , Eun Soo Nam , Jae Kyoung Mun , Sung Bock Kim , Hae Cheon Kim , Chull Won Ju , Sang Choon Ko , Jong-Won Lim , Ho Kyun Ahn , Woo Jin Chang , Young Rak Park
IPC分类号： H01L31/102
CPC分类号： H01L29/66446 , H01L21/0242 , H01L21/02458 , H01L21/0254 , H01L21/02647 , H01L21/8252 , H01L27/0605 , H01L27/0883
摘要： The present disclosure relates to a nitride electronic device and a method for manufacturing the same, and particularly, to a nitride electronic device and a method for manufacturing the same that can implement various types of nitride integrated structures on the same substrate through a regrowth technology (epitaxially lateral over-growth: ELOG) of a semi-insulating gallium nitride (GaN) layer used in a III-nitride semiconductor electronic device including Group III elements such as gallium (Ga), aluminum (Al) and indium (In) and nitrogen.
摘要翻译：本发明涉及一种氮化物电子器件及其制造方法，特别涉及一种氮化物电子器件及其制造方法，该氮化物电子器件及其制造方法可以通过再生技术在同一衬底上实现各种氮化物一体化结构（用于包括III族元素如镓（Ga），铝（Al）和铟（In））和氮（III）的III族氮化物半导体电子器件中的半绝缘氮化镓（GaN）层的外延横向过度生长：ELOG）。

2. 发明申请

US20130069127A1 FIELD EFFECT TRANSISTOR AND FABRICATION METHOD THEREOF 审中-公开
标题翻译：场效应晶体管及其制造方法
公开(公告)号：US20130069127A1
公开(公告)日：2013-03-21
申请号：US13556377
申请日：2012-07-24
申请人： Ho Kyun AHN , Jong-Won Lim , Sung Bum Bae , Sang Choon Ko , Young Rak Park , Woo Jin Chang , Jae Kyoung Mun , Eun Soo Nam , Jeong Jin Kim , Chull Won Ju
发明人： Ho Kyun AHN , Jong-Won Lim , Sung Bum Bae , Sang Choon Ko , Young Rak Park , Woo Jin Chang , Jae Kyoung Mun , Eun Soo Nam , Jeong Jin Kim , Chull Won Ju
IPC分类号： H01L29/78 , H01L21/20
CPC分类号： H01L29/7786 , H01L29/2003 , H01L29/402 , H01L29/42316 , H01L29/66462 , H01L29/66863 , H01L29/8128
摘要： A method for fabricating a field effect transistor according to an exemplary embodiment of the present disclosure includes: forming an active layer, a cap layer, an ohmic metal layer and an insulating layer on a substrate; forming multilayered photoresists on the insulating layer; patterning the multilayered photoresists to form a photoresist pattern including a first opening for gate electrode and a second opening for field electrode; etching the insulating layer by using the photoresist pattern as an etching mask so that the insulating layer in the first opening is etched more deeply and the cap layer is exposed through the first opening; etching the cap layer exposed by etching the insulating layer through the first opening to form a gate recess region; and depositing a metal on the gate recess region and the etched insulating layer to form a gate-field electrode layer.
摘要翻译：根据本公开的示例性实施例的制造场效应晶体管的方法包括：在衬底上形成有源层，覆盖层，欧姆金属层和绝缘层; 在所述绝缘层上形成多层光致抗蚀剂; 图案化多层光致抗蚀剂以形成包括用于栅电极的第一开口和场电极的第二开口的光致抗蚀剂图案; 通过使用光致抗蚀剂图案作为蚀刻掩模来蚀刻绝缘层，使得第一开口中的绝缘层被更深地蚀刻并且盖层通过第一开口暴露; 通过蚀刻绝缘层通过第一开口蚀刻暴露的盖层，以形成栅极凹陷区域; 以及在所述栅极凹部区域和所述蚀刻绝缘层上沉积金属以形成栅极电极层。

3. 发明授权

US08058658B2 High-speed optical interconnection device 有权
标题翻译：高速光互连装置
公开(公告)号：US08058658B2
公开(公告)日：2011-11-15
申请号：US12421130
申请日：2009-04-09
申请人： Sang-Heung Lee , Hae Cheon Kim , Dong Min Kang , Dong-Young Kim , Jae Kyoung Mun , Hokyun Ahn , Jong-Won Lim , Woo Jin Chang , Hong Gu Ji , Eun Soo Nam
发明人： Sang-Heung Lee , Hae Cheon Kim , Dong Min Kang , Dong-Young Kim , Jae Kyoung Mun , Hokyun Ahn , Jong-Won Lim , Woo Jin Chang , Hong Gu Ji , Eun Soo Nam
IPC分类号： H01L27/15
CPC分类号： H01L25/167 , H01L2224/0603 , H01L2224/45014 , H01L2224/48137 , H01L2224/4903 , H01L2224/73265 , H01L2924/1305 , H01L2924/30107 , H01L2924/00
摘要： Provided is a high-speed optical interconnection device. The high-speed optical interconnection device includes a first semiconductor chip, light emitters, optical detectors, and a second semiconductor chip, which are disposed on a silicon-on-insulator (SOI) substrate. The light emitters receive electrical signals from the first semiconductor chip to output optical signals. The optical detectors detect the optical signals to convert the optical signals into electrical signals. The second semiconductor chip receives the electrical signals converted by the optical detectors.
摘要翻译：提供了一种高速光互连装置。高速光互连装置包括设置在绝缘体上硅（SOI））衬底上的第一半导体芯片，发光体，光检测器和第二半导体芯片。光发射器接收来自第一半导体芯片的电信号以输出光信号。光检测器检测光信号，将光信号转换为电信号。第二半导体芯片接收由光学检测器转换的电信号。

4. 发明申请

US20100133551A1 HIGH-SPEED OPTICAL INTERCONNECTION DEVICE 有权
标题翻译：高速光学互连器件
公开(公告)号：US20100133551A1
公开(公告)日：2010-06-03
申请号：US12421130
申请日：2009-04-09
申请人： Sang-Heung Lee , Hae Cheon Kim , Dong Min Kang , Dong-Young Kim , Jae-Kyoung Mun , Hokyun Ahn , Jong-Won Lim , Woo Jin Chang , Hong Gu Ji , Eun Soo Nam
发明人： Sang-Heung Lee , Hae Cheon Kim , Dong Min Kang , Dong-Young Kim , Jae-Kyoung Mun , Hokyun Ahn , Jong-Won Lim , Woo Jin Chang , Hong Gu Ji , Eun Soo Nam
IPC分类号： H01L31/147 , H01L33/00
CPC分类号： H01L25/167 , H01L2224/0603 , H01L2224/45014 , H01L2224/48137 , H01L2224/4903 , H01L2224/73265 , H01L2924/1305 , H01L2924/30107 , H01L2924/00
摘要： Provided is a high-speed optical interconnection device. The high-speed optical interconnection device includes a first semiconductor chip, light emitters, optical detectors, and a second semiconductor chip, which are disposed on a silicon-on-insulator (SOI) substrate. The light emitters receive electrical signals from the first semiconductor chip to output optical signals. The optical detectors detect the optical signals to convert the optical signals into electrical signals. The second semiconductor chip receives the electrical signals converted by the optical detectors.
摘要翻译：提供了一种高速光互连装置。高速光互连装置包括设置在绝缘体上硅（SOI））衬底上的第一半导体芯片，发光体，光检测器和第二半导体芯片。光发射器接收来自第一半导体芯片的电信号以输出光信号。光检测器检测光信号，将光信号转换为电信号。第二半导体芯片接收由光学检测器转换的电信号。

5. 发明授权

US08722474B2 Semiconductor device including stepped gate electrode and fabrication method thereof 有权
标题翻译：包括阶梯式栅电极的半导体器件及其制造方法
公开(公告)号：US08722474B2
公开(公告)日：2014-05-13
申请号：US13592589
申请日：2012-08-23
申请人： Hyung Sup Yoon , Byoung-Gue Min , Jong Min Lee , Seong-Il Kim , Dong Min Kang , Ho Kyun Ahn , Jong-Won Lim , Jae Kyoung Mun , Eun Soo Nam
发明人： Hyung Sup Yoon , Byoung-Gue Min , Jong Min Lee , Seong-Il Kim , Dong Min Kang , Ho Kyun Ahn , Jong-Won Lim , Jae Kyoung Mun , Eun Soo Nam
IPC分类号： H01L21/338
CPC分类号： H01L29/0649 , H01L21/28593 , H01L29/402 , H01L29/42316 , H01L29/66462 , H01L29/7786
摘要： Disclosed are a semiconductor device including a stepped gate electrode and a method of fabricating the semiconductor device. The semiconductor device according to an exemplary embodiment of the present disclosure includes: a semiconductor substrate having a structure including a plurality of epitaxial layers and including an under-cut region formed in a part of a Schottky layer in an upper most part thereof; a cap layer, a first nitride layer and a second nitride layer sequentially formed on the semiconductor substrate to form a stepped gate insulating layer pattern; and a stepped gate electrode formed by depositing a heat-resistant metal through the gate insulating layer pattern, wherein the under-cut region includes an air-cavity formed between the gate electrode and the Schottky layer.
摘要翻译：本发明公开了一种半导体器件，包括阶梯栅电极和制造该半导体器件的方法。根据本公开的示例性实施例的半导体器件包括：半导体衬底，其具有包括多个外延层的结构，并且包括形成在其最上部的肖特基层的一部分中的下切割区域; 顺序地形成在半导体衬底上的盖层，第一氮化物层和第二氮化物层，以形成台阶栅极绝缘层图案; 以及通过栅极绝缘层图案沉积耐热金属而形成的阶梯形栅电极，其中下切区域包括形成在栅电极和肖特基层之间的空腔。

6. 发明申请

US20130146944A1 SEMICONDUCTOR DEVICE INCLUDING STEPPED GATE ELECTRODE AND FABRICATION METHOD THEREOF 有权
标题翻译：包括步进电极电极的半导体器件及其制造方法
公开(公告)号：US20130146944A1
公开(公告)日：2013-06-13
申请号：US13592589
申请日：2012-08-23
申请人： Hyung Sup YOON , Byoung-Gue Min , Jong Min Lee , Seong-II Kim , Dong Min Kang , Ho Kyun Ahn , Jong-Won Lim , Jae Kyoung Mun , Eun Soo Nam
发明人： Hyung Sup YOON , Byoung-Gue Min , Jong Min Lee , Seong-II Kim , Dong Min Kang , Ho Kyun Ahn , Jong-Won Lim , Jae Kyoung Mun , Eun Soo Nam
IPC分类号： H01L29/812 , H01L21/338
CPC分类号： H01L29/0649 , H01L21/28593 , H01L29/402 , H01L29/42316 , H01L29/66462 , H01L29/7786
摘要： Disclosed are a semiconductor device including a stepped gate electrode and a method of fabricating the semiconductor device. The semiconductor device according to an exemplary embodiment of the present disclosure includes: a semiconductor substrate having a structure including a plurality of epitaxial layers and including an under-cut region formed in a part of a Schottky layer in an upper most part thereof; a cap layer, a first nitride layer and a second nitride layer sequentially formed on the semiconductor substrate to form a stepped gate insulating layer pattern; and a stepped gate electrode formed by depositing a heat-resistant metal through the gate insulating layer pattern, wherein the under-cut region includes an air-cavity formed between the gate electrode and the Schottky layer.
摘要翻译：本发明公开了一种半导体器件，包括阶梯栅电极和制造该半导体器件的方法。根据本公开的示例性实施例的半导体器件包括：半导体衬底，其具有包括多个外延层的结构，并且包括形成在其最上部的肖特基层的一部分中的下切割区域; 顺序地形成在半导体衬底上的盖层，第一氮化物层和第二氮化物层，以形成台阶栅极绝缘层图案; 以及通过栅极绝缘层图案沉积耐热金属而形成的阶梯形栅电极，其中下切区域包括形成在栅电极和肖特基层之间的空腔。

7. 发明授权

US08853821B2 Vertical capacitors and methods of forming the same 有权
标题翻译：垂直电容器及其形成方法
公开(公告)号：US08853821B2
公开(公告)日：2014-10-07
申请号：US13618873
申请日：2012-09-14
申请人： Seong-il Kim , Sang-Heung Lee , Jong-Won Lim , Hyung Sup Yoon , Jongmin Lee , Byoung-Gue Min , Jae Kyoung Mun , Eun Soo Nam
发明人： Seong-il Kim , Sang-Heung Lee , Jong-Won Lim , Hyung Sup Yoon , Jongmin Lee , Byoung-Gue Min , Jae Kyoung Mun , Eun Soo Nam
IPC分类号： H01L21/02
CPC分类号： H01L28/91 , H01L23/481 , H01L28/92 , H01L2924/0002 , H01L2924/00
摘要： Provided are vertical capacitors and methods of forming the same. The formation of the vertical capacitor may include forming input and output electrodes on a top surface of a substrate, etching a bottom surface of the substrate to form via electrodes, and then, forming a dielectric layer between the via electrodes. As a result, a vertical capacitor with high capacitance can be provided in a small region of the substrate.
摘要翻译：提供垂直电容器及其形成方法。垂直电容器的形成可以包括在衬底的顶表面上形成输入和输出电极，蚀刻衬底的底表面以形成通孔电极，然后在通孔电极之间形成电介质层。结果，可以在基板的小区域中提供具有高电容的垂直电容器。

8. 发明授权

US08586462B2 Method of manufacturing a field-effect transistor 有权
标题翻译：制造场效应晶体管的方法
公开(公告)号：US08586462B2
公开(公告)日：2013-11-19
申请号：US13307069
申请日：2011-11-30
申请人： Hokyun Ahn , Jong-Won Lim , Hyung Sup Yoon , Byoung-Gue Min , Sang-Heung Lee , Hae Cheon Kim , Eun Soo Nam
发明人： Hokyun Ahn , Jong-Won Lim , Hyung Sup Yoon , Byoung-Gue Min , Sang-Heung Lee , Hae Cheon Kim , Eun Soo Nam
IPC分类号： H01L29/808 , H01L21/283
CPC分类号： H01L29/7831 , H01L29/2003 , H01L29/404 , H01L29/42316 , H01L29/66462 , H01L29/66863 , H01L29/7787 , H01L29/812
摘要： Disclosed are a method of manufacturing a field-effect transistor. The disclosed method includes: providing a semiconductor substrate; forming a source ohmic metal layer on one side of the semiconductor substrate; forming a drain ohmic metal layer on another side of the semiconductor substrate; forming a gate electrode between the source ohmic metal layer and the drain ohmic metal layer, on an upper portion of the semiconductor substrate; forming an insulating film on the semiconductor substrate's upper portion including the source ohmic metal layer, the drain ohmic metal layer and the gate electrode; and forming a plurality of field electrodes on an upper portion of the insulating film, wherein the insulating film below the respective field electrodes has different thicknesses.
摘要翻译：公开了一种制造场效晶体管的方法。所公开的方法包括：提供半导体衬底; 在半导体衬底的一侧上形成源极欧姆金属层; 在所述半导体衬底的另一侧上形成漏极欧姆金属层; 在所述源欧姆金属层和所述漏极欧姆金属层之间形成栅电极，在所述半导体衬底的上部; 在包括源欧姆金属层，漏极欧姆金属层和栅电极的半导体衬底的上部上形成绝缘膜; 以及在绝缘膜的上部形成多个场电极，其中各个场电极下方的绝缘膜具有不同的厚度。

9. 发明授权

US08053345B2 Method for fabricating field effect transistor using a compound semiconductor 有权
标题翻译：使用化合物半导体制造场效应晶体管的方法
公开(公告)号：US08053345B2
公开(公告)日：2011-11-08
申请号：US12773216
申请日：2010-05-04
申请人： Hokyun Ahn , Jong-Won Lim , Hyung Sup Yoon , Woojin Chang , Hae Cheon Kim , Eun Soo Nam
发明人： Hokyun Ahn , Jong-Won Lim , Hyung Sup Yoon , Woojin Chang , Hae Cheon Kim , Eun Soo Nam
IPC分类号： H01L21/3205 , H01L21/44
CPC分类号： H01L29/66462
摘要： Provided is a method for fabricating a field effect transistor. In the method, an active layer and a capping layer are formed on a substrate. A source electrode and a drain electrode is formed on the capping layer. A dielectric interlayer is formed on the substrate, and resist layers having first and second openings with asymmetrical depths are formed on the dielectric interlayer between the source electrode and the drain electrode. The first opening exposes the dielectric interlayer, and the second opening exposes the lowermost of the resist layers. The dielectric interlayer in the bottom of the first opening and the lowermost resist layer under the second opening are simultaneously removed to expose the capping layer to the first opening and expose the dielectric interlayer to the second opening. The capping layer of the first opening is removed to expose the active layer. A metal layer is deposited on the substrate to simultaneously form a gate electrode and a field plate in the first opening and the second opening. The resist layers are removed to lift off the metal layer on the resist layers.
摘要翻译：提供了一种用于制造场效应晶体管的方法。在该方法中，在基板上形成有源层和覆盖层。源极电极和漏电极形成在覆盖层上。在基板上形成电介质中间层，在源电极和漏极之间的电介质层间形成有具有不对称深度的第一和第二开口的抗蚀剂层。第一开口露出电介质中间层，第二开口露出最低层的抗蚀剂层。同时除去第一开口底部的电介质中间层和第二开口下面的最下面的抗蚀剂层，以将覆盖层暴露于第一开口，并将电介质中间层暴露于第二开口。去除第一开口的覆盖层以暴露活性层。金属层沉积在基板上，以在第一开口和第二开口中同时形成栅电极和场板。去除抗蚀剂层以剥离抗蚀剂层上的金属层。

10. 发明授权

US08609474B2 Method of manufacturing semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US08609474B2
公开(公告)日：2013-12-17
申请号：US13274367
申请日：2011-10-17
申请人： Jong-Won Lim , Hokyun Ahn , Dong Min Kang , Woojin Chang , Hae Cheon Kim , Eun Soo Nam
发明人： Jong-Won Lim , Hokyun Ahn , Dong Min Kang , Woojin Chang , Hae Cheon Kim , Eun Soo Nam
IPC分类号： H01L29/772 , H01L21/28 , H01L29/423 , H01L29/40
CPC分类号： H01L29/42376 , H01L29/2003 , H01L29/40 , H01L29/402 , H01L29/42316 , H01L29/66462 , H01L29/7787 , H01L29/812
摘要： Disclosed are a semiconductor device and a method of manufacturing the same. In the semiconductor device according to an exemplary embodiment of the present disclosure, at the time of forming a source electrode, a drain electrode, a field plate electrode, and a gate electrode on a substrate having a heterojunction structure such as AlGaN/GaN, the field plate electrode made of the same metal as the gate electrode is formed on the side surface of a second support part positioned below a head part of the gate electrode so as to prevent the gate electrode from collapsing and improve high-frequency and high-voltage characteristic of the semiconductor device.
摘要翻译：公开了一种半导体器件及其制造方法。在根据本公开的示例性实施例的半导体器件中，在具有诸如AlGaN / GaN的异质结结构的衬底上形成源电极，漏电极，场板电极和栅电极时，由与栅电极相同的金属制成的场板电极形成在位于栅电极的头部下方的第二支撑部分的侧表面上，以防止栅电极塌陷并改善高频和高电压半导体器件的特性。

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