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1. 发明申请

WO2019216941A1 QUALITY INFERENCE FROM LIVING DIGITAL TWINS IN IOT-ENABLED MANUFACTURING SYSTEMS 审中-公开
公开(公告)号：WO2019216941A1
公开(公告)日：2019-11-14
申请号：PCT/US2018/049132
申请日：2018-08-31
申请人： SIEMENS CORPORATION , THE REGENTS OF THE UNIVERSITY OF CALIFORNIA
发明人： CHHETRI, Sujit Rokka , AL FARUQUE, Mohammad Abdullah , MARTINEZ CANEDO, Arquimedes
IPC分类号： G06K9/62
摘要： A method for quality inference in an Internet of things (IoT)-enabled manufacturing system includes generating a fingerprint library. Each fingerprint corresponds to a digital twin of a product and comprises (i) stored feature clusters; and (ii) a stored silhouette coefficient for each feature cluster. Sensor values are collected from IoT sensors monitoring a physical twin of the manufacturing system. Feature values are extracted from the sensor values. Parameters defining the digital twin are identified and used to segment the feature values into feature subgroups. Next, feature clusters are estimated for the subgroups using the fingerprint library. A current silhouette coefficient is determined for each feature cluster. If the current silhouette coefficient deviates from a corresponding stored silhouette coefficient, the parameters of the digital twin corresponding to the feature cluster are identified and designated as being potentially anomalous. An alert may then be provided to users identifying the potentially anomalous parameters.

2. 发明申请

WO2012138464A4 PARALLELIZATION OF PLC PROGRAMS FOR OPERATION IN MULTI-PROCESSOR ENVIRONMENTS 审中-公开
公开(公告)号：WO2012138464A4
公开(公告)日：2012-10-11
申请号：PCT/US2012/029331
申请日：2012-03-16
申请人： SIEMENS CORPORATION , MARTINEZ CANEDO, Arquimedes , AL FARUQUE, Mohammad Abdullah , PACKER, Mitchell , FREITAG, Richard
发明人： MARTINEZ CANEDO, Arquimedes , AL FARUQUE, Mohammad Abdullah , PACKER, Mitchell , FREITAG, Richard
IPC分类号： G06F9/45
摘要： A method of identifying and extracting functional parallelism from a PLC program has been developed that results in the ability of the extracted program fragments to be executed in parallel across a plurality of separate resources, and a compiler configured to perform the functional parallelism (i.e., identification and extraction processes) and perform the scheduling of the separate fragments within a given set of resources. The inventive functional parallelism creates a larger number of separable elements than was possible with prior dataflow analysis methodologies.

3. 发明申请

WO2013158968A1 TIME SLACK APPLICATION PIPELINE BALANCING FOR MULTI/MANY-CORE PLCS 审中-公开
标题翻译：用于多/多核PLCS的时间拖延应用管道平衡
公开(公告)号：WO2013158968A1
公开(公告)日：2013-10-24
申请号：PCT/US2013/037327
申请日：2013-04-19
申请人： SIEMENS CORPORATION , MARTINEZ CANEDO, Arquimedes , FEICHTINGER, Thomas , AL FARUQUE, Mohammad Abdullah
发明人： MARTINEZ CANEDO, Arquimedes , FEICHTINGER, Thomas , AL FARUQUE, Mohammad Abdullah
IPC分类号： G06F9/45
CPC分类号： G06F9/5083 , G06F8/4452 , G06F9/4881
摘要： A method for performing time-slack pipeline balancing for multi/many-core programmable logic controllers includes performing (411) a runtime analysis of a plurality of pipeline stages of a program for a multi/many-core programmable logic controller (PLC) while the program is being executed, and of a plurality of system services, to compile a profile of performance statistics of the PLC program and the system services, (413) calculating a time slack for each of the plurality of pipeline stages of the PLC program using the profile of performance statistics, and for all pipeline stages except a longest stage, donating (414) the time slack of each pipeline stage to an operating system of the PLC. Donating the time slack of each pipeline stage includes generating donor code that includes a set of instructions that free a processor core for a given pipeline stage for a time period identified as the time slack period.
摘要翻译：用于对多/多核可编程逻辑控制器进行时间间隔流水线平衡的方法包括对多/多核可编程逻辑控制器（PLC）的程序的多个流水线级进行（411）运行时分析，同时正在执行程序和多个系统服务的程序，以编译PLC程序和系统服务的性能统计的简档，（413）使用该程序的多个流水线级中的每一个计算时间松弛性能统计资料简介，除最长阶段以外的所有流水线阶段，向PLC的操作系统捐赠（414）每个流水线阶段的时间松弛。捐赠每个流水线阶段的时间松弛包括产生捐赠者代码，该捐赠者代码包括一组在给定流水线阶段释放处理器核心的指令，该时间段被标识为时间松弛周期。

4. 发明申请

WO2013052768A2 PROVIDING ADAPTIVE DEMAND RESPONSE BASED ON DISTRIBUTED LOAD CONTROL 审中-公开
标题翻译：基于分布式负载控制提供自适应需求响应
公开(公告)号：WO2013052768A2
公开(公告)日：2013-04-11
申请号：PCT/US2012/058903
申请日：2012-10-05
申请人： SIEMENS CORPORATION
发明人： LU, Yan , ZHOU, Siyuan , AL FARUQUE, Mohammad Abdullah
CPC分类号： H02J3/14 , Y02B70/3225 , Y02B70/3283 , Y04S20/222 , Y04S20/224 , Y04S20/246
摘要： Adaptive demand response based on distributed load control may be provided. A demand response request indicative of a demand response event for an area may be received (300). A maximum power consumption for the area during the demand response event may be determined based on the demand response request (304). One or more set points for the area during the demand response event may be determined prior to the demand response event (308). The one or more set points are determined based on the maximum power consumption. Prior to or during the demand response event, a real-time power consumption for the area may be calculated (312). When the real-time power consumption exceeds the maximum power consumption, one or more loads in the area may be controlled to maintain the real-time power consumption at or below the maximum power consumption (316)
摘要翻译：可以提供基于分布式负载控制的自适应需求响应。可以接收指示区域的需求响应事件的请求响应请求（300）。可以根据需求响应请求（304）来确定在需求响应事件期间该区域的最大功率消耗。可以在需求响应事件（308）之前确定在需求响应事件期间该区域的一个或多个设定点。基于最大功率消耗确定一个或多个设定点。在需求响应事件之前或期间，可以计算该区域的实时功率消耗（312）。当实时功耗超过最大功率消耗时，可以控制该区域中的一个或多个负载以将实时功耗维持在或低于最大功耗（316）

5. 发明公开

EP2764598A2 PROVIDING ADAPTIVE DEMAND RESPONSE BASED ON DISTRIBUTED LOAD CONTROL 审中-公开
标题翻译：提供自适应REACTIONS更多关于分布式控制基于最后
公开(公告)号：EP2764598A2
公开(公告)日：2014-08-13
申请号：EP12795886.6
申请日：2012-10-05
申请人： Siemens Corporation
发明人： LU, Yan , ZHOU, Siyuan , AL FARUQUE, Mohammad Abdullah
IPC分类号： H02J3/14
CPC分类号： H02J3/14 , Y02B70/3225 , Y02B70/3283 , Y04S20/222 , Y04S20/224 , Y04S20/246
摘要： Adaptive demand response based on distributed load control may be provided. A demand response request indicative of a demand response event for an area may be received. A maximum power consumption for the area during the demand response event may be determined based on the demand response request. One or more set points for the area during the demand response event may be determined prior to the demand response event. The one or more set points are determined based on the maximum power consumption. Prior to or during the demand response event, a real-time power consumption for the area may be calculated. When the real-time power consumption exceeds the maximum power consumption, one or more loads in the area may be controlled to maintain the real-time power consumption at or below the maximum power consumption.

6. 发明公开

EP2839370A1 TIME SLACK APPLICATION PIPELINE BALANCING FOR MULTI/MANY-CORE PLCS 有权转让
标题翻译： TIME SLIP管道调整MULTICORE可编程逻辑控制器
公开(公告)号：EP2839370A1
公开(公告)日：2015-02-25
申请号：EP13721465.6
申请日：2013-04-19
申请人： Siemens Corporation
发明人： MARTINEZ CANEDO, Arquimedes , FEICHTINGER, Thomas , AL FARUQUE, Mohammad Abdullah
IPC分类号： G06F9/45
CPC分类号： G06F9/5083 , G06F8/4452 , G06F9/4881
摘要： A method for performing time-slack pipeline balancing for multi/many-core programmable logic controllers includes performing (411) a runtime analysis of a plurality of pipeline stages of a program for a multi/many-core programmable logic controller (PLC) while the program is being executed, and of a plurality of system services, to compile a profile of performance statistics of the PLC program and the system services, (413) calculating a time slack for each of the plurality of pipeline stages of the PLC program using the profile of performance statistics, and for all pipeline stages except a longest stage, donating (414) the time slack of each pipeline stage to an operating system of the PLC. Donating the time slack of each pipeline stage includes generating donor code that includes a set of instructions that free a processor core for a given pipeline stage for a time period identified as the time slack period.

7. 发明授权

EP2839370B1 TIME SLACK PIPELINE BALANCING FOR MULTICORE PROGRAMMABLE LOGIC CONTROLLERS (PLC) 有权转让
标题翻译： ZEITSCHLUPF管道AUSGLEICHUNGFÜRMULTICORE-PROGRAMMIERBARE LOGISCHE STEUERUNGEN
公开(公告)号：EP2839370B1
公开(公告)日：2017-03-22
申请号：EP13721465.6
申请日：2013-04-19
申请人： Siemens Corporation
发明人： MARTINEZ CANEDO, Arquimedes , FEICHTINGER, Thomas , AL FARUQUE, Mohammad Abdullah
IPC分类号： G06F9/45
CPC分类号： G06F9/5083 , G06F8/4452 , G06F9/4881

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