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1. 发明专利

AT437441T 未知
公开(公告)号：AT437441T
公开(公告)日：2009-08-15
申请号：AT06759594
申请日：2006-05-11
申请人： SANDISK CORP
发明人： WAN JUN , LUTZE JEFFREY , HIGASHITANI MASAAKI , HEMINK GERRIT , OOWADA KEN , CHEN JIAN , GONGWER GEOFFREY
IPC分类号： G11C16/34 , G11C11/56
摘要： A non-volatile memory system is programmed so as to reduce or avoid program disturb. In accordance with one embodiment, multiple program inhibit schemes are employed for a single non-volatile memory system. Program inhibit schemes are selected based on the word line being programmed. Certain program inhibit schemes have been discovered to better minimize or eliminate program disturb at select word lines. In one embodiment, selecting a program inhibit scheme includes selecting a program voltage pulse ramp rate. Different ramp rates have been discovered to better minimize program disturb when applied to select word lines. In another embodiment, the temperature of a memory system is detected before or during a program operation. A program inhibit scheme can be selected based on the temperature of the system.

2. 发明专利

DE602006021058D1 MINDERUNG DER LESESTÖRUNGEN IN NICHT-FLÜCHTIGEN SPEICHERN 未知
公开(公告)号：DE602006021058D1
公开(公告)日：2011-05-12
申请号：DE602006021058
申请日：2006-11-30
申请人： SANDISK CORP
发明人： FONG YUPIN , WAN JUN , LUTZE JEFFREY
IPC分类号： G11C16/04 , G11C16/34

3. 发明专利

AT504065T 未知
公开(公告)号：AT504065T
公开(公告)日：2011-04-15
申请号：AT06844753
申请日：2006-11-30
申请人： SANDISK CORP
发明人： FONG YUPIN , WAN JUN , LUTZE JEFFREY
IPC分类号： G11C16/04 , G11C16/34

4. 发明专利

JP2011170964A Word line correction in nonvolatile memory erasure operation 审中-公开
标题翻译：非易失性存储器擦除操作中的字线校正
公开(公告)号：JP2011170964A
公开(公告)日：2011-09-01
申请号：JP2011091569
申请日：2011-04-15
申请人： Sandisk Corp , サンディスクコーポレイションSanDisk Corporation
发明人： WAN JUN , LUTZE JEFFREY W , PANG CHAN-SUI
IPC分类号： G11C16/02 , G11C16/04 , G11C16/06 , H01L21/8247 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： G11C8/08 , G11C16/0483 , G11C16/16 , G11C16/3468
摘要： PROBLEM TO BE SOLVED: To provide an erasure technique to make an erasure speed uniform on each memory cell basis in a NAND string. SOLUTION: In order to equalize the erasure operation of a plurality of memory cells, a correction voltage is applied to a nonvolatile memory system during the erasure operation. The correction voltage corrects a voltage static-capacity-coupled with the memory cells in the NAND string from other memory cells and/or selection gates. By applying a correction voltage to one or more memory cells, it is possible to make preferable the erasure operation of the memory cells virtually. By applying the correction voltage to the end portion of the memory cells in the NAND string, it is possible to equalize the erasure operation thereof with the erasure operation of the internal memory cells in the NAND string. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种擦除技术，以在NAND串中的每个存储单元基础上使擦除速度均匀。解决方案：为了均衡多个存储单元的擦除操作，在擦除操作期间将校正电压施加到非易失性存储器系统。校正电压校正与来自其他存储器单元和/或选择门的NAND串中的存储器单元的静态电容耦合的电压。通过对一个或多个存储单元施加校正电压，可以使存储单元的擦除操作更为可取。通过将校正电压施加到NAND串中的存储单元的端部，可以将其擦除操作与NAND串中的内部存储单元的擦除操作相等。版权所有（C）2011，JPO＆INPIT

5. 发明专利

JP2011100540A Selective use of programming inhibit scheme for nonvolatile memory 有权
标题翻译：选择性使用非易失性存储器编程抑制方案
公开(公告)号：JP2011100540A
公开(公告)日：2011-05-19
申请号：JP2010284516
申请日：2010-12-21
申请人： Sandisk Corp , サンディスクコーポレイションSanDisk Corporation
发明人： WAN JUN , LUTZE JEFFREY , HIGASHIYA MASAAKI , HEMINK GERRIT JAN , OWADA KEN , CHEN JIAN , GONGWER GEOFFREY S
IPC分类号： G11C16/02 , G11C16/04 , G11C16/06 , H01L21/8247 , H01L27/10 , H01L27/115 , H01L29/788 , H01L29/792
CPC分类号： G11C16/3418
摘要： PROBLEM TO BE SOLVED: To program a non-volatile memory system so as to reduce or prevent program disturbance. SOLUTION: A plurality of program inhibit schemes are employed for a single non-volatile memory system. Program inhibit schemes are selected based on the word line being programmed. Certain program inhibit schemes minimize or eliminate program disturbance at select word lines in a preferred manner. The temperature of a memory system is detected before or during a programming operation. A program inhibit scheme can be selected based on the temperature of the system. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：编程非易失性存储器系统以减少或防止程序干扰。解决方案：对于单个非易失性存储器系统采用多个程序禁止方案。基于正在编程的字线选择程序禁止方案。某些程序禁止方案以优选的方式最小化或消除选择字线处的程序干扰。在编程操作之前或期间检测存储器系统的温度。可以基于系统的温度来选择程序禁止方案。版权所有（C）2011，JPO＆INPIT

6. 发明专利

AT521972T 未知
公开(公告)号：AT521972T
公开(公告)日：2011-09-15
申请号：AT06800361
申请日：2006-07-26
申请人： SANDISK CORP
发明人： WAN JUN , LUTZE JEFFREY
IPC分类号： G11C11/56 , G11C16/10 , G11C16/34
摘要： The maximum allowable number of voltage programming pulses to program memory elements of a non-volatile memory device is adjusted to account for changes in the memory elements which occur over time. Programming pulses are applied until the threshold voltage of one or more memory elements reaches a certain verify level, after which a defined maximum number of additional pulses may be applied to other memory elements to allow them to also reach associated target threshold voltage levels. The technique enforces a maximum allowable number of programming pulses that can change over time as the memory is cycled.

7. 发明专利

DE602006017866D1 LAST-FIRST-MODUS UND VERFAHREN ZUM PROGRAMMIEREN VON NICHTFLÜCHTIGEM SPEICHER DES NAND-TYPS MIT VERRINGERTER PROGRAMMSTÖRUNG 未知
公开(公告)号：DE602006017866D1
公开(公告)日：2010-12-09
申请号：DE602006017866
申请日：2006-09-06
申请人： SANDISK CORP
发明人： WAN JUN , LUTZE JEFFREY W
IPC分类号： G11C16/04

8. 发明专利

AT486350T 未知
公开(公告)号：AT486350T
公开(公告)日：2010-11-15
申请号：AT06790184
申请日：2006-09-06
申请人： SANDISK CORP
发明人： WAN JUN , LUTZE JEFFREY
IPC分类号： G11C16/04
摘要： A non-volatile memory of NAND type is programmed in a manner which reduces the incidence of program disturb for inhibited memory elements which undergo boosting to reduce program disturb, but which experience reduced boosting benefits due to their word line location. To achieve this result, a word line sequence in which the memory elements are programmed is adjusted so that higher word lines are programmed first, out of sequence relative to the remaining word lines. Additionally, self-boosting can be used for the higher word lines, while erased area self-boosting or a variant can be used for the remaining word lines. Furthermore, pre-charging of the channel of the inhibited memory elements may be employed prior to the self boosting, for the non volatile storage elements which are programmed after those associated with the first word line.

9. 发明专利

DE602006007981D1 未知
公开(公告)号：DE602006007981D1
公开(公告)日：2009-09-03
申请号：DE602006007981
申请日：2006-05-11
申请人： SANDISK CORP
发明人： WAN JUN , LUTZE JEFFREY , HIGASHITANI MASAAKI , HEMINK GERRIT , OOWADA KEN , CHEN JIAN , GONGWER GEOFFREY S
IPC分类号： G11C16/34 , G11C11/56
摘要： A non-volatile memory system is programmed so as to reduce or avoid program disturb. In accordance with one embodiment, multiple program inhibit schemes are employed for a single non-volatile memory system. Program inhibit schemes are selected based on the word line being programmed. Certain program inhibit schemes have been discovered to better minimize or eliminate program disturb at select word lines. In one embodiment, selecting a program inhibit scheme includes selecting a program voltage pulse ramp rate. Different ramp rates have been discovered to better minimize program disturb when applied to select word lines. In another embodiment, the temperature of a memory system is detected before or during a program operation. A program inhibit scheme can be selected based on the temperature of the system.

10. 发明公开

EP2160735A4 INTELLIGENT CONTROL OF PROGRAM PULSE DURATION 审中-公开
标题翻译：智能控制程序WIDTH
公开(公告)号：EP2160735A4
公开(公告)日：2011-04-20
申请号：EP08771368
申请日：2008-06-18
申请人： SANDISK CORP
发明人： FONG YUPIN , WAN JUN
IPC分类号： G11C16/34 , G11C16/10
CPC分类号： G11C11/5628 , G11C16/10 , G11C16/3454 , G11C16/3459 , G11C2211/5621

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