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1. 发明授权

US06653684B2 Integrated circuit including high-voltage and logic transistors and EPROM cells 有权
标题翻译：集成电路包括高压和逻辑晶体管和EPROM单元
公开(公告)号：US06653684B2
公开(公告)日：2003-11-25
申请号：US09748711
申请日：2000-12-22
申请人： Richard Fournel , Eric Mazaleyrat
发明人： Richard Fournel , Eric Mazaleyrat
IPC分类号： H01L29788
CPC分类号： H01L27/105 , H01L27/1052
摘要： An integrated circuit including logic MOS transistors, EPROM cells, and high-voltage MOS transistors. Each EPROM cell includes a floating gate formed from a first polysilicon level above a tunnel oxide and a control gate formed from a second polysilicon level. Each logic MOS transistor includes a gate formed from a portion of the second polysilicon level above a very thin oxide. Each high-voltage transistor includes a gate corresponding to a portion of the first polysilicon level above a layer of said tunnel oxide, the gate being covered with a portion of the second polysilicon layer, except at locations where a contact is desired to be made with the gate. The uncovered portion of the first polysilicon layer in the high-voltage MOS transistors is coated with a silicon nitride layer.
摘要翻译：包括逻辑MOS晶体管，EPROM单元和高压MOS晶体管的集成电路。每个EPROM单元包括由隧道氧化物上方的第一多晶硅级形成的浮置栅极和由第二多晶硅层级形成的控制栅极。每个逻辑MOS晶体管包括由非常薄的氧化物上的第二多晶硅层的一部分形成的栅极。每个高电压晶体管包括对应于所述隧道氧化物层之上的第一多晶硅层的一部分的栅极，栅极被第二多晶硅层的一部分覆盖，除了期望接触的位置处，大门。高压MOS晶体管中的第一多晶硅层的未覆盖部分涂覆有氮化硅层。

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